uboot-rockchip: update NanoPi R2S patches

Update the patches required for the NanoPi R2S to match the DTS accepted
for upstream Linux. The U-Boot patch meanwhile is still pending
upstream.

Signed-off-by: David Bauer <mail@david-bauer.net>

4 files changed, 191 insertions, 123 deletions

diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index e5c49d00bb..1dbdcb531f 100644
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -6,6 +6,7 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_VERSION:=2020.07
+PKG_RELEASE:=2
 
 PKG_HASH:=c1f5bf9ee6bb6e648edbf19ce2ca9452f614b08a9f886f1a566aa42e8cf05f6a
 
diff --git a/package/boot/uboot-rockchip/patches/100-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch b/package/boot/uboot-rockchip/patches/100-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch
index bc65fb69ef..ddda146935 100644
--- a/package/boot/uboot-rockchip/patches/100-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch
+++ b/package/boot/uboot-rockchip/patches/100-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch
@@ -1,4 +1,4 @@
-From 67f4c228c2bf515386cd54073104dc2e6eae85ea Mon Sep 17 00:00:00 2001
+From 64d37d74519eb5d4dcff8e9164d18f524aa72c8d Mon Sep 17 00:00:00 2001
 From: David Bauer <mail@david-bauer.net>
 Date: Fri, 10 Jul 2020 14:58:30 +0200
 Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
@@ -17,11 +17,11 @@ WAN - LAN - SYS LED
 Signed-off-by: David Bauer <mail@david-bauer.net>
 ---
  arch/arm/dts/Makefile                      |   1 +
- arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi |  34 +++
- arch/arm/dts/rk3328-nanopi-r2s.dts         | 334 +++++++++++++++++++++
+ arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi |  40 +++
+ arch/arm/dts/rk3328-nanopi-r2s.dts         | 387 +++++++++++++++++++++
  board/rockchip/evb_rk3328/MAINTAINERS      |   7 +
  configs/nanopi-r2s-rk3328_defconfig        |  99 ++++++
- 5 files changed, 475 insertions(+)
+ 5 files changed, 534 insertions(+)
  create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
  create mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts
  create mode 100644 configs/nanopi-r2s-rk3328_defconfig
@@ -38,7 +38,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  	rk3328-rock-pi-e.dtb
 --- /dev/null
 +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
-@@ -0,0 +1,34 @@
+@@ -0,0 +1,40 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +/*
 + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
@@ -73,9 +73,15 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +&vcc_sd {
 +	u-boot,dm-spl;
 +};
++
++&gmac2io {
++	snps,reset-active-low;
++	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
++	snps,reset-delays-us = <0 10000 50000>;
++};
 --- /dev/null
 +++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
-@@ -0,0 +1,334 @@
+@@ -0,0 +1,387 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +/*
 + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
@@ -88,92 +94,103 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +#include "rk3328.dtsi"
 +
 +/ {
-+	model = "FriendlyARM NanoPi R2S";
++	model = "FriendlyElec NanoPi R2S";
 +	compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
 +
 +	chosen {
 +		stdout-path = "serial2:1500000n8";
 +	};
 +
-+	gmac_clkin: external-gmac-clock {
++	gmac_clk: gmac-clock {
 +		compatible = "fixed-clock";
 +		clock-frequency = <125000000>;
-+		clock-output-names = "gmac_clkin";
++		clock-output-names = "gmac_clk";
 +		#clock-cells = <0>;
 +	};
 +
-+	vcc_sd: sdmmc-regulator {
-+		compatible = "regulator-fixed";
-+		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
++	keys {
++		compatible = "gpio-keys";
++		pinctrl-0 = <&reset_button_pin>;
 +		pinctrl-names = "default";
-+		pinctrl-0 = <&sdmmc0m1_gpio>;
-+		regulator-name = "vcc_sd";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		vin-supply = <&vcc_io>;
-+	};
 +
-+	vcc_sdio: sdmmcio-regulator {
-+		compatible = "regulator-gpio";
-+		gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+		states = <1800000 0x1
-+			  3300000 0x0>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&sdio_vcc_pin>;
-+		regulator-always-on;
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-name = "vcc_sdio";
-+		regulator-settling-time-us = <5000>;
-+		regulator-type = "voltage";
-+		vin-supply = <&vcc_io>;
++		reset {
++			label = "reset";
++			gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
++			linux,code = <KEY_RESTART>;
++			debounce-interval = <50>;
++		};
 +	};
 +
-+	vcc_sys: vcc-sys {
++	vcc_rtl8153: vcc-rtl8153-regulator {
 +		compatible = "regulator-fixed";
-+		regulator-name = "vcc_sys";
++		gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&rtl8153_en_drv>;
 +		regulator-always-on;
-+		regulator-boot-on;
++		regulator-name = "vcc_rtl8153";
 +		regulator-min-microvolt = <5000000>;
 +		regulator-max-microvolt = <5000000>;
++		enable-active-high;
 +	};
 +
 +	leds {
 +		compatible = "gpio-leds";
-+
++		pinctrl-0 = <&lan_led_pin>,  <&sys_led_pin>, <&wan_led_pin>;
 +		pinctrl-names = "default";
-+		pinctrl-0 = <&led_pins>;
-+
-+		sys {
-+			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
-+			label = "nanopi-r2s:red:sys";
-+		};
 +
-+		lan {
++		lan_led: led-0 {
 +			gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
 +			label = "nanopi-r2s:green:lan";
 +		};
 +
-+		wan {
++		sys_led: led-1 {
++			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
++			label = "nanopi-r2s:red:sys";
++		};
++
++		wan_led: led-2 {
 +			gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
 +			label = "nanopi-r2s:green:wan";
 +		};
 +	};
 +
-+	gpio_keys {
-+		compatible = "gpio-keys-polled";
-+		poll-interval = <100>;
++	vcc_io_sdio: sdmmcio-regulator {
++		compatible = "regulator-gpio";
++		enable-active-high;
++		gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
++		pinctrl-0 = <&sdio_vcc_pin>;
++		pinctrl-names = "default";
++		regulator-name = "vcc_io_sdio";
++		regulator-always-on;
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-settling-time-us = <5000>;
++		regulator-type = "voltage";
++		startup-delay-us = <2000>;
++		states = <1800000 0x1
++			  3300000 0x0>;
++		vin-supply = <&vcc_io_33>;
++	};
 +
++	vcc_sd: sdmmc-regulator {
++		compatible = "regulator-fixed";
++		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
++		pinctrl-0 = <&sdmmc0m1_gpio>;
 +		pinctrl-names = "default";
-+		pinctrl-0 = <&button_pins>;
++		regulator-name = "vcc_sd";
++		regulator-boot-on;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		vin-supply = <&vcc_io_33>;
++	};
 +
-+		reset {
-+			label = "Reset Button";
-+			gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_RESTART>;
-+			debounce-interval = <50>;
-+		};
++	vdd_5v: vdd-5v {
++		compatible = "regulator-fixed";
++		regulator-name = "vdd_5v";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
 +	};
 +};
 +
@@ -195,19 +212,16 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +
 +&gmac2io {
 +	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
-+	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
++	assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
 +	clock_in_out = "input";
-+	phy-supply = <&vcc_io>;
 +	phy-handle = <&rtl8211e>;
 +	phy-mode = "rgmii";
-+	pinctrl-names = "default";
++	phy-supply = <&vcc_io_33>;
 +	pinctrl-0 = <&rgmiim1_pins>;
++	pinctrl-names = "default";
++	rx_delay = <0x18>;
 +	snps,aal;
-+	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
-+	snps,reset-active-low;
-+	snps,reset-delays-us = <0 10000 50000>;
 +	tx_delay = <0x24>;
-+	rx_delay = <0x18>;
 +	status = "okay";
 +
 +	mdio {
@@ -215,8 +229,13 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +		#address-cells = <1>;
 +		#size-cells = <0>;
 +
-+		rtl8211e: ethernet-phy@0 {
-+			reg = <0>;
++		rtl8211e: ethernet-phy@1 {
++			reg = <1>;
++			pinctrl-0 = <&eth_phy_reset_pin>;
++			pinctrl-names = "default";
++			reset-assert-us = <10000>;
++			reset-deassert-us = <50000>;
++			reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
 +		};
 +	};
 +};
@@ -224,35 +243,36 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +&i2c1 {
 +	status = "okay";
 +
-+	rk805: rk805@18 {
++	rk805: pmic@18 {
 +		compatible = "rockchip,rk805";
 +		reg = <0x18>;
-+		interrupt-parent = <&gpio2>;
-+		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
++		interrupt-parent = <&gpio1>;
++		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 +		#clock-cells = <1>;
 +		clock-output-names = "xin32k", "rk805-clkout2";
 +		gpio-controller;
 +		#gpio-cells = <2>;
-+		pinctrl-names = "default";
 +		pinctrl-0 = <&pmic_int_l>;
++		pinctrl-names = "default";
 +		rockchip,system-power-controller;
 +		wakeup-source;
 +
-+		vcc1-supply = <&vcc_sys>;
-+		vcc2-supply = <&vcc_sys>;
-+		vcc3-supply = <&vcc_sys>;
-+		vcc4-supply = <&vcc_sys>;
-+		vcc5-supply = <&vcc_io>;
-+		vcc6-supply = <&vcc_sys>;
++		vcc1-supply = <&vdd_5v>;
++		vcc2-supply = <&vdd_5v>;
++		vcc3-supply = <&vdd_5v>;
++		vcc4-supply = <&vdd_5v>;
++		vcc5-supply = <&vcc_io_33>;
++		vcc6-supply = <&vdd_5v>;
 +
 +		regulators {
-+			vdd_logic: DCDC_REG1 {
-+				regulator-name = "vdd_logic";
++			vdd_log: DCDC_REG1 {
++				regulator-name = "vdd_log";
++				regulator-always-on;
++				regulator-boot-on;
 +				regulator-min-microvolt = <712500>;
 +				regulator-max-microvolt = <1450000>;
 +				regulator-ramp-delay = <12500>;
-+				regulator-always-on;
-+				regulator-boot-on;
++
 +				regulator-state-mem {
 +					regulator-on-in-suspend;
 +					regulator-suspend-microvolt = <1000000>;
@@ -261,11 +281,12 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +
 +			vdd_arm: DCDC_REG2 {
 +				regulator-name = "vdd_arm";
++				regulator-always-on;
++				regulator-boot-on;
 +				regulator-min-microvolt = <712500>;
 +				regulator-max-microvolt = <1450000>;
 +				regulator-ramp-delay = <12500>;
-+				regulator-always-on;
-+				regulator-boot-on;
++
 +				regulator-state-mem {
 +					regulator-on-in-suspend;
 +					regulator-suspend-microvolt = <950000>;
@@ -276,17 +297,19 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +				regulator-name = "vcc_ddr";
 +				regulator-always-on;
 +				regulator-boot-on;
++
 +				regulator-state-mem {
 +					regulator-on-in-suspend;
 +				};
 +			};
 +
-+			vcc_io: DCDC_REG4 {
-+				regulator-name = "vcc_io";
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
++			vcc_io_33: DCDC_REG4 {
++				regulator-name = "vcc_io_33";
 +				regulator-always-on;
 +				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++
 +				regulator-state-mem {
 +					regulator-on-in-suspend;
 +					regulator-suspend-microvolt = <3300000>;
@@ -295,10 +318,11 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +
 +			vcc_18: LDO_REG1 {
 +				regulator-name = "vcc_18";
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
 +				regulator-always-on;
 +				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
 +				regulator-state-mem {
 +					regulator-on-in-suspend;
 +					regulator-suspend-microvolt = <1800000>;
@@ -307,10 +331,11 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +
 +			vcc18_emmc: LDO_REG2 {
 +				regulator-name = "vcc18_emmc";
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
 +				regulator-always-on;
 +				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++
 +				regulator-state-mem {
 +					regulator-on-in-suspend;
 +					regulator-suspend-microvolt = <1800000>;
@@ -319,10 +344,11 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +
 +			vdd_10: LDO_REG3 {
 +				regulator-name = "vdd_10";
-+				regulator-min-microvolt = <1000000>;
-+				regulator-max-microvolt = <1000000>;
 +				regulator-always-on;
 +				regulator-boot-on;
++				regulator-min-microvolt = <1000000>;
++				regulator-max-microvolt = <1000000>;
++
 +				regulator-state-mem {
 +					regulator-on-in-suspend;
 +					regulator-suspend-microvolt = <1000000>;
@@ -330,38 +356,55 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +			};
 +		};
 +	};
++
++	usb {
++		rtl8153_en_drv: rtl8153-en-drv {
++			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
 +};
 +
 +&io_domains {
-+	status = "okay";
-+
-+	vccio1-supply = <&vcc_io>;
++	pmuio-supply = <&vcc_io_33>;
++	vccio1-supply = <&vcc_io_33>;
 +	vccio2-supply = <&vcc18_emmc>;
-+	vccio3-supply = <&vcc_sdio>;
++	vccio3-supply = <&vcc_io_sdio>;
 +	vccio4-supply = <&vcc_18>;
-+	vccio5-supply = <&vcc_io>;
-+	vccio6-supply = <&vcc_io>;
-+	pmuio-supply = <&vcc_io>;
++	vccio5-supply = <&vcc_io_33>;
++	vccio6-supply = <&vcc_io_33>;
++	status = "okay";
 +};
 +
 +&pinctrl {
-+	leds {
-+		led_pins: led-pins {
-+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
-+							<2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
-+							<2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
++	button {
++		reset_button_pin: reset-button-pin {
++			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
 +		};
 +	};
 +
-+	button {
-+		button_pins: button-pins {
-+			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
++	ethernet-phy {
++		eth_phy_reset_pin: eth-phy-reset-pin {
++			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++		};
++	};
++
++	leds {
++		lan_led_pin: lan-led-pin {
++			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		sys_led_pin: sys-led-pin {
++			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		wan_led_pin: wan-led-pin {
++			rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
 +		};
 +	};
 +
 +	pmic {
 +		pmic_int_l: pmic-int-l {
-+			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
++			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
 +		};
 +	};
 +
@@ -372,16 +415,22 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +	};
 +};
 +
++&pwm2 {
++	status = "okay";
++};
++
 +&sdmmc {
 +	bus-width = <4>;
-+	cap-mmc-highspeed;
 +	cap-sd-highspeed;
 +	disable-wp;
-+	max-frequency = <150000000>;
++	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
 +	pinctrl-names = "default";
-+	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
++	sd-uhs-sdr12;
++	sd-uhs-sdr25;
++	sd-uhs-sdr50;
++	sd-uhs-sdr104;
 +	vmmc-supply = <&vcc_sd>;
-+	vqmmc-supply = <&vcc_sdio>;
++	vqmmc-supply = <&vcc_io_sdio>;
 +	status = "okay";
 +};
 +
@@ -391,16 +440,25 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +	status = "okay";
 +};
 +
-+&uart2 {
++&u2phy {
 +	status = "okay";
 +};
 +
-+&u2phy {
++&u2phy_host {
 +	status = "okay";
++};
 +
-+	u2phy_host: host-port {
-+		status = "okay";
-+	};
++&u2phy_otg {
++	status = "okay";
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&usb20_otg {
++	status = "okay";
++	dr_mode = "host";
 +};
 +
 +&usb_host0_ehci {
@@ -410,6 +468,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
 +&usb_host0_ohci {
 +	status = "okay";
 +};
++
 --- a/board/rockchip/evb_rk3328/MAINTAINERS
 +++ b/board/rockchip/evb_rk3328/MAINTAINERS
 @@ -5,6 +5,13 @@ F:      board/rockchip/evb_rk3328
diff --git a/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c b/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c
index fa42c1a760..a7c57e72c2 100644
--- a/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c
+++ b/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c
@@ -19,7 +19,7 @@ U_BOOT_DEVICE(syscon_at_ff100000) = {
 
 static const struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
 	.reg			= {0xff440000, 0x1000},
-	.rockchip_grf		= 0x3a,
+	.rockchip_grf		= 0x3b,
 };
 U_BOOT_DEVICE(clock_controller_at_ff440000) = {
 	.name		= "rockchip_rk3328_cru",
@@ -49,7 +49,6 @@ U_BOOT_DEVICE(serial_at_ff130000) = {
 
 static const struct dtd_rockchip_rk3328_dw_mshc dtv_mmc_at_ff500000 = {
 	.bus_width		= 0x4,
-	.cap_mmc_highspeed	= true,
 	.cap_sd_highspeed	= true,
 	.clocks			= {
 			{&dtv_clock_controller_at_ff440000, {317}},
@@ -60,11 +59,15 @@ static const struct dtd_rockchip_rk3328_dw_mshc dtv_mmc_at_ff500000 = {
 	.fifo_depth		= 0x100,
 	.interrupts		= {0x0, 0xc, 0x4},
 	.max_frequency		= 0x8f0d180,
-	.pinctrl_0		= {0x47, 0x48, 0x49, 0x4a},
+	.pinctrl_0		= {0x48, 0x49, 0x4a, 0x4b},
 	.pinctrl_names		= "default",
 	.reg			= {0xff500000, 0x4000},
+	.sd_uhs_sdr104		= true,
+	.sd_uhs_sdr12		= true,
+	.sd_uhs_sdr25		= true,
+	.sd_uhs_sdr50		= true,
 	.u_boot_spl_fifo_mode	= true,
-	.vmmc_supply		= 0x4b,
+	.vmmc_supply		= 0x4c,
 	.vqmmc_supply		= 0x1e,
 };
 U_BOOT_DEVICE(mmc_at_ff500000) = {
@@ -75,7 +78,7 @@ U_BOOT_DEVICE(mmc_at_ff500000) = {
 
 static const struct dtd_rockchip_rk3328_pinctrl dtv_pinctrl = {
 	.ranges			= true,
-	.rockchip_grf		= 0x3a,
+	.rockchip_grf		= 0x3b,
 };
 U_BOOT_DEVICE(pinctrl) = {
 	.name		= "rockchip_rk3328_pinctrl",
@@ -98,9 +101,10 @@ U_BOOT_DEVICE(gpio0_at_ff210000) = {
 };
 
 static const struct dtd_regulator_fixed dtv_sdmmc_regulator = {
-	.gpio			= {0x60, 0x1e, 0x1},
-	.pinctrl_0		= 0x61,
+	.gpio			= {0x61, 0x1e, 0x1},
+	.pinctrl_0		= 0x68,
 	.pinctrl_names		= "default",
+	.regulator_boot_on	= true,
 	.regulator_max_microvolt = 0x325aa0,
 	.regulator_min_microvolt = 0x325aa0,
 	.regulator_name		= "vcc_sd",
diff --git a/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h b/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h
index 88291627b8..499ddb78a4 100644
--- a/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h
+++ b/package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h
@@ -10,6 +10,7 @@ struct dtd_regulator_fixed {
 	fdt32_t		gpio[3];
 	fdt32_t		pinctrl_0;
 	const char *	pinctrl_names;
+	bool		regulator_boot_on;
 	fdt32_t		regulator_max_microvolt;
 	fdt32_t		regulator_min_microvolt;
 	const char *	regulator_name;
@@ -32,7 +33,6 @@ struct dtd_rockchip_rk3328_dmc {
 };
 struct dtd_rockchip_rk3328_dw_mshc {
 	fdt32_t		bus_width;
-	bool		cap_mmc_highspeed;
 	bool		cap_sd_highspeed;
 	struct phandle_1_arg clocks[4];
 	bool		disable_wp;
@@ -42,6 +42,10 @@ struct dtd_rockchip_rk3328_dw_mshc {
 	fdt32_t		pinctrl_0[4];
 	const char *	pinctrl_names;
 	fdt64_t		reg[2];
+	bool		sd_uhs_sdr104;
+	bool		sd_uhs_sdr12;
+	bool		sd_uhs_sdr25;
+	bool		sd_uhs_sdr50;
 	bool		u_boot_spl_fifo_mode;
 	fdt32_t		vmmc_supply;
 	fdt32_t		vqmmc_supply;