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| author | Andre Heider <a.heider@gmail.com> | 2021-06-08 04:20:26 +0200 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-07-25 13:52:39 +0200 |
| commit | 6618e33f2633390d3572390616fe354ecd21bfb8 (patch) | |
| tree | 2981ee3e3897df4117b7deca65f8afee00b54200 /package/boot/uboot-tegra | |
| parent | b40705b677030c30896917b7d2aa050fe5865605 (diff) | |
| download | upstream-6618e33f2633390d3572390616fe354ecd21bfb8.tar.gz upstream-6618e33f2633390d3572390616fe354ecd21bfb8.tar.bz2 upstream-6618e33f2633390d3572390616fe354ecd21bfb8.zip | |
arm-trusted-firmware-mvebu: update a3700-tools to current master
2efdb10 wtmi: Fix calculation of UART divider
4247e39 fix: twin die ddr porting guide
8ad7992 sys_init: Add missing newlines in debug mode
4ddea19 avs: Validate VDD value from OTP
c444aeb avs: Fix description for avs value 0x2e
1915b78 tim: Optimize code generated by gettimver.sh and print newline
21f566d tim: Print mv_ddr version and configuration on UART
840b70b tim: Use variable $DDRFILE where possible
c10e6ae tim: Fix waiting for UART TX ready
7bf95cf wtmi: Wait 3ms for the TX on UART to be empty prior resetting TX FIFO
63e8433 wtmi: Add "dirty" suffix to git commit and rebuild sys_init.bin binary when VERSION changes
e949b58 wtmi: During setup clock phase print CPU and DDR speed
10376b5 wtmi: Flush output on UART after the '\n' character
509c647 Makefile: Check that specified DDR_TOPOLOGY option is valid
Signed-off-by: Andre Heider <a.heider@gmail.com>
Diffstat (limited to 'package/boot/uboot-tegra')
0 files changed, 0 insertions, 0 deletions