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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2018-06-09 18:40:16 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-06-18 07:10:20 +0200 |
| commit | f2135e7811fec7174f5a74bc579a6a8f936d1100 (patch) | |
| tree | 341f8bf3695aa505400854ba1adf11a316dbdfe5 /package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch | |
| parent | 7afe1caf7000f4ca671d3d681feef11af01e8551 (diff) | |
| download | upstream-f2135e7811fec7174f5a74bc579a6a8f936d1100.tar.gz upstream-f2135e7811fec7174f5a74bc579a6a8f936d1100.tar.bz2 upstream-f2135e7811fec7174f5a74bc579a6a8f936d1100.zip | |
uboot-sunxi: update to version 2018.05
This patch 220-add-sunxi50i-nanopi-neo-plus2.patch was merged upstream.
The u-boot-sunxi-with-spl.bin is now also created for the ARM64 sunxi
boards by U-Boot itself, no need to do it manually any more.
This was tested on a H2+ Orange Pi R1 and a H5 Orange Pi Zero Plus.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch')
| -rw-r--r-- | package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch index cf41c4f1f1..bcf2faa186 100644 --- a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch +++ b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch @@ -14,7 +14,7 @@ More specifically, the following settings are now used: --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c -@@ -113,11 +113,12 @@ void clock_set_pll1(unsigned int clk) +@@ -112,11 +112,12 @@ void clock_set_pll1(unsigned int clk) struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; const int p = 0; |