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author | Zoltan Herpai <wigyori@uid0.hu> | 2014-02-05 08:39:38 +0000 |
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committer | Zoltan Herpai <wigyori@uid0.hu> | 2014-02-05 08:39:38 +0000 |
commit | 66543935db1d7eab23fc43b381e56dbd4424b499 (patch) | |
tree | c9623a71f08d3b6ad2c3b32a0a634def8e0c878e /package/boot/uboot-sunxi/patches/003-sun5i-tweak-pll6-init-value.patch | |
parent | 2ad7e55a893658e9ee5d397fdc97a844d56bb06f (diff) | |
download | upstream-66543935db1d7eab23fc43b381e56dbd4424b499.tar.gz upstream-66543935db1d7eab23fc43b381e56dbd4424b499.tar.bz2 upstream-66543935db1d7eab23fc43b381e56dbd4424b499.zip |
uboot-sunxi: various fixes - update A10-Lime support - fix MMC on sun5i with initializing PLL6 correctly
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
SVN-Revision: 39470
Diffstat (limited to 'package/boot/uboot-sunxi/patches/003-sun5i-tweak-pll6-init-value.patch')
-rw-r--r-- | package/boot/uboot-sunxi/patches/003-sun5i-tweak-pll6-init-value.patch | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/package/boot/uboot-sunxi/patches/003-sun5i-tweak-pll6-init-value.patch b/package/boot/uboot-sunxi/patches/003-sun5i-tweak-pll6-init-value.patch new file mode 100644 index 0000000000..3300f42bf9 --- /dev/null +++ b/package/boot/uboot-sunxi/patches/003-sun5i-tweak-pll6-init-value.patch @@ -0,0 +1,33 @@ +From 8f70a049daa30be894158411439a36f920f0d11c Mon Sep 17 00:00:00 2001 +From: Hans de Goede <hdegoede@redhat.com> +Date: Wed, 15 Jan 2014 20:13:04 +0100 +Subject: [PATCH] sun5i: Tweak pll6 init value + +There are multiple ways to get 600 MHz from PLL6, the sun5i ccmu is very +similar to the sun4i and sun7i ccmu. + +This commit changes the PLL6 initialization we do for sun5i to make the PLL6 +reg value match that of sun4i and sun7i. This also makes it closer to the +sun5i power on default, as we are now only changing the K-factor from 3 to 1. + +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +--- + arch/arm/cpu/armv7/sunxi/clock.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c +index b9dd608..54b8753 100644 +--- a/arch/arm/cpu/armv7/sunxi/clock.c ++++ b/arch/arm/cpu/armv7/sunxi/clock.c +@@ -46,7 +46,7 @@ static void clock_init_safe(void) + #ifdef CONFIG_SUN5I + /* Power on reset default for PLL6 is 2400 MHz, which is faster then + * it can reliable do :| Set it to a 600 MHz instead. */ +- writel(0x21009900, &ccm->pll6_cfg); ++ writel(0x21009911, &ccm->pll6_cfg); + #endif + #ifdef CONFIG_SUN7I + writel(0x1 << 6 | readl(&ccm->ahb_gate0), &ccm->ahb_gate0); +-- +1.8.5.1 + |