uboot-mvebu: backport pending patches for Marvell A38x

100-ddr-marvell-a38x-fix-BYTE_HOMOGENEOUS_SPLIT_OUT-deci.patch [1]:
SoC Marvell A38x is used in Turris Omnia, and we thought that with recent
fiddling around DDR training to fix it once for all, there were
reproduced the issue in the upcoming new revision Turris Omnia boards.

101-arm-mvebu-spl-Add-option-to-reset-the-board-on-DDR-t.patch [2]:
This is useful when some board may occasionally fail with DDR training,
and it adds the option to reset the board on the DDR training failure

102-arm-mvebu-turris_omnia-Reset-the-board-immediately-o.patch [3]:
This enables the option CONFIG_DDR_RESET_ON_TRAINING_FAILURE (added by
101 patch), so the Turris Omnia board is restarted immediately, and it
does not require to reset the board manually or wait 120s for MCU to
reset the board

[1] https://patchwork.ozlabs.org/project/uboot/patch/20220217000837.13003-1-kabel@kernel.org/
[2] https://patchwork.ozlabs.org/project/uboot/patch/20220217000849.13028-1-kabel@kernel.org/
[3] https://patchwork.ozlabs.org/project/uboot/patch/20220217000849.13028-2-kabel@kernel.org/

Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>

1 files changed, 49 insertions, 0 deletions

diff --git a/package/boot/uboot-mvebu/patches/101-arm-mvebu-spl-Add-option-to-reset-the-board-on-DDR-t.patch b/package/boot/uboot-mvebu/patches/101-arm-mvebu-spl-Add-option-to-reset-the-board-on-DDR-t.patch
new file mode 100644
index 0000000000..d7ba3ec68f
--- /dev/null
+++ b/package/boot/uboot-mvebu/patches/101-arm-mvebu-spl-Add-option-to-reset-the-board-on-DDR-t.patch
@@ -0,0 +1,49 @@
+From 74767a3875c99b1a3d2818456a5fdc02ec1e4f93 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
+Date: Thu, 17 Feb 2022 13:54:42 +0100
+Subject: [PATCH 2/3] arm: mvebu: spl: Add option to reset the board on DDR
+ training failure
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Some boards may occacionally fail DDR training. Currently we hang() in
+this case. Add an option that makes the board do an immediate reset in
+such a case, so that a new training is tried as soon as possible,
+instead of hanging and possibly waiting for watchdog to reset the board.
+
+(If the DDR training fails while booting the image via UART, we will
+ still hang - it doesn't make sense to reset in such a case, because
+ after reset the board will try booting from another medium, and the
+ UART booting utility does not expect that.)
+
+Signed-off-by: Marek Behún <marek.behun@nic.cz>
+Reviewed-by: Pali Rohár <pali@kernel.org>
+Reviewed-by: Stefan Roese <sr@denx.de>
+---
+ arch/arm/mach-mvebu/spl.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/mach-mvebu/spl.c
++++ b/arch/arm/mach-mvebu/spl.c
+@@ -4,6 +4,7 @@
+  */
+ 
+ #include <common.h>
++#include <cpu_func.h>
+ #include <dm.h>
+ #include <debug_uart.h>
+ #include <fdtdec.h>
+@@ -290,7 +291,11 @@ void board_init_f(ulong dummy)
+ 	ret = ddr3_init();
+ 	if (ret) {
+ 		debug("ddr3_init() failed: %d\n", ret);
+-		hang();
++		if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
++		    get_boot_device() != BOOT_DEVICE_UART)
++			reset_cpu();
++		else
++			hang();
+ 	}
+ #endif
+