layerscape: add 64b/32b target for ls1012ardb device

The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.
QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.

LEDE/OPENWRT will auto strip executable program file while make. So we
need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network
fiemware be destroyed, then run make to build ls1012ardb firmware.

The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message.
This issue have noticed the IP owner for investigate, hope he can solve it
earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default
firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4"
bootargs.

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

1 files changed, 44 insertions, 0 deletions

diff --git a/package/boot/uboot-layerscape/patches/0072-driver-spi-fsl-qspi-remove-compile-Warnings.patch b/package/boot/uboot-layerscape/patches/0072-driver-spi-fsl-qspi-remove-compile-Warnings.patch
new file mode 100644
index 0000000000..beffb2a93c
--- /dev/null
+++ b/package/boot/uboot-layerscape/patches/0072-driver-spi-fsl-qspi-remove-compile-Warnings.patch
@@ -0,0 +1,44 @@
+From 31d5393ea4defd3872dc07264912f60ad627782b Mon Sep 17 00:00:00 2001
+From: Yunhui Cui <yunhui.cui@nxp.com>
+Date: Tue, 12 Jul 2016 11:29:52 +0800
+Subject: [PATCH 72/93] driver: spi: fsl-qspi: remove compile Warnings
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Warnins log:
+drivers/spi/fsl_qspi.c: In function ‘qspi_ahb_read’:
+drivers/spi/fsl_qspi.c:400:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
+  memcpy(rxbuf, (u8 *)(priv->cur_amba_base + priv->sf_addr), len);
+
+Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
+---
+ drivers/spi/fsl_qspi.c |    4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
+index f1c87f5..f521fe2 100644
+--- a/drivers/spi/fsl_qspi.c
++++ b/drivers/spi/fsl_qspi.c
+@@ -389,6 +389,7 @@ static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len)
+ {
+ 	struct fsl_qspi_regs *regs = priv->regs;
+ 	u32 mcr_reg;
++	void *rx_addr = NULL;
+ 
+ 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
+ 
+@@ -396,8 +397,9 @@ static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len)
+ 		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
+ 		     QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE);
+ 
++	rx_addr += priv->cur_amba_base + priv->sf_addr;
+ 	/* Read out the data directly from the AHB buffer. */
+-	memcpy(rxbuf, (u8 *)(priv->cur_amba_base + priv->sf_addr), len);
++	memcpy(rxbuf, rx_addr, len);
+ 
+ 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
+ }
+-- 
+1.7.9.5
+