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| author | Yutang Jiang <yutang.jiang@nxp.com> | 2016-10-29 00:18:23 +0800 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2016-10-31 17:00:10 +0100 |
| commit | 15a14cf1665ef3d8b5c77cce69b52d131340e3b3 (patch) | |
| tree | bd544b24bd3e7fc7efc61f80e1755274971c5582 /package/boot/uboot-layerscape/patches/0053-armv8-arch-fsl-layerscape-Update-name-of-Soc.patch | |
| parent | c6c731fe311f7da42777ffd31804a4f6aa3f8e19 (diff) | |
| download | upstream-15a14cf1665ef3d8b5c77cce69b52d131340e3b3.tar.gz upstream-15a14cf1665ef3d8b5c77cce69b52d131340e3b3.tar.bz2 upstream-15a14cf1665ef3d8b5c77cce69b52d131340e3b3.zip | |
layerscape: add 64b/32b target for ls1012ardb device
The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.
QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.
LEDE/OPENWRT will auto strip executable program file while make. So we
need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network
fiemware be destroyed, then run make to build ls1012ardb firmware.
The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message.
This issue have noticed the IP owner for investigate, hope he can solve it
earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default
firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4"
bootargs.
Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
Diffstat (limited to 'package/boot/uboot-layerscape/patches/0053-armv8-arch-fsl-layerscape-Update-name-of-Soc.patch')
| -rw-r--r-- | package/boot/uboot-layerscape/patches/0053-armv8-arch-fsl-layerscape-Update-name-of-Soc.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/package/boot/uboot-layerscape/patches/0053-armv8-arch-fsl-layerscape-Update-name-of-Soc.patch b/package/boot/uboot-layerscape/patches/0053-armv8-arch-fsl-layerscape-Update-name-of-Soc.patch new file mode 100644 index 0000000000..37146941c8 --- /dev/null +++ b/package/boot/uboot-layerscape/patches/0053-armv8-arch-fsl-layerscape-Update-name-of-Soc.patch @@ -0,0 +1,40 @@ +From 9722009432a5553b11c8e0a04a275654de11dbc4 Mon Sep 17 00:00:00 2001 +From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> +Date: Mon, 13 Jun 2016 16:33:06 +0530 +Subject: [PATCH 53/93] armv8: arch-fsl-layerscape: Update name of Soc + +Update the name of the Soc. + +Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> +--- + arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +index e4ff990..7a943be 100644 +--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h ++++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +@@ -8,13 +8,13 @@ + #define _FSL_LAYERSCAPE_CPU_H + + static struct cpu_type cpu_type_list[] = { +- CPU_TYPE_ENTRY(LS2080, LS2080, 8), +- CPU_TYPE_ENTRY(LS2085, LS2085, 8), +- CPU_TYPE_ENTRY(LS2045, LS2045, 4), +- CPU_TYPE_ENTRY(LS1043, LS1043, 4), +- CPU_TYPE_ENTRY(LS1023, LS1023, 2), +- CPU_TYPE_ENTRY(LS2040, LS2040, 4), +- CPU_TYPE_ENTRY(LS1012, LS1012, 1), ++ CPU_TYPE_ENTRY(LS2080A, LS2080, 8), ++ CPU_TYPE_ENTRY(LS2085A, LS2085, 8), ++ CPU_TYPE_ENTRY(LS2045A, LS2045, 4), ++ CPU_TYPE_ENTRY(LS1043A, LS1043, 4), ++ CPU_TYPE_ENTRY(LS1023A, LS1023, 2), ++ CPU_TYPE_ENTRY(LS2040A, LS2040, 4), ++ CPU_TYPE_ENTRY(LS1012A, LS1012, 1), + }; + + #ifndef CONFIG_SYS_DCACHE_OFF +-- +1.7.9.5 + |