layerscape: add 64b/32b target for ls1012ardb device

The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.
QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.

LEDE/OPENWRT will auto strip executable program file while make. So we
need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network
fiemware be destroyed, then run make to build ls1012ardb firmware.

The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message.
This issue have noticed the IP owner for investigate, hope he can solve it
earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default
firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4"
bootargs.

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

1 files changed, 48 insertions, 0 deletions

diff --git a/package/boot/uboot-layerscape/patches/0027-fsl-qixis-Add-flag-for-LBMAP-brdcfg-reg-offset.patch b/package/boot/uboot-layerscape/patches/0027-fsl-qixis-Add-flag-for-LBMAP-brdcfg-reg-offset.patch
new file mode 100644
index 0000000000..a002e1c6f8
--- /dev/null
+++ b/package/boot/uboot-layerscape/patches/0027-fsl-qixis-Add-flag-for-LBMAP-brdcfg-reg-offset.patch
@@ -0,0 +1,48 @@
+From 34a472a20695cbd6ab1bc2d0686c6f324d8e0d6c Mon Sep 17 00:00:00 2001
+From: Abhimanyu Saini <abhimanyu.saini@nxp.com>
+Date: Tue, 10 May 2016 09:38:46 +0530
+Subject: [PATCH 27/93] fsl, qixis: Add flag for LBMAP brdcfg reg offset
+
+Add QIXIS_LBMAP_BRDCFG_REG to the save offset of LBMAP
+configuration register instead of hardcoding it in
+set_lbmap() function.
+
+Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
+Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
+---
+ board/freescale/common/qixis.c |   11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
+index 2e35d41..0db0ed6 100644
+--- a/board/freescale/common/qixis.c
++++ b/board/freescale/common/qixis.c
+@@ -14,6 +14,13 @@
+ #include <i2c.h>
+ #include "qixis.h"
+ 
++#ifndef QIXIS_LBMAP_BRDCFG_REG
++/*
++ * For consistency with existing platforms
++ */
++#define QIXIS_LBMAP_BRDCFG_REG 0x00
++#endif
++
+ #ifdef CONFIG_SYS_I2C_FPGA_ADDR
+ u8 qixis_read_i2c(unsigned int reg)
+ {
+@@ -144,9 +151,9 @@ static void __maybe_unused set_lbmap(int lbmap)
+ {
+ 	u8 reg;
+ 
+-	reg = QIXIS_READ(brdcfg[0]);
++	reg = QIXIS_READ(brdcfg[QIXIS_LBMAP_BRDCFG_REG]);
+ 	reg = (reg & ~QIXIS_LBMAP_MASK) | lbmap;
+-	QIXIS_WRITE(brdcfg[0], reg);
++	QIXIS_WRITE(brdcfg[QIXIS_LBMAP_BRDCFG_REG], reg);
+ }
+ 
+ static void __maybe_unused set_rcw_src(int rcw_src)
+-- 
+1.7.9.5
+