uboot-lantiq: reorder and rework patches

use:
  - 00nn for u-boot patches
  - 01nn for new boards

While doing the rework, the board definitions for the easy50712 and
easy80920 were moved to distinct board definitions patches.

Signed-off-by: Mathias Kresin <dev@kresin.me>

1 files changed, 0 insertions, 269 deletions

diff --git a/package/boot/uboot-lantiq/patches/0039-MIPS-add-board-support-for-Arcadyan-ARV7510.patch b/package/boot/uboot-lantiq/patches/0039-MIPS-add-board-support-for-Arcadyan-ARV7510.patch
deleted file mode 100644
index 76f89550cc..0000000000
--- a/package/boot/uboot-lantiq/patches/0039-MIPS-add-board-support-for-Arcadyan-ARV7510.patch
+++ /dev/null
@@ -1,269 +0,0 @@
-From ba27086a5174130d138d645c2f4a49b08c3f2386 Mon Sep 17 00:00:00 2001
-From: Matti Laakso <malaakso@elisanet.fi>
-Date: Sat, 2 Mar 2013 23:34:00 +0100
-Subject: MIPS: add board support for Arcadyan ARV7510
-
-Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
-Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
-
---- /dev/null
-+++ b/board/arcadyan/arv7510pw/Makefile
-@@ -0,0 +1,27 @@
-+#
-+# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
-+#
-+# SPDX-License-Identifier:	GPL-2.0+
-+#
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB	= $(obj)lib$(BOARD).o
-+
-+COBJS	= $(BOARD).o
-+
-+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-+OBJS	:= $(addprefix $(obj),$(COBJS))
-+SOBJS	:= $(addprefix $(obj),$(SOBJS))
-+
-+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
-+
-+#########################################################################
-+
-+# defines $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
---- /dev/null
-+++ b/board/arcadyan/arv7510pw/arv7510pw.c
-@@ -0,0 +1,72 @@
-+/*
-+ * Copyright (C) 2013 Matti Laakso <malaakso@elisanet.fi>
-+ *
-+ * SPDX-License-Identifier:	GPL-2.0+
-+ */
-+
-+#include <common.h>
-+#include <switch.h>
-+#include <asm/gpio.h>
-+#include <asm/lantiq/eth.h>
-+#include <asm/lantiq/reset.h>
-+#include <asm/lantiq/chipid.h>
-+#include <asm/lantiq/cpu.h>
-+
-+static void gpio_init(void)
-+{
-+	/* Initialize SSIO GPIOs */
-+	gpio_set_altfunc(4, 1, 0, 1);
-+	gpio_set_altfunc(5, 1, 0, 1);
-+	gpio_set_altfunc(6, 1, 0, 1);
-+	ltq_gpio_init();
-+
-+	/* Power led on */
-+	gpio_direction_output(76, 1);
-+}
-+
-+int board_early_init_f(void)
-+{
-+	gpio_init();
-+
-+	return 0;
-+}
-+
-+int checkboard(void)
-+{
-+	puts("Board: " CONFIG_BOARD_NAME "\n");
-+	ltq_chip_print_info();
-+
-+	return 0;
-+}
-+
-+static const struct ltq_eth_port_config eth_port_config[] = {
-+	/* MAC0: ADM6996I */
-+	{ 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
-+};
-+
-+static const struct ltq_eth_board_config eth_board_config = {
-+	.ports = eth_port_config,
-+	.num_ports = ARRAY_SIZE(eth_port_config),
-+};
-+
-+int board_eth_init(bd_t *bis)
-+{
-+	return ltq_eth_initialize(&eth_board_config);
-+}
-+
-+static struct switch_device adm6996i_dev = {
-+	.name = "adm6996i",
-+	.cpu_port = 5,
-+	.port_mask = 0xF,
-+};
-+
-+int board_switch_init(void)
-+{
-+	/* Deactivate HRST line to release reset of ADM6996I switch */
-+	ltq_reset_once(LTQ_RESET_HARD, 200000);
-+
-+	/* ADM6996I needs some time to come out of reset */
-+	__udelay(50000);
-+
-+	return switch_device_register(&adm6996i_dev);
-+}
---- /dev/null
-+++ b/board/arcadyan/arv7510pw/config.mk
-@@ -0,0 +1,7 @@
-+#
-+# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
-+#
-+# SPDX-License-Identifier:	GPL-2.0+
-+#
-+
-+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
---- /dev/null
-+++ b/board/arcadyan/arv7510pw/ddr_settings.h
-@@ -0,0 +1,53 @@
-+/*
-+ * Copyright (C) 2013 Matti Laakso <malaakso@elisanet.fi>
-+ *
-+ * SPDX-License-Identifier:	GPL-2.0+
-+ */
-+
-+#define MC_DC00_VALUE	0x1B1B
-+#define MC_DC01_VALUE	0x0
-+#define MC_DC02_VALUE	0x0
-+#define MC_DC03_VALUE	0x0
-+#define MC_DC04_VALUE	0x0
-+#define MC_DC05_VALUE	0x200
-+#define MC_DC06_VALUE	0x605
-+#define MC_DC07_VALUE	0x303
-+#define MC_DC08_VALUE	0x102
-+#define MC_DC09_VALUE	0x70A
-+#define MC_DC10_VALUE	0x203
-+#define MC_DC11_VALUE	0xC02
-+#define MC_DC12_VALUE	0x1C8
-+#define MC_DC13_VALUE	0x1
-+#define MC_DC14_VALUE	0x0
-+#define MC_DC15_VALUE	0x120
-+#define MC_DC16_VALUE	0xC800
-+#define MC_DC17_VALUE	0xD
-+#define MC_DC18_VALUE	0x301
-+#define MC_DC19_VALUE	0x200
-+#define MC_DC20_VALUE	0xA04
-+#define MC_DC21_VALUE	0x1700
-+#define MC_DC22_VALUE	0x1717
-+#define MC_DC23_VALUE	0x0
-+#define MC_DC24_VALUE	0x52
-+#define MC_DC25_VALUE	0x0
-+#define MC_DC26_VALUE	0x0
-+#define MC_DC27_VALUE	0x0
-+#define MC_DC28_VALUE	0x510
-+#define MC_DC29_VALUE	0x4E20
-+#define MC_DC30_VALUE	0x8235
-+#define MC_DC31_VALUE	0x0
-+#define MC_DC32_VALUE	0x0
-+#define MC_DC33_VALUE	0x0
-+#define MC_DC34_VALUE	0x0
-+#define MC_DC35_VALUE	0x0
-+#define MC_DC36_VALUE	0x0
-+#define MC_DC37_VALUE	0x0
-+#define MC_DC38_VALUE	0x0
-+#define MC_DC39_VALUE	0x0
-+#define MC_DC40_VALUE	0x0
-+#define MC_DC41_VALUE	0x0
-+#define MC_DC42_VALUE	0x0
-+#define MC_DC43_VALUE	0x0
-+#define MC_DC44_VALUE	0x0
-+#define MC_DC45_VALUE	0x500
-+#define MC_DC46_VALUE	0x0
---- a/boards.cfg
-+++ b/boards.cfg
-@@ -515,6 +515,9 @@ Active  mips        mips32         au1x0
- Active  mips        mips32         danube      arcadyan        arv4519pw           arv4519pw_brn                        arv4519pw:SYS_BOOT_BRN                                                                                                            Luka Perkov <luka@openwrt.org>
- Active  mips        mips32         danube      arcadyan        arv4519pw           arv4519pw_nor                        arv4519pw:SYS_BOOT_NOR                                                                                                            Luka Perkov <luka@openwrt.org>
- Active  mips        mips32         danube      arcadyan        arv4519pw           arv4519pw_ram                        arv4519pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
-+Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_brn                        arv7510pw:SYS_BOOT_BRN                                                                                                            Luka Perkov <luka@openwrt.org>
-+Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_nor                        arv7510pw:SYS_BOOT_NOR                                                                                                            Luka Perkov <luka@openwrt.org>
-+Active  mips        mips32         danube      arcadyan        arv7510pw           arv7510pw_ram                        arv7510pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
- Active  mips        mips32         danube      arcadyan        arv7518pw           arv7518pw_brn                        arv7518pw:SYS_BOOT_BRN                                                                                                            Luka Perkov <luka@openwrt.org>
- Active  mips        mips32         danube      arcadyan        arv7518pw           arv7518pw_nor                        arv7518pw:SYS_BOOT_NOR                                                                                                            Luka Perkov <luka@openwrt.org>
- Active  mips        mips32         danube      arcadyan        arv7518pw           arv7518pw_ram                        arv7518pw:SYS_BOOT_RAM                                                                                                            Luka Perkov <luka@openwrt.org>
---- /dev/null
-+++ b/include/configs/arv7510pw.h
-@@ -0,0 +1,75 @@
-+/*
-+ * Copyright (C) 2013 Matti Laakso <malaakso@elisanet.fi>
-+ *
-+ * SPDX-License-Identifier:	GPL-2.0+
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+
-+#define CONFIG_MACH_TYPE	"ARV7510PW"
-+#define CONFIG_IDENT_STRING	" "CONFIG_MACH_TYPE
-+#define CONFIG_BOARD_NAME	"Arcadyan ARV7510PW"
-+
-+/* Configure SoC */
-+#define CONFIG_LTQ_SUPPORT_UART		/* Enable ASC and UART */
-+#define CONFIG_LTQ_SUPPORT_ETHERNET	/* Enable ethernet */
-+#define CONFIG_LTQ_SUPPORT_NOR_FLASH	/* Have a parallel NOR flash */
-+
-+/* Switch devices */
-+#define CONFIG_SWITCH_MULTI
-+#define CONFIG_SWITCH_ADM6996I
-+
-+/* SSIO */
-+#define CONFIG_LTQ_SSIO_SHIFT_REGS
-+#define CONFIG_LTQ_SSIO_EDGE_FALLING
-+#define CONFIG_LTQ_SSIO_GPHY1_MODE	0
-+#define CONFIG_LTQ_SSIO_GPHY2_MODE	0
-+#define CONFIG_LTQ_SSIO_INIT_VALUE	0
-+
-+/* Environment */
-+#if defined(CONFIG_SYS_BOOT_NOR)
-+#define CONFIG_ENV_IS_IN_FLASH
-+#define CONFIG_ENV_OVERWRITE
-+#define CONFIG_ENV_OFFSET		(256 * 1024)
-+#define CONFIG_ENV_SECT_SIZE		(128 * 1024)
-+#else
-+#define CONFIG_ENV_IS_NOWHERE
-+#endif
-+
-+#define CONFIG_ENV_SIZE			(8 * 1024)
-+#define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
-+
-+/* Brnboot loadable image */
-+#if defined(CONFIG_SYS_BOOT_BRN)
-+#define CONFIG_SYS_TEXT_BASE		0x80002000
-+#define CONFIG_SKIP_LOWLEVEL_INIT
-+#define CONFIG_SYS_DISABLE_CACHE
-+#define CONFIG_ENV_OVERWRITE 1
-+#endif
-+
-+/* Console */
-+#define CONFIG_LTQ_ADVANCED_CONSOLE
-+#define CONFIG_BAUDRATE			115200
-+#define CONFIG_CONSOLE_ASC		1
-+#define CONFIG_CONSOLE_DEV		"ttyLTQ1"
-+
-+/* Pull in default board configs for Lantiq XWAY Danube */
-+#include <asm/lantiq/config.h>
-+#include <asm/arch/config.h>
-+
-+/* Buffered write broken in ARV7510PW */
-+#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-+
-+/* Pull in default OpenWrt configs for Lantiq SoC */
-+#include "openwrt-lantiq-common.h"
-+
-+#define CONFIG_ENV_UPDATE_UBOOT_NOR		\
-+	"update-uboot-nor=run load-uboot-nor write-uboot-nor\0"
-+
-+#define CONFIG_EXTRA_ENV_SETTINGS		\
-+	CONFIG_ENV_LANTIQ_DEFAULTS		\
-+	CONFIG_ENV_UPDATE_UBOOT_NOR		\
-+	"kernel_addr=0xB0060000\0"
-+
-+#endif /* __CONFIG_H */