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authorJohn Crispin <john@openwrt.org>2015-07-07 13:45:10 +0000
committerJohn Crispin <john@openwrt.org>2015-07-07 13:45:10 +0000
commit8a843b7b77b35f0b4f74d33b50a0c08ffb088aa6 (patch)
tree005e3423a0329c1e37bcf7cc7287e8ea0422173d /package/boot/uboot-lantiq/Makefile
parentb9963bbe804f12873a58cb2f4b675e68f5e92158 (diff)
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uboot-lantiq: Add support for Arcadyan ARV8539PW22 (Speedport W 504V)
uboot-lantiq: Add support for Arcadyan ARV8539PW22 (Speedport W 504V) Signed-off-by: Jannis Pinter <jannis@pinterjann.is> SVN-Revision: 46225
Diffstat (limited to 'package/boot/uboot-lantiq/Makefile')
-rw-r--r--package/boot/uboot-lantiq/Makefile20
1 files changed, 20 insertions, 0 deletions
diff --git a/package/boot/uboot-lantiq/Makefile b/package/boot/uboot-lantiq/Makefile
index b396ab7e3f..99b101f5f3 100644
--- a/package/boot/uboot-lantiq/Makefile
+++ b/package/boot/uboot-lantiq/Makefile
@@ -150,6 +150,25 @@ define uboot/arv752dpw22_brn
DEPS:=@TARGET_lantiq_xway_ARV752DPW22
endef
+define uboot/arv8539pw22_ram
+ TITLE:=U-Boot for Speedport W 504V Typ A (RAM)
+ SOC:=danube
+ DDR_SETTINGS:=board/arcadyan/arv8539pw22/ddr_settings.h
+ DEPS:=@TARGET_lantiq_xway_ARV8539PW22
+endef
+
+define uboot/arv8539pw22_nor
+ TITLE:=U-Boot for Speedport W 504V Typ A (NOR)
+ SOC:=danube
+ DEPS:=@TARGET_lantiq_xway_ARV8539PW22
+endef
+
+define uboot/arv8539pw22_brn
+ TITLE:=U-Boot for Speedport W 504V Typ A (BRN)
+ SOC:=danube
+ DEPS:=@TARGET_lantiq_xway_ARV8539PW22
+endef
+
define uboot/gigasx76x_ram
TITLE:=U-Boot for Siemens Gigaset sx76x (RAM)
SOC:=danube
@@ -283,6 +302,7 @@ UBOOTS:= \
arv7518pw_ram arv7518pw_nor arv7518pw_brn \
arv752dpw_ram arv752dpw_nor arv752dpw_brn \
arv752dpw22_ram arv752dpw22_nor arv752dpw22_brn \
+ arv8539pw22_brn arv8539pw22_nor arv8539pw22_ram \
gigasx76x_ram gigasx76x_nor \
acmp252_ram acmp252_nor \
easy50712_ram easy50712_nor easy50712_norspl \