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author | Andre Heider <a.heider@gmail.com> | 2021-06-08 04:19:59 +0200 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-07-25 13:52:39 +0200 |
commit | b40705b677030c30896917b7d2aa050fe5865605 (patch) | |
tree | 91f92ec564be3280c8fc789e34dd270d3dfd8fa0 /package/boot/arm-trusted-firmware-mvebu/patches/101-fix-plat-marvell-a3720-uart-fix-configuring-UART-clo.patch | |
parent | 0c111ce237075c520684542f07f3cfe41f9c94a5 (diff) | |
download | upstream-b40705b677030c30896917b7d2aa050fe5865605.tar.gz upstream-b40705b677030c30896917b7d2aa050fe5865605.tar.bz2 upstream-b40705b677030c30896917b7d2aa050fe5865605.zip |
arm-trusted-firmware-mvebu: update to v2.5
Revert to using the checked in `tbb_linux` image tool binary since building
it drags in the rather big Crypto++ project.
Cherry-pick the post-release UART fixes.
Switch to AUTORELEASE while at it.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Diffstat (limited to 'package/boot/arm-trusted-firmware-mvebu/patches/101-fix-plat-marvell-a3720-uart-fix-configuring-UART-clo.patch')
-rw-r--r-- | package/boot/arm-trusted-firmware-mvebu/patches/101-fix-plat-marvell-a3720-uart-fix-configuring-UART-clo.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/package/boot/arm-trusted-firmware-mvebu/patches/101-fix-plat-marvell-a3720-uart-fix-configuring-UART-clo.patch b/package/boot/arm-trusted-firmware-mvebu/patches/101-fix-plat-marvell-a3720-uart-fix-configuring-UART-clo.patch new file mode 100644 index 0000000000..dee4c63d3c --- /dev/null +++ b/package/boot/arm-trusted-firmware-mvebu/patches/101-fix-plat-marvell-a3720-uart-fix-configuring-UART-clo.patch @@ -0,0 +1,53 @@ +From b9185c75f7ec2b600ebe0d49281e216a2456b764 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> +Date: Thu, 13 May 2021 15:11:06 +0200 +Subject: [PATCH] fix(plat/marvell/a3720/uart): fix configuring UART clock +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When configuring the UART_BAUD_REG register, the function +console_a3700_core_init() currently only changes the baud divisor field, +leaving other fields to their previous value. + +This is incorrect, because the baud divisor is computed with the +assumption that the parent clock rate is 25 MHz, and since the other +fields in this register configure the parent clock, which could have +been changed by U-Boot or Linux. + +Fix this function to also configure the other fields so that the UART +parent clock is selected to be the xtal clock. + +For example without this change TF-A prints only + + ERROR: a3700_system_off needs to be implemented + +followed by garbage after plat_crash_console_init() is called. + +After applying this change instead of garbage it also print crash info: + + PANIC at PC : 0x0000000004023800 + +Signed-off-by: Pali Rohár <pali@kernel.org> +Change-Id: I72f338355cc60d939b8bb978d9c7fdd576416b81 +--- + drivers/marvell/uart/a3700_console.S | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/marvell/uart/a3700_console.S ++++ b/drivers/marvell/uart/a3700_console.S +@@ -49,12 +49,9 @@ func console_a3700_core_init + lsl w2, w2, #4 + add w1, w1, w2, lsr #1 + udiv w2, w1, w2 +- and w2, w2, #0x3ff ++ and w2, w2, #0x3ff /* clear all other bits to use default clock */ + +- ldr w3, [x0, #UART_BAUD_REG] +- bic w3, w3, 0x3ff +- orr w3, w3, w2 +- str w3, [x0, #UART_BAUD_REG]/* set baud rate divisor */ ++ str w2, [x0, #UART_BAUD_REG]/* set baud rate divisor */ + + /* Set UART to default 16X scheme */ + mov w3, #0 |