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| author | Gabor Juhos <juhosg@openwrt.org> | 2010-03-02 13:36:12 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2010-03-02 13:36:12 +0000 |
| commit | 4a987d60085a8a78d77fb9b30abde20e6673e28c (patch) | |
| tree | bc2207bba3cb117d14616d525fc9ed162a5091a3 | |
| parent | e157281c5dd3b0e2f4abe24a633bd33c2181730a (diff) | |
| download | upstream-4a987d60085a8a78d77fb9b30abde20e6673e28c.tar.gz upstream-4a987d60085a8a78d77fb9b30abde20e6673e28c.tar.bz2 upstream-4a987d60085a8a78d77fb9b30abde20e6673e28c.zip | |
ar71xx: ag71xx: simplify register access functions
SVN-Revision: 19949
| -rw-r--r-- | target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h | 68 |
1 files changed, 24 insertions, 44 deletions
diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h index 712e9f1ecd..881ffa3693 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h @@ -38,7 +38,7 @@ #define ETH_FCS_LEN 4 #define AG71XX_DRV_NAME "ag71xx" -#define AG71XX_DRV_VERSION "0.5.26" +#define AG71XX_DRV_VERSION "0.5.27" #define AG71XX_NAPI_WEIGHT 64 #define AG71XX_OOM_REFILL (1 + HZ/10) @@ -343,76 +343,56 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc) #define MII_CTRL_SPEED_100 1 #define MII_CTRL_SPEED_1000 2 -static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) +static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg) { - void __iomem *r; - switch (reg) { case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: - r = ag->mac_base + reg; - __raw_writel(value, r); - - /* flush write */ - (void) __raw_readl(r); break; + default: BUG(); } } -static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) +static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) { - void __iomem *r; - u32 ret; + ag71xx_check_reg_offset(ag, reg); - switch (reg) { - case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: - case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: - r = ag->mac_base + reg; - ret = __raw_readl(r); - break; - default: - BUG(); - } + __raw_writel(value, ag->mac_base + reg); + /* flush write */ + (void) __raw_readl(ag->mac_base + reg); +} + +static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) +{ + ag71xx_check_reg_offset(ag, reg); - return ret; + return __raw_readl(ag->mac_base + reg); } static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask) { void __iomem *r; - switch (reg) { - case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: - case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: - r = ag->mac_base + reg; - __raw_writel(__raw_readl(r) | mask, r); + ag71xx_check_reg_offset(ag, reg); - /* flush write */ - (void)__raw_readl(r); - break; - default: - BUG(); - } + r = ag->mac_base + reg; + __raw_writel(__raw_readl(r) | mask, r); + /* flush write */ + (void)__raw_readl(r); } static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask) { void __iomem *r; - switch (reg) { - case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: - case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS: - r = ag->mac_base + reg; - __raw_writel(__raw_readl(r) & ~mask, r); + ag71xx_check_reg_offset(ag, reg); - /* flush write */ - (void) __raw_readl(r); - break; - default: - BUG(); - } + r = ag->mac_base + reg; + __raw_writel(__raw_readl(r) & ~mask, r); + /* flush write */ + (void) __raw_readl(r); } static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints) |