diff options
| author | Mathew McBride <matt@traverse.com.au> | 2023-08-10 02:05:43 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2023-08-19 15:11:55 +0200 |
| commit | daf99a12e18f29b5b2f60ef2cdbd9ac4528acafd (patch) | |
| tree | bcd655e860c8b1d729a4319a4f6cdbf1b81bbf0d | |
| parent | 24b35fdce9b5f2878f40801c742173a0aa3b01a9 (diff) | |
| download | upstream-daf99a12e18f29b5b2f60ef2cdbd9ac4528acafd.tar.gz upstream-daf99a12e18f29b5b2f60ef2cdbd9ac4528acafd.tar.bz2 upstream-daf99a12e18f29b5b2f60ef2cdbd9ac4528acafd.zip | |
armsr: armv8: synchronize PCIE related options with arm64 defconfig
This turns on various PCI related options which are enabled
in the Linux kernel arch/arm64/configs/defconfig but not
yet in the OpenWrt config.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05/5.15 version of commit 15d3536c9deb2927c9a39350c6fa2e59f859df2a)
| -rw-r--r-- | target/linux/armsr/armv8/config-5.15 | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/target/linux/armsr/armv8/config-5.15 b/target/linux/armsr/armv8/config-5.15 index 48ab3763bd..2ebc77cf8f 100644 --- a/target/linux/armsr/armv8/config-5.15 +++ b/target/linux/armsr/armv8/config-5.15 @@ -1,4 +1,5 @@ CONFIG_64BIT=y +CONFIG_ACPI_APEI=y CONFIG_ACPI_HMAT=y CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y CONFIG_ARCH_BCM=y @@ -308,6 +309,12 @@ CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_HISILICON_LPC=y CONFIG_HISI_PMU=y CONFIG_HISI_THERMAL=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=y # CONFIG_HW_RANDOM_HISI is not set @@ -428,6 +435,14 @@ CONFIG_NVMEM_ROCKCHIP_EFUSE=y # CONFIG_NVMEM_SUNXI_SID is not set # CONFIG_NVMEM_ZYNQMP is not set CONFIG_PCC=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_ARMADA_8K=y CONFIG_PCIE_BRCMSTB=y CONFIG_PCIE_HISI_STB=y CONFIG_PCIE_IPROC_MSI=y @@ -442,8 +457,13 @@ CONFIG_PCIE_ROCKCHIP_HOST=y CONFIG_PCIE_XILINX_CPM=y CONFIG_PCIE_XILINX_NWL=y CONFIG_PCI_AARDVARK=y +CONFIG_PCI_HISI=y +CONFIG_PCI_HOST_THUNDER_ECAM=y +CONFIG_PCI_HOST_THUNDER_PEM=y CONFIG_PCI_IMX6=y +CONFIG_PCI_IOV=y CONFIG_PCI_LAYERSCAPE=y +CONFIG_PCI_PASID=y # CONFIG_PCI_RCAR_GEN2 is not set CONFIG_PHY_BCM_SR_PCIE=y CONFIG_PHY_BCM_SR_USB=y |