diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2011-11-13 11:26:54 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2011-11-13 11:26:54 +0000 |
| commit | da64ce860342dd0c920cbf5a91bb4ecc7f70c236 (patch) | |
| tree | 284871b9faeda864348c1b4bd84294bc15e49d10 | |
| parent | 0112153a0eecfd08dfe6aa80d68120d14476fe95 (diff) | |
| download | upstream-da64ce860342dd0c920cbf5a91bb4ecc7f70c236.tar.gz upstream-da64ce860342dd0c920cbf5a91bb4ecc7f70c236.tar.bz2 upstream-da64ce860342dd0c920cbf5a91bb4ecc7f70c236.zip | |
ar71xx: configure MII interface type from ar71xx_setup_phy_if_mode
SVN-Revision: 29010
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/devices.c | 32 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h | 2 |
2 files changed, 28 insertions, 6 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c index e62d1123d6..2d73dd0442 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c @@ -190,6 +190,22 @@ static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) iounmap(base); } +static void __init ar71xx_mii_ctrl_set_if(unsigned int reg, + unsigned int mii_if) +{ + void __iomem *base; + u32 t; + + base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); + + t = __raw_readl(base + reg); + t &= ~(MII_CTRL_IF_MASK); + t |= (mii_if & MII_CTRL_IF_MASK); + __raw_writel(t, base + reg); + + iounmap(base); +} + void __init ar71xx_add_device_mdio(unsigned int id, u32 phy_mask) { struct platform_device *mdio_dev; @@ -588,6 +604,8 @@ static void __init ar71xx_init_eth_pll_data(unsigned int id) static int __init ar71xx_setup_phy_if_mode(unsigned int id, struct ag71xx_platform_data *pdata) { + unsigned int mii_if; + switch (id) { case 0: switch (ar71xx_soc) { @@ -598,20 +616,21 @@ static int __init ar71xx_setup_phy_if_mode(unsigned int id, case AR71XX_SOC_AR9132: switch (pdata->phy_if_mode) { case PHY_INTERFACE_MODE_MII: - pdata->mii_if = MII0_CTRL_IF_MII; + mii_if = MII0_CTRL_IF_MII; break; case PHY_INTERFACE_MODE_GMII: - pdata->mii_if = MII0_CTRL_IF_GMII; + mii_if = MII0_CTRL_IF_GMII; break; case PHY_INTERFACE_MODE_RGMII: - pdata->mii_if = MII0_CTRL_IF_RGMII; + mii_if = MII0_CTRL_IF_RGMII; break; case PHY_INTERFACE_MODE_RMII: - pdata->mii_if = MII0_CTRL_IF_RMII; + mii_if = MII0_CTRL_IF_RMII; break; default: return -EINVAL; } + ar71xx_mii_ctrl_set_if(MII_REG_MII0_CTRL, mii_if); break; case AR71XX_SOC_AR7240: @@ -651,14 +670,15 @@ static int __init ar71xx_setup_phy_if_mode(unsigned int id, case AR71XX_SOC_AR9132: switch (pdata->phy_if_mode) { case PHY_INTERFACE_MODE_RMII: - pdata->mii_if = MII1_CTRL_IF_RMII; + mii_if = MII1_CTRL_IF_RMII; break; case PHY_INTERFACE_MODE_RGMII: - pdata->mii_if = MII1_CTRL_IF_RGMII; + mii_if = MII1_CTRL_IF_RGMII; break; default: return -EINVAL; } + ar71xx_mii_ctrl_set_if(MII_REG_MII1_CTRL, mii_if); break; case AR71XX_SOC_AR7240: diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h index 99f34973b7..c447e3e8f2 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -816,6 +816,8 @@ void ar71xx_flash_release(void); #define MII_REG_MII0_CTRL 0x00 #define MII_REG_MII1_CTRL 0x04 +#define MII_CTRL_IF_MASK 3 + #define MII0_CTRL_IF_GMII 0 #define MII0_CTRL_IF_MII 1 #define MII0_CTRL_IF_RGMII 2 |