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authorJohn Audia <therealgraysky@proton.me>2022-07-06 11:49:50 -0400
committerChristian Marangi <ansuelsmth@gmail.com>2022-07-19 14:26:30 +0200
commitd0d6b8e1833c587d0c50cac4f6324aa93b0bc8fc (patch)
tree4c9d172cd505883258da6c2dcb3d8d4470e25807
parent79af0593a30bfe382b350e9540ecfafa133b6ac0 (diff)
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mt7622: remove 300 MHz from dts
Due to the bug described here[1], remove the 300 MHz clock to avoid a low voltage condition that can cause a hang when rebooting the RT3200/E8450. This solution is probably better than the script-based work-around[2]. 1. https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490 2. https://github.com/openwrt/openwrt/pull/5025 Signed-off-by: John Audia <therealgraysky@proton.me> Tested-by: Rui Salvaterra <rsalvaterra@gmail.com> Tested-by: John Audia <therealgraysky@proton.me>
-rw-r--r--target/linux/mediatek/patches-5.15/722-remove-300Hz-to-prevent-freeze.patch25
1 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.15/722-remove-300Hz-to-prevent-freeze.patch b/target/linux/mediatek/patches-5.15/722-remove-300Hz-to-prevent-freeze.patch
new file mode 100644
index 0000000000..52069496ca
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/722-remove-300Hz-to-prevent-freeze.patch
@@ -0,0 +1,25 @@
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -23,11 +23,17 @@
+ cpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+- opp-300000000 {
+- opp-hz = /bits/ 64 <300000000>;
+- opp-microvolt = <950000>;
+- };
+-
++ /* Due to the bug described at the link below, remove the 300 MHz clock to avoid a low
++ * voltage condition that can cause a hang when rebooting the RT3200/E8450.
++ *
++ * https://forum.openwrt.org/t/belkin-rt3200-linksys-e8450-wifi-ax-discussion/94302/1490
++ *
++ * opp-300000000 {
++ * opp-hz = /bits/ 64 <300000000>;
++ * opp-microvolt = <950000>;
++ * };
++ *
++ */
+ opp-437500000 {
+ opp-hz = /bits/ 64 <437500000>;
+ opp-microvolt = <1000000>;