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authorFelix Fietkau <nbd@openwrt.org>2010-07-20 01:54:11 +0000
committerFelix Fietkau <nbd@openwrt.org>2010-07-20 01:54:11 +0000
commitbced5d7d74076dafe468e626200ce760f06ffa39 (patch)
tree0722526f5a321e9cc0381db65cab862fc24a1928
parent2fcbada24bc77bef0dc45c1dc5b064187a9d50d3 (diff)
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ar71xx: set default values for the fifo cfg registers on AR724x
SVN-Revision: 22303
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/devices.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
index f809deae55..6f1d2619ef 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
@@ -447,6 +447,13 @@ void __init ar71xx_add_device_eth(unsigned int id)
pdata->set_pll = id ? ar724x_set_pll_ge1
: ar724x_set_pll_ge0;
pdata->is_ar724x = 1;
+
+ if (!pdata->fifo_cfg1)
+ pdata->fifo_cfg1 = 0x0010ffff;
+ if (!pdata->fifo_cfg2)
+ pdata->fifo_cfg2 = 0x015500aa;
+ if (!pdata->fifo_cfg3)
+ pdata->fifo_cfg3 = 0x01f00140;
break;
case AR71XX_SOC_AR9130: