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authorFelix Fietkau <nbd@openwrt.org>2010-03-28 00:36:04 +0000
committerFelix Fietkau <nbd@openwrt.org>2010-03-28 00:36:04 +0000
commit9c0f21a5b96a76f3c504792870d3f08df221008d (patch)
tree07303e255334994ee5f0b6b398522e6aa837fc1e
parent2cc215f1217e6d07283e9a26bec5c13f9cd2b9ba (diff)
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ar71xx: fix the wan port on pb92
SVN-Revision: 20529
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c
index e3688954df..b422c3ebf0 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c
@@ -80,21 +80,19 @@ static struct gpio_button pb92_gpio_buttons[] __initdata = {
}
};
-#define PB92_WAN_PHYMASK BIT(20)
-#define PB92_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
-#define PB92_MDIO_PHYMASK (PB92_LAN_PHYMASK | PB92_WAN_PHYMASK)
-
static void __init pb92_init(void)
{
- ar71xx_add_device_m25p80(&pb92_flash_data);
+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
- ar71xx_add_device_mdio(~PB92_MDIO_PHYMASK);
+ ar71xx_set_mac_base(mac);
+ ar71xx_add_device_m25p80(&pb92_flash_data);
- ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
- ar71xx_eth0_data.phy_mask = PB92_WAN_PHYMASK;
+ ar71xx_add_device_mdio(~0);
+ ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
+ ar71xx_eth0_data.speed = SPEED_100;
+ ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
- ar71xx_eth1_data.phy_mask = PB92_LAN_PHYMASK;
ar71xx_eth1_data.speed = SPEED_1000;
ar71xx_eth1_data.duplex = DUPLEX_FULL;