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| author | Christian Lamparter <chunkeey@gmail.com> | 2019-12-05 01:24:55 +0100 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2019-12-19 22:41:57 +0100 |
| commit | 9e7a8beb9c0ed3105f86465bc64dfc79bae34d1f (patch) | |
| tree | 244d7b729876d8a448dd613f23e824ee06c6d46b | |
| parent | 2336c2dbb1929837f7e42d4315c8073342a5b46b (diff) | |
| download | upstream-9e7a8beb9c0ed3105f86465bc64dfc79bae34d1f.tar.gz upstream-9e7a8beb9c0ed3105f86465bc64dfc79bae34d1f.tar.bz2 upstream-9e7a8beb9c0ed3105f86465bc64dfc79bae34d1f.zip | |
ipq806x: add missing gpio and gsbi declaration
Adds missing gpio and gsbi declaration.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
| -rw-r--r-- | target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi index a7a9c49fc5..efaa6abd78 100644 --- a/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -656,6 +656,34 @@ output-low; }; }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + drive-strength = <10>; + bias-none; + }; + }; + + leds_pins: leds_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", + "gpio26", "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + buttons_pins: buttons_pins { + mux { + pins = "gpio54"; + drive-strength = <2>; + bias-pull-up; + }; + }; }; intc: interrupt-controller@2000000 { @@ -852,6 +880,29 @@ }; }; + gsbi7: gsbi@16600000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <7>; + reg = <0x16600000 0x100>; + clocks = <&gcc GSBI7_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + syscon-tcsr = <&tcsr>; + + gsbi7_serial: serial@16640000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16640000 0x1000>, + <0x16600000 0x1000>; + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + }; + sata_phy: sata-phy@1b400000 { compatible = "qcom,ipq806x-sata-phy"; reg = <0x1b400000 0x200>; |