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author | Felix Fietkau <nbd@openwrt.org> | 2015-09-21 17:40:52 +0000 |
---|---|---|
committer | Felix Fietkau <nbd@openwrt.org> | 2015-09-21 17:40:52 +0000 |
commit | 3babd37b0eecf72549c935d3579626c0189d208a (patch) | |
tree | add903d450e456195bbf974aa56f9777ecafff98 | |
parent | 8f57c55993abb1fe8463987ba25ed7ea4e781fa6 (diff) | |
download | upstream-3babd37b0eecf72549c935d3579626c0189d208a.tar.gz upstream-3babd37b0eecf72549c935d3579626c0189d208a.tar.bz2 upstream-3babd37b0eecf72549c935d3579626c0189d208a.zip |
omap: add Kernel 4.1
tested on Beagleboard C4
Signed-off-by: Dirk Neukirchen <dirkneukirchen@web.de>
SVN-Revision: 47013
6 files changed, 1019 insertions, 0 deletions
diff --git a/target/linux/omap/config-4.1 b/target/linux/omap/config-4.1 new file mode 100644 index 0000000000..14f13f09e4 --- /dev/null +++ b/target/linux/omap/config-4.1 @@ -0,0 +1,540 @@ +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_ARCH_HAS_BANDGAP=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OMAP=y +CONFIG_ARCH_OMAP2PLUS=y +CONFIG_ARCH_OMAP2PLUS_TYPICAL=y +CONFIG_ARCH_OMAP3=y +CONFIG_ARCH_OMAP4=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARM=y +# CONFIG_ARM_CPUIDLE is not set +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +# CONFIG_ARM_LPAE is not set +CONFIG_ARM_OMAP2PLUS_CPUFREQ=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +CONFIG_ARM_VIRT_EXT=y +CONFIG_AT803X_PHY=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_AVERAGE=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_TPS65217 is not set +CONFIG_BCH=y +CONFIG_BOUNCE=y +CONFIG_CACHE_L2X0=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLKSRC_OF=y +# CONFIG_CLK_TWL6040 is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="console=ttyO0,115200n8" +CONFIG_COMMON_CLK=y +CONFIG_CONSOLE_TRANSLATIONS=y +# CONFIG_CPUFREQ_DT is not set +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_HAS_ASID=y +# CONFIG_CPU_ICACHE_DISABLE is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CTR=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_MANAGER=m +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DDR=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +# CONFIG_DEBUG_UART_8250 is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DISPLAY_ENCODER_OPA362 is not set +CONFIG_DISPLAY_PANEL_DPI=y +CONFIG_DISPLAY_PANEL_DSI_CM=y +# CONFIG_DISPLAY_PANEL_NEC_NL8048HL11 is not set +CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=y +# CONFIG_DISPLAY_PANEL_SONY_ACX565AKM is not set +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_OMAP=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DTC=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_EEPROM_AT24=y +CONFIG_EXT4_FS=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CFB_REV_PIXELS_IN_BYTE=y +CONFIG_FB_CMDLINE=y +CONFIG_FB_DA8XX=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_OMAP2=y +CONFIG_FB_OMAP2_DEBUG_SUPPORT=y +CONFIG_FB_OMAP2_NUM_FBS=3 +CONFIG_FIRMWARE_EDID=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FONT_SUPPORT=y +CONFIG_FORCE_MAX_ZONEORDER=12 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FRAME_POINTER=y +CONFIG_FREEZER=y +CONFIG_FS_MBCACHE=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_DEVRES=y +CONFIG_GPIO_OMAP=y +CONFIG_GPIO_TPS65910=y +CONFIG_GPIO_TWL4030=y +# CONFIG_GPIO_TWL6040 is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_TWD=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_BPF_JIT=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SMP=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_UID16=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HDMI=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_HOTPLUG_CPU=y +CONFIG_HWMON=y +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OMAP=y +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_OMAP=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INPUT=y +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_MATRIXKMAP=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_TWL4030_PWRBUTTON=y +# CONFIG_INPUT_TWL4030_VIBRA is not set +# CONFIG_INPUT_TWL6040_VIBRA is not set +CONFIG_IOMMU_HELPER=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +CONFIG_KEYBOARD_TWL4030=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_PLATFORM is not set +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +# CONFIG_MACH_CM_T35 is not set +# CONFIG_MACH_NOKIA_RX51 is not set +# CONFIG_MACH_OMAP3517EVM is not set +# CONFIG_MACH_OMAP3530_LV_SOM is not set +CONFIG_MACH_OMAP3_BEAGLE=y +# CONFIG_MACH_OMAP3_PANDORA is not set +# CONFIG_MACH_OMAP3_TORPEDO is not set +CONFIG_MACH_OMAP_GENERIC=y +# CONFIG_MACH_OMAP_LDP is not set +CONFIG_MACH_OVERO=y +CONFIG_MAILBOX=y +CONFIG_MDIO_BOARDINFO=y +CONFIG_MEMORY=y +CONFIG_MFD_CORE=y +CONFIG_MFD_SYSCON=y +CONFIG_MFD_TI_AM335X_TSCADC=y +CONFIG_MFD_TPS65217=y +CONFIG_MFD_TPS65910=y +CONFIG_MFD_TWL4030_AUDIO=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +# CONFIG_MMC_OMAP is not set +CONFIG_MMC_OMAP_HS=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_BCH=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_BCH=y +CONFIG_MTD_NAND_OMAP2=y +CONFIG_MTD_NAND_OMAP_BCH=y +CONFIG_MTD_NAND_OMAP_BCH_BUILD=y +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MULTI_IRQ_HANDLER=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NET_VENDOR_I825XX is not set +CONFIG_NLS=y +CONFIG_NO_BOOTMEM=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=4 +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_MTD=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_TOUCHSCREEN=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OMAP2PLUS_MBOX=y +CONFIG_OMAP2_DSS=y +CONFIG_OMAP2_DSS_DPI=y +CONFIG_OMAP2_DSS_DSI=y +CONFIG_OMAP2_DSS_HDMI_COMMON=y +CONFIG_OMAP2_DSS_INIT=y +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 +CONFIG_OMAP2_DSS_SDI=y +CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y +# CONFIG_OMAP2_DSS_VENC is not set +CONFIG_OMAP2_VRFB=y +# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set +# CONFIG_OMAP3_SDRC_AC_TIMING is not set +CONFIG_OMAP4_DSS_HDMI=y +CONFIG_OMAP5_DSS_HDMI=y +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_CONTROL_PHY=y +CONFIG_OMAP_DM_TIMER=y +CONFIG_OMAP_GPMC=y +CONFIG_OMAP_INTERCONNECT=y +CONFIG_OMAP_IRQCHIP=y +CONFIG_OMAP_MBOX_KFIFO_SIZE=256 +CONFIG_OMAP_MUX=y +# CONFIG_OMAP_MUX_DEBUG is not set +CONFIG_OMAP_MUX_WARNINGS=y +CONFIG_OMAP_OCP2SCP=y +CONFIG_OMAP_PACKAGE_CBB=y +CONFIG_OMAP_PM_NOOP=y +CONFIG_OMAP_RESET_CLOCKS=y +CONFIG_OMAP_WATCHDOG=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PCI is not set +# CONFIG_PCI_DOMAINS_GENERIC is not set +# CONFIG_PCI_SYSCALL is not set +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +# CONFIG_PHY_DM816X_USB is not set +CONFIG_PINCTRL=y +CONFIG_PL310_ERRATA_588369=y +CONFIG_PL310_ERRATA_727915=y +# CONFIG_PL310_ERRATA_753970 is not set +# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_PM=y +CONFIG_PM_CLK=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_OPP=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_POWER_AVS=y +# CONFIG_POWER_AVS_OMAP is not set +CONFIG_PPS=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_TIECAP=y +CONFIG_PWM_TIEHRPWM=y +CONFIG_PWM_TIPWMSS=y +# CONFIG_PWM_TWL is not set +# CONFIG_PWM_TWL_LED is not set +CONFIG_RCU_STALL_COMMON=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_SPI=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_PBIAS is not set +CONFIG_REGULATOR_TPS65023=y +CONFIG_REGULATOR_TPS6507X=y +CONFIG_REGULATOR_TPS65217=y +CONFIG_REGULATOR_TPS65910=y +CONFIG_REGULATOR_TWL4030=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_OMAP=y +CONFIG_RTC_DRV_TPS65910=y +CONFIG_RTC_DRV_TWL4030=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_SCHED_HRTICK=y +# CONFIG_SCSI_DMA is not set +CONFIG_SENSORS_LM75=y +CONFIG_SENSORS_TWL4030_MADC=y +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_OMAP is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_OMAP=y +CONFIG_SERIAL_OMAP_CONSOLE=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SMSC911X=y +# CONFIG_SMSC911X_ARCH_HOOKS is not set +CONFIG_SND=y +CONFIG_SND_ARM=y +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_DAVINCI_SOC_MCASP=y +CONFIG_SND_DMAENGINE_PCM=y +# CONFIG_SND_EDMA_SOC is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_JACK=y +CONFIG_SND_OMAP_SOC=y +CONFIG_SND_OMAP_SOC_DMIC=y +# CONFIG_SND_OMAP_SOC_HDMI_AUDIO is not set +CONFIG_SND_OMAP_SOC_MCBSP=y +CONFIG_SND_OMAP_SOC_MCPDM=y +CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040=y +CONFIG_SND_OMAP_SOC_OMAP_TWL4030=y +# CONFIG_SND_OMAP_SOC_RX51 is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +CONFIG_SND_PCM=y +CONFIG_SND_PCM_OSS=y +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_DMIC=y +# CONFIG_SND_SOC_FSL_SSI is not set +CONFIG_SND_SOC_HDMI_CODEC=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# CONFIG_SND_SOC_RT5677_SPI is not set +CONFIG_SND_SOC_TLV320AIC3X=y +CONFIG_SND_SOC_TWL4030=y +CONFIG_SND_SOC_TWL6040=y +CONFIG_SND_TIMER=y +CONFIG_SOC_AM33XX=y +CONFIG_SOC_AM43XX=y +CONFIG_SOC_BUS=y +CONFIG_SOC_HAS_OMAP2_SDRC=y +# CONFIG_SOC_OMAP3430 is not set +# CONFIG_SOC_TI81XX is not set +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +# CONFIG_SPI_OMAP24XX is not set +CONFIG_SRCU=y +CONFIG_STOP_MACHINE=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWIOTLB=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_THUMB2_KERNEL is not set +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TI_CPPI41=y +CONFIG_TI_CPSW=y +CONFIG_TI_CPSW_ALE=y +CONFIG_TI_CPSW_PHY_SEL=y +CONFIG_TI_CPTS=y +CONFIG_TI_DAVINCI_CPDMA=y +# CONFIG_TI_DAVINCI_EMAC is not set +CONFIG_TI_DAVINCI_MDIO=y +CONFIG_TI_EDMA=y +CONFIG_TI_EMIF=y +# CONFIG_TI_PIPE3 is not set +CONFIG_TI_PRIV_EDMA=y +CONFIG_TOUCHSCREEN_TI_AM335X_TSC=y +CONFIG_TREE_RCU=y +CONFIG_TWL4030_CORE=y +CONFIG_TWL4030_MADC=y +CONFIG_TWL4030_POWER=y +CONFIG_TWL4030_WATCHDOG=y +CONFIG_TWL6040_CORE=y +CONFIG_UID16=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/omap/patches-4.1/0334-video-da8xx-fb-adding-dt-support.patch b/target/linux/omap/patches-4.1/0334-video-da8xx-fb-adding-dt-support.patch new file mode 100644 index 0000000000..a778c20890 --- /dev/null +++ b/target/linux/omap/patches-4.1/0334-video-da8xx-fb-adding-dt-support.patch @@ -0,0 +1,201 @@ +From 884d3962ef4787c8cf0b8a7a673531c623d1dff8 Mon Sep 17 00:00:00 2001 +From: Darren Etheridge <detheridge@ti.com> +Date: Fri, 2 Aug 2013 15:35:36 -0500 +Subject: [PATCH 334/752] video: da8xx-fb: adding dt support + +Enhancing driver to enable probe triggered by a corresponding dt entry. + +Add da8xx-fb.txt documentation to devicetree section. + +Obtain fb_videomode details for the connected lcd panel using the +display timing details present in DT. + +Ensure that platform data is present before checking whether platform +callback is present (the one used to control backlight). So far this +was not an issue as driver was purely non-DT triggered, but now DT +support has been added this check must be performed. + +v2: squashing multiple commits from Afzal Mohammed (afzal@ti.com) +v3: remove superfluous cast +v4: expose both ti,am3352-lcdc and ti,da830-lcdc for .compatible + as driver can use enhanced features of all version of the + silicon block. +v5: addressed review comments from Prabhakar Lad +v6: Changed the .compatible naming to match the existing drm bindings + for am33xx devices +v7: clarify which compatible to use in the documentation for DA850 + +Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> +Signed-off-by: Darren Etheridge <detheridge@ti.com> +--- + .../devicetree/bindings/video/da8xx-fb.txt | 42 +++++++++++++ + drivers/video/fbdev/da8xx-fb.c | 66 +++++++++++++++++++- + 2 files changed, 105 insertions(+), 3 deletions(-) + create mode 100644 Documentation/devicetree/bindings/video/da8xx-fb.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/video/da8xx-fb.txt +@@ -0,0 +1,42 @@ ++TI LCD Controller on DA830/DA850/AM335x SoC's ++ ++Required properties: ++- compatible: ++ DA830, DA850 - "ti,da8xx-tilcdc" ++ AM335x SoC's - "ti,am33xx-tilcdc" ++- reg: Address range of lcdc register set ++- interrupts: lcdc interrupt ++- display-timings: typical videomode of lcd panel, represented as child. ++ Refer Documentation/devicetree/bindings/video/display-timing.txt for ++ display timing binding details. If multiple videomodes are mentioned ++ in display timings node, typical videomode has to be mentioned as the ++ native mode or it has to be first child (driver cares only for native ++ videomode). ++ ++Recommended properties: ++- ti,hwmods: Name of the hwmod associated to the LCDC ++ ++Example for am335x SoC's: ++ ++lcdc@4830e000 { ++ compatible = "ti,am33xx-tilcdc"; ++ reg = <0x4830e000 0x1000>; ++ interrupts = <36>; ++ ti,hwmods = "lcdc"; ++ status = "okay"; ++ display-timings { ++ 800x480p62 { ++ clock-frequency = <30000000>; ++ hactive = <800>; ++ vactive = <480>; ++ hfront-porch = <39>; ++ hback-porch = <39>; ++ hsync-len = <47>; ++ vback-porch = <29>; ++ vfront-porch = <13>; ++ vsync-len = <2>; ++ hsync-active = <1>; ++ vsync-active = <1>; ++ }; ++ }; ++}; +--- a/drivers/video/fbdev/da8xx-fb.c ++++ b/drivers/video/fbdev/da8xx-fb.c +@@ -36,6 +36,7 @@ + #include <linux/slab.h> + #include <linux/delay.h> + #include <linux/lcm.h> ++#include <video/of_display_timing.h> + #include <video/da8xx-fb.h> + #include <asm/div64.h> + +@@ -1317,12 +1318,54 @@ static struct fb_ops da8xx_fb_ops = { + .fb_blank = cfb_blank, + }; + ++static struct lcd_ctrl_config *da8xx_fb_create_cfg(struct platform_device *dev) ++{ ++ struct lcd_ctrl_config *cfg; ++ ++ cfg = devm_kzalloc(&dev->dev, sizeof(struct fb_videomode), GFP_KERNEL); ++ if (!cfg) ++ return NULL; ++ ++ /* default values */ ++ ++ if (lcd_revision == LCD_VERSION_1) ++ cfg->bpp = 16; ++ else ++ cfg->bpp = 32; ++ ++ /* ++ * For panels so far used with this LCDC, below statement is sufficient. ++ * For new panels, if required, struct lcd_ctrl_cfg fields to be updated ++ * with additional/modified values. Those values would have to be then ++ * obtained from dt(requiring new dt bindings). ++ */ ++ ++ cfg->panel_shade = COLOR_ACTIVE; ++ ++ return cfg; ++} ++ + static struct fb_videomode *da8xx_fb_get_videomode(struct platform_device *dev) + { + struct da8xx_lcdc_platform_data *fb_pdata = dev_get_platdata(&dev->dev); + struct fb_videomode *lcdc_info; ++ struct device_node *np = dev->dev.of_node; + int i; + ++ if (np) { ++ lcdc_info = devm_kzalloc(&dev->dev, ++ sizeof(struct fb_videomode), ++ GFP_KERNEL); ++ if (!lcdc_info) ++ return NULL; ++ ++ if (of_get_fb_videomode(np, lcdc_info, OF_USE_NATIVE_MODE)) { ++ dev_err(&dev->dev, "timings not available in DT\n"); ++ return NULL; ++ } ++ return lcdc_info; ++ } ++ + for (i = 0, lcdc_info = known_lcd_panels; + i < ARRAY_SIZE(known_lcd_panels); i++, lcdc_info++) { + if (strcmp(fb_pdata->type, lcdc_info->name) == 0) +@@ -1351,7 +1394,7 @@ static int fb_probe(struct platform_devi + int ret; + unsigned long ulcm; + +- if (fb_pdata == NULL) { ++ if (fb_pdata == NULL && !device->dev.of_node) { + dev_err(&device->dev, "Can not get platform data\n"); + return -ENOENT; + } +@@ -1391,7 +1434,10 @@ static int fb_probe(struct platform_devi + break; + } + +- lcd_cfg = (struct lcd_ctrl_config *)fb_pdata->controller_data; ++ if (device->dev.of_node) ++ lcd_cfg = da8xx_fb_create_cfg(device); ++ else ++ lcd_cfg = fb_pdata->controller_data; + + if (!lcd_cfg) { + ret = -EINVAL; +@@ -1410,7 +1456,7 @@ static int fb_probe(struct platform_devi + par->dev = &device->dev; + par->lcdc_clk = tmp_lcdc_clk; + par->lcdc_clk_rate = clk_get_rate(par->lcdc_clk); +- if (fb_pdata->panel_power_ctrl) { ++ if (fb_pdata && fb_pdata->panel_power_ctrl) { + par->panel_power_ctrl = fb_pdata->panel_power_ctrl; + par->panel_power_ctrl(1); + } +@@ -1654,11 +1700,25 @@ static int fb_resume(struct device *dev) + + static SIMPLE_DEV_PM_OPS(fb_pm_ops, fb_suspend, fb_resume); + ++#if IS_ENABLED(CONFIG_OF) ++static const struct of_device_id da8xx_fb_of_match[] = { ++ /* ++ * this driver supports version 1 and version 2 of the ++ * Texas Instruments lcd controller (lcdc) hardware block ++ */ ++ {.compatible = "ti,da8xx-tilcdc", }, ++ {.compatible = "ti,am33xx-tilcdc", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, da8xx_fb_of_match); ++#endif ++ + static struct platform_driver da8xx_fb_driver = { + .probe = fb_probe, + .remove = fb_remove, + .driver = { + .name = DRIVER_NAME, ++ .of_match_table = of_match_ptr(da8xx_fb_of_match), + .pm = &fb_pm_ops, + }, + }; diff --git a/target/linux/omap/patches-4.1/0343-video-da8xx-fb-Add-API-to-register-wait-for-vsync-ca.patch b/target/linux/omap/patches-4.1/0343-video-da8xx-fb-Add-API-to-register-wait-for-vsync-ca.patch new file mode 100644 index 0000000000..8c0898a9d6 --- /dev/null +++ b/target/linux/omap/patches-4.1/0343-video-da8xx-fb-Add-API-to-register-wait-for-vsync-ca.patch @@ -0,0 +1,91 @@ +From 9a1a810516ae9cb3259b898b6879901c5b44fa90 Mon Sep 17 00:00:00 2001 +From: Prathap M S <msprathap@ti.com> +Date: Mon, 2 Sep 2013 12:05:23 +0530 +Subject: [PATCH 343/752] video: da8xx-fb: Add API to register wait for vsync + callback + +This patch adds APIs to register and unregister wait for vsync callback. +This is derived from commit id 2d44302545da24fd22912d964102bc31a7489e97 +This commit id was part of 3.2 kernel sources. + +Signed-off-by: Prathap M S <msprathap@ti.com> +--- + drivers/video/fbdev/da8xx-fb.c | 33 +++++++++++++++++++++++++++++++++ + include/video/da8xx-fb.h | 4 ++++ + 2 files changed, 37 insertions(+) + +--- a/drivers/video/fbdev/da8xx-fb.c ++++ b/drivers/video/fbdev/da8xx-fb.c +@@ -197,6 +197,9 @@ static struct fb_fix_screeninfo da8xx_fb + .accel = FB_ACCEL_NONE + }; + ++static vsync_callback_t vsync_cb_handler; ++static void *vsync_cb_arg; ++ + static struct fb_videomode known_lcd_panels[] = { + /* Sharp LCD035Q3DG01 */ + [0] = { +@@ -831,6 +834,32 @@ static int lcd_init(struct da8xx_fb_par + return 0; + } + ++int register_vsync_cb(vsync_callback_t handler, void *arg, int idx) ++{ ++ if ((vsync_cb_handler == NULL) && (vsync_cb_arg == NULL)) { ++ vsync_cb_arg = arg; ++ vsync_cb_handler = handler; ++ } else { ++ return -EEXIST; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL(register_vsync_cb); ++ ++int unregister_vsync_cb(vsync_callback_t handler, void *arg, int idx) ++{ ++ if ((vsync_cb_handler == handler) && (vsync_cb_arg == arg)) { ++ vsync_cb_handler = NULL; ++ vsync_cb_arg = NULL; ++ } else { ++ return -ENXIO; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL(unregister_vsync_cb); ++ + /* IRQ handler for version 2 of LCDC */ + static irqreturn_t lcdc_irq_handler_rev02(int irq, void *arg) + { +@@ -868,6 +897,8 @@ static irqreturn_t lcdc_irq_handler_rev0 + LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG); + par->vsync_flag = 1; + wake_up_interruptible(&par->vsync_wait); ++ if (vsync_cb_handler) ++ vsync_cb_handler(vsync_cb_arg); + } + + if (stat & LCD_END_OF_FRAME1) { +@@ -943,6 +974,8 @@ static irqreturn_t lcdc_irq_handler_rev0 + LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG); + par->vsync_flag = 1; + wake_up_interruptible(&par->vsync_wait); ++ if (vsync_cb_handler) ++ vsync_cb_handler(vsync_cb_arg); + } + } + +--- a/include/video/da8xx-fb.h ++++ b/include/video/da8xx-fb.h +@@ -91,5 +91,9 @@ struct lcd_sync_arg { + /* Proprietary FB_SYNC_ flags */ + #define FB_SYNC_CLK_INVERT 0x40000000 + ++typedef void (*vsync_callback_t)(void *arg); ++int register_vsync_cb(vsync_callback_t handler, void *arg, int idx); ++int unregister_vsync_cb(vsync_callback_t handler, void *arg, int idx); ++ + #endif /* ifndef DA8XX_FB_H */ + diff --git a/target/linux/omap/patches-4.1/0752-video-da8xx-fb-fix-defect-with-vsync-callback-invoca.patch b/target/linux/omap/patches-4.1/0752-video-da8xx-fb-fix-defect-with-vsync-callback-invoca.patch new file mode 100644 index 0000000000..6000ef1365 --- /dev/null +++ b/target/linux/omap/patches-4.1/0752-video-da8xx-fb-fix-defect-with-vsync-callback-invoca.patch @@ -0,0 +1,38 @@ +From c99bd415829ef29adf71bb1e1b577650f10e93f5 Mon Sep 17 00:00:00 2001 +From: Darren Etheridge <detheridge@ti.com> +Date: Mon, 4 Nov 2013 12:27:40 -0600 +Subject: [PATCH 752/752] video/da8xx-fb fix defect with vsync callback + invocation + +Fix defect where SGX is running at half of the expected framerate. +The original patch (@ commit ID 9a1a810516ae9cb3259b898b6879901c5b44fa90) +seems to have a mistake where it only calls the callback +for the even or the odd frames depending on the revision of the LCD controller +This patch corrects this and invokes the callback for both odd and even frame +for just the Rev02 version of the LCDC (won't find an SGX GPU on a Rev01). + +Signed-off-by: Darren Etheridge <detheridge@ti.com> +--- + drivers/video/fbdev/da8xx-fb.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/video/fbdev/da8xx-fb.c ++++ b/drivers/video/fbdev/da8xx-fb.c +@@ -909,6 +909,8 @@ static irqreturn_t lcdc_irq_handler_rev0 + LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG); + par->vsync_flag = 1; + wake_up_interruptible(&par->vsync_wait); ++ if (vsync_cb_handler) ++ vsync_cb_handler(vsync_cb_arg); + } + + /* Set only when controller is disabled and at the end of +@@ -974,8 +976,6 @@ static irqreturn_t lcdc_irq_handler_rev0 + LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG); + par->vsync_flag = 1; + wake_up_interruptible(&par->vsync_wait); +- if (vsync_cb_handler) +- vsync_cb_handler(vsync_cb_arg); + } + } + diff --git a/target/linux/omap/patches-4.1/920-arm-dts-am335x-evmsk-add-support-for-lcd-panel.patch b/target/linux/omap/patches-4.1/920-arm-dts-am335x-evmsk-add-support-for-lcd-panel.patch new file mode 100644 index 0000000000..55708a4b03 --- /dev/null +++ b/target/linux/omap/patches-4.1/920-arm-dts-am335x-evmsk-add-support-for-lcd-panel.patch @@ -0,0 +1,70 @@ +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -257,6 +257,39 @@ + }; + + ++ lcd_pins_s0: lcd_pins_s0 { ++ pinctrl-single,pins = < ++ 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */ ++ 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */ ++ 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */ ++ 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */ ++ 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */ ++ 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */ ++ 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */ ++ 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */ ++ 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ ++ 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ ++ 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ ++ 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ ++ 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ ++ 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ ++ 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ ++ 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ ++ 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ ++ 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ ++ 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ ++ 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ ++ 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ ++ 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ ++ 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ ++ 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ ++ 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ ++ 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ ++ 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ ++ 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ ++ >; ++ }; ++ + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ +@@ -676,6 +709,27 @@ + rx-num-evt = <32>; + }; + ++&lcdc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcd_pins_s0>; ++ status = "okay"; ++ display-timings { ++ 480x272 { ++ hactive = <480>; ++ vactive = <272>; ++ hback-porch = <43>; ++ hfront-porch = <8>; ++ hsync-len = <4>; ++ vback-porch = <12>; ++ vfront-porch = <4>; ++ vsync-len = <10>; ++ clock-frequency = <9000000>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ }; ++ }; ++}; ++ + &tscadc { + status = "okay"; + tsc { diff --git a/target/linux/omap/patches-4.1/950-am335x-evmsk-wilink-dts.patch b/target/linux/omap/patches-4.1/950-am335x-evmsk-wilink-dts.patch new file mode 100644 index 0000000000..1b1f9d44c0 --- /dev/null +++ b/target/linux/omap/patches-4.1/950-am335x-evmsk-wilink-dts.patch @@ -0,0 +1,79 @@ +--- a/arch/arm/boot/dts/am335x-evmsk.dts ++++ b/arch/arm/boot/dts/am335x-evmsk.dts +@@ -14,6 +14,7 @@ + /dts-v1/; + + #include "am33xx.dtsi" ++#include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/pwm/pwm.h> + #include <dt-bindings/interrupt-controller/irq.h> + +@@ -27,6 +28,13 @@ + }; + }; + ++ wlan { ++ compatible = "wlcore"; ++ ++ gpio = <31>; ++ board-ref-clock = <4>; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ +@@ -69,6 +77,16 @@ + enable-active-high; + }; + ++ vmmc_wl: fixedregulator@2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vmmc-wl"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ gpio = <&gpio1 29 0>; ++ startup-delay-us = <70000>; ++ enable-active-high; ++ }; ++ + leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; +@@ -446,6 +464,20 @@ + 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ + >; + }; ++ ++ wilink_pins: pinmux_wilink_pins { ++ pinctrl-single,pins = < ++ 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ ++ 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ ++ 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ ++ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ ++ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ ++ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ ++ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ ++ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ ++ >; ++ }; ++ + }; + + &uart0 { +@@ -693,6 +725,16 @@ + }; + }; + ++&mmc2 { ++ status = "okay"; ++ vmmc-supply = <&vmmc_wl>; ++ bus-width = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wilink_pins>; ++ ti,non-removable; ++ keep-power-in-suspend; ++}; ++ + &mcasp1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcasp1_pins>; |