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authorEneas U de Queiroz <cotequeiroz@gmail.com>2022-03-31 10:30:11 -0300
committerDaniel Golle <daniel@makrotopia.org>2022-04-15 14:04:32 +0100
commite5bc5337843b23926557dc07659c8dead6b0f26d (patch)
tree4c1daeceb54d8fbf9cc6f9da9f1f46b171ded9db
parent321ec22f5246aeb20f57e88ecc149a272f469bd3 (diff)
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mediatek/mt7622: enable accelerated crypto drivers
Use ARMv8 Crypto Extensions for AES, ghash and sha256. This results in a 16 times speed gain in speed for aes-128-ctr, 17x in aes-128-gcm, and 9 times in sha256. Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> (cherry picked from commit c9c2b01b8441195807e8b492c7d3e385e6c6afdc)
-rw-r--r--target/linux/mediatek/mt7622/config-5.1010
1 files changed, 10 insertions, 0 deletions
diff --git a/target/linux/mediatek/mt7622/config-5.10 b/target/linux/mediatek/mt7622/config-5.10
index ebb42ebc5d..89ebc61576 100644
--- a/target/linux/mediatek/mt7622/config-5.10
+++ b/target/linux/mediatek/mt7622/config-5.10
@@ -18,6 +18,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
# CONFIG_ARM64_CNP is not set
+CONFIG_ARM64_CRYPTO=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_MODULE_PLTS=y
@@ -110,9 +111,14 @@ CONFIG_CPU_RMAP=y
CONFIG_CPU_THERMAL=y
CONFIG_CRC16=y
CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_AES_ARM64=y
+CONFIG_CRYPTO_AES_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
@@ -120,6 +126,7 @@ CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ECC=y
CONFIG_CRYPTO_ECDH=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_JITTERENTROPY=y
@@ -131,6 +138,9 @@ CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA256_ARM64=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_SIMD=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_MISC=y