at91: Add dts for Exegin Q5x boards.

Signed-off-by: Owen Kirby <osk@exegin.com>

SVN-Revision: 44492

3 files changed, 207 insertions, 0 deletions

diff --git a/target/linux/at91/files/arch/arm/boot/dts/at91-q5xr5.dts b/target/linux/at91/files/arch/arm/boot/dts/at91-q5xr5.dts
new file mode 100644
index 0000000000..2aa04ca6f6
--- /dev/null
+++ b/target/linux/at91/files/arch/arm/boot/dts/at91-q5xr5.dts
@@ -0,0 +1,193 @@
+/*
+ * q5xr5.dts - Device Tree file for Exegin Q5xR5 board
+ *
+ * Copyright (C) 2014 Owen Kirby <osk@exegin.com>
+ *
+ * Licensed under GPLv2.
+ */
+/dts-v1/;
+#include "at91sam9g20.dtsi"
+
+/ {
+	model = "Exegin Q5x (rev5)";
+	compatible = "exegin,q5xr5", "atmel,at91sam9g20", "atmel,at91sam9";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 rootfstype=squashfs,jffs2";
+	};
+
+	memory {
+		reg = <0x20000000 0x0>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		main_clock: clock@0 {
+			compatible = "atmel,osc", "fixed-clock";
+			clock-frequency = <18432000>;
+		};
+
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+
+		main_xtal {
+			clock-frequency = <18432000>;
+		};
+	};
+
+	ahb {
+		apb {
+			pinctrl@fffff400 {
+				board {
+					pinctrl_pck0_as_mck: pck0_as_mck {
+						atmel,pins = <2 1 0x2 0x0>; /* PC1 periph B */
+					};
+					pinctrl_spi0_npcs0: spi0_npcs0 {
+						atmel,pins = <0 3 0x1 0x0>; /* PA3 periph A */
+					};
+					pinctrl_spi0_npcs1: spi0_npcs1 {
+						atmel,pins = <2 11 0x2 0x0>; /* PC11 periph B */
+					};
+					pinctrl_spi1_npcs0: spi1_npcs0 {
+						atmel,pins = <1 3 0x1 0x0>; /* PB3 periph A */
+					};
+					pinctrl_spi1_npcs1: spi1_npcs1 {
+						atmel,pins = <2 5 0x2 0x0>; /* PC5 periph B */
+					};
+				};
+
+				spi0 {
+					pinctrl_spi0: spi0-0 {
+						atmel,pins =
+							<0 0 0x1 0x0	/* PA0 periph A SPI0_MISO pin */
+							 0 1 0x1 0x0	/* PA1 periph A SPI0_MOSI pin */
+							 0 2 0x1 0x0>;	/* PA2 periph A SPI0_SPCK pin */
+					};
+				};
+
+				spi1 {
+					pinctrl_spi1: spi1-0 {
+						atmel,pins =
+							<1 0 0x1 0x0	/* PB0 periph A SPI1_MISO pin */
+							 1 1 0x1 0x0	/* PB1 periph A SPI1_MOSI pin */
+							 1 2 0x1 0x0>;	/* PB2 periph A SPI1_SPCK pin */
+					};
+				};
+			};
+
+			dbgu: serial@fffff200 {
+				status = "okay";
+			};
+
+			usart0: serial@fffb0000 {
+				pinctrl-0 =
+					<&pinctrl_usart0
+					 &pinctrl_usart0_rts
+					 &pinctrl_usart0_cts
+					 &pinctrl_usart0_dtr_dsr
+					 &pinctrl_usart0_dcd
+					 &pinctrl_usart0_ri>;
+				status = "okay";
+			};
+
+			macb0: ethernet@fffc4000 {
+				phy-mode = "mii";
+				status = "okay";
+			};
+
+			usb1: gadget@fffa4000 {
+				status = "okay";
+			};
+
+			watchdog@fffffd40 {
+				status = "okay";
+			};
+ 
+			spi0: spi@fffc8000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0xfffc8000 0x200>;
+				interrupts = <12 4 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_spi0>;
+				status = "okay";
+				cs-gpios = <&pioA 3 0>, <&pioC 11 1>, <0>, <0>;
+
+				m25p80@0 {
+					compatible = "sst,sst25vf040b";
+					spi-max-frequency = <20000000>;
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+ 
+					at91boot@0 {
+						label = "at91boot";
+						reg = <0x0 0x4000>;
+					};
+					uenv@4000 {
+						label = "uboot-env";
+						reg = <0x4000 0x4000>;
+					};
+					uboot@8000 {
+						label = "uboot";
+						reg = <0x8000 0x3E000>;
+					};
+				};
+				spidev@1 {
+					compatible = "spidev";
+					spi-max-frequency = <2000000>;
+					reg = <1>;
+				};
+			};
+			spi1: spi@fffcc000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "atmel,at91rm9200-spi";
+				reg = <0xfffcc000 0x200>;
+				interrupts = <13 4 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_spi1>;
+				cs-gpios = <&pioB 3 0>, <&pioC 5 1>, <0>, <0>;
+				status = "okay";
+
+				spidev@0 {
+					compatible = "spidev";
+					spi-max-frequency = <2000000>;
+					reg = <0>;
+				};
+				spidev@1 {
+					compatible = "spidev";
+					spi-max-frequency = <2000000>;
+					reg = <1>;
+				};
+			};
+		};
+		
+		usb0: ohci@00500000 {
+			num-ports = <2>;
+			status = "okay";
+		};
+	};
+
+	flash@10000000 {
+		compatible = "cfi-flash";
+		bank-width = <2>;
+		reg = <0x10000000 0x00800000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		kernel@0 {
+			label = "kernel";
+			reg = <0x0 0x200000>;
+		};
+		rootfs@200000 {
+			label = "rootfs";
+			reg = <0x200000 0x600000>;
+		};
+	};
+};
diff --git a/target/linux/at91/image/Makefile b/target/linux/at91/image/Makefile
index a44489ca54..f88cab4297 100644
--- a/target/linux/at91/image/Makefile
+++ b/target/linux/at91/image/Makefile
@@ -58,6 +58,9 @@ Image/Build/Kernel/USBA9263=$(call MkuImageDtb,usb_a9263,usb_a9263)
 Image/Build/Kernel/USBA9G20=$(call MkuImageDtb,usb_a9g20,usb_a9g20)
 # Ethernut
 Image/Build/Kernel/ETHERNUT5=$(call MkuImageDtb,ethernut5,ethernut5)
+# Exegin
+Image/Build/Kernel/Q5XR5=$(call MkOftree,q5xr5,at91-q5xr5)
+
 
 define Image/Build/Kernel/Default
 	$(call Image/Build/Kernel/AT91SAM9263EK)
@@ -78,6 +81,7 @@ define Image/Build/Kernel/Default
 	$(call Image/Build/Kernel/USBA9263)
 	$(call Image/Build/Kernel/USBA9G20)
 	$(call Image/Build/Kernel/ETHERNUT5)
+	$(call Image/Build/Kernel/Q5XR5)
 endef
 
 define Image/BuildKernel
diff --git a/target/linux/at91/patches/101-ARM-at91-build-dtb-for-q5xr5.patch b/target/linux/at91/patches/101-ARM-at91-build-dtb-for-q5xr5.patch
new file mode 100644
index 0000000000..0465552c1b
--- /dev/null
+++ b/target/linux/at91/patches/101-ARM-at91-build-dtb-for-q5xr5.patch
@@ -0,0 +1,10 @@
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -20,6 +20,7 @@
+ dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb
+ # sam9g20
+ dtb-$(CONFIG_ARCH_AT91) += at91-foxg20.dtb
++dtb-$(CONFIG_ARCH_AT91) += at91-q5xr5.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb
+ dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb