diff options
| author | John Crispin <john@openwrt.org> | 2012-12-15 02:00:33 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2012-12-15 02:00:33 +0000 |
| commit | 1d0a9d0c0470f774056e015431ae43e0175d2266 (patch) | |
| tree | f2da9a1682c30c82d4687a8e67a00eac2add7d11 | |
| parent | c2738a9559f434db5d28282051741e24298344af (diff) | |
| download | upstream-1d0a9d0c0470f774056e015431ae43e0175d2266.tar.gz upstream-1d0a9d0c0470f774056e015431ae43e0175d2266.tar.bz2 upstream-1d0a9d0c0470f774056e015431ae43e0175d2266.zip | |
move ltq-adsl
SVN-Revision: 34693
47 files changed, 4530 insertions, 10391 deletions
diff --git a/package/platform/lantiq/ltq-adsl-fw/Makefile b/package/platform/lantiq/ltq-adsl-fw/Makefile new file mode 100644 index 0000000000..40919ba920 --- /dev/null +++ b/package/platform/lantiq/ltq-adsl-fw/Makefile @@ -0,0 +1,54 @@ +# +# Copyright (C) 2011 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=ltq-adsl-fw +PKG_VERSION:=0.1 +PKG_RELEASE:=1 + +PKG_BUILD_DIR:=$(BUILD_DIR)/ltq-dsl-fw-$(PKG_VERSION) +PKG_SOURCE:=ltq-dsl-fw-$(PKG_VERSION).tar.bz2 +PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/ +PKG_MD5SUM:=4700a36b66b955b4c5544227267356f4 +PKG_MAINTAINER:=John Crispin <blogic@openwrt.org> + +include $(INCLUDE_DIR)/package.mk + +define Package/kmod-ltq-adsl-fw-template + TITLE+=Firmware Annex-$(1) $(2) + SECTION:=sys + SUBMENU:=Network Devices + VARIANT:= $(2)-fw-$(1) + SOC:=$(2) + ANNEX:=$(1) + URL:=http://www.lantiq.com/ + DEPENDS:=@TARGET_lantiq_$(3) +kmod-ltq-adsl-$(2) +endef + +Package/kmod-ltq-adsl-danube-fw-a=$(call Package/kmod-ltq-adsl-fw-template,a,danube,xway) +Package/kmod-ltq-adsl-danube-fw-b=$(call Package/kmod-ltq-adsl-fw-template,b,danube,xway) +Package/kmod-ltq-adsl-ar9-fw-a=$(call Package/kmod-ltq-adsl-fw-template,a,ar9,xway) +Package/kmod-ltq-adsl-ar9-fw-b=$(call Package/kmod-ltq-adsl-fw-template,b,ar9,xway) +Package/kmod-ltq-adsl-ase-fw-a=$(call Package/kmod-ltq-adsl-fw-template,a,ase,ase) +Package/kmod-ltq-adsl-ase-fw-b=$(call Package/kmod-ltq-adsl-fw-template,b,ase,ase) + +define Build/Compile +endef + +define Package/kmod-ltq-adsl-$(BUILD_VARIANT)/install + $(INSTALL_DIR) $(1)/lib/firmware/ + $(CP) $(PKG_BUILD_DIR)/$(FW_NAME)/ltq-dsl-fw-$(ANNEX)-$(SOC).bin $(1)/lib/firmware/ + #ln -s /lib/firmware/$(FW_NAME)/ltq-dsl-fw-$(BUILD_VARIANT).bin $(1)/lib/firmware/adsl.bin +endef + +$(eval $(call BuildPackage,kmod-ltq-adsl-danube-fw-a)) +$(eval $(call BuildPackage,kmod-ltq-adsl-danube-fw-b)) +$(eval $(call BuildPackage,kmod-ltq-adsl-ase-fw-a)) +$(eval $(call BuildPackage,kmod-ltq-adsl-ase-fw-b)) +$(eval $(call BuildPackage,kmod-ltq-adsl-ar9-fw-a)) +$(eval $(call BuildPackage,kmod-ltq-adsl-ar9-fw-b)) diff --git a/package/platform/lantiq/ltq-adsl-mei/Makefile b/package/platform/lantiq/ltq-adsl-mei/Makefile new file mode 100644 index 0000000000..790b891d7a --- /dev/null +++ b/package/platform/lantiq/ltq-adsl-mei/Makefile @@ -0,0 +1,49 @@ +# Copyright (C) 2012 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=ltq-adsl-mei +PKG_RELEASE:=1 +PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-adsl-mei-$(BUILD_VARIANT)/ + +PKG_MAINTAINER:=John Crispin <blogic@openwrt.org> + +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/ltq-adsl-mei-template + SECTION:=sys + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=mei driver for $(1) + URL:=http://www.lantiq.com/ + VARIANT:=$(1) + DEPENDS:=@TARGET_lantiq_$(2) + FILES:=$(PKG_BUILD_DIR)/ltq_mei_$(1).ko + AUTOLOAD:=$(call AutoLoad,50,ltq_mei_$(1)) +endef + +KernelPackage/ltq-adsl-danube-mei=$(call KernelPackage/ltq-adsl-mei-template,danube,xway) +KernelPackage/ltq-adsl-ar9-mei=$(call KernelPackage/ltq-adsl-mei-template,ar9,xway) +KernelPackage/ltq-adsl-ase-mei=$(call KernelPackage/ltq-adsl-mei-template,ase,ase) + +define Build/Prepare + $(INSTALL_DIR) $(PKG_BUILD_DIR)/ + $(CP) ./src/* $(PKG_BUILD_DIR)/ +endef + +define Build/Configure +endef + +define Build/Compile + cd $(LINUX_DIR); \ + ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \ + $(MAKE) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR)/ V=1 modules +endef + +$(eval $(call KernelPackage,ltq-adsl-danube-mei)) +$(eval $(call KernelPackage,ltq-adsl-ase-mei)) +$(eval $(call KernelPackage,ltq-adsl-ar9-mei)) diff --git a/package/platform/lantiq/ltq-adsl-mei/src/Makefile b/package/platform/lantiq/ltq-adsl-mei/src/Makefile new file mode 100644 index 0000000000..2d8645f8f2 --- /dev/null +++ b/package/platform/lantiq/ltq-adsl-mei/src/Makefile @@ -0,0 +1,17 @@ +ifeq ($(BUILD_VARIANT),danube) + CFLAGS_MODULE = -DCONFIG_DANUBE -DCONFIG_IFXMIPS_DSL_CPE_MEI + obj-m = ltq_mei_danube.o + ltq_mei_danube-objs = lantiq_mei.o +endif + +ifeq ($(BUILD_VARIANT),ase) + CFLAGS_MODULE = -DCONFIG_AMAZON_SE -DCONFIG_IFXMIPS_DSL_CPE_MEI + obj-m = ltq_mei_ase.o + ltq_mei_ase-objs = lantiq_mei.o +endif + +ifeq ($(BUILD_VARIANT),ar9) + CFLAGS_MODULE = -DCONFIG_AR9 -DCONFIG_IFXMIPS_DSL_CPE_MEI + obj-m = ltq_mei_ar9.o + ltq_mei_ar9-objs = lantiq_mei.o +endif diff --git a/package/system/ltq-dsl/src/ifxmips_mei_interface.h b/package/platform/lantiq/ltq-adsl-mei/src/ifxmips_mei_interface.h index 4ddc4c6aed..4ddc4c6aed 100644 --- a/package/system/ltq-dsl/src/ifxmips_mei_interface.h +++ b/package/platform/lantiq/ltq-adsl-mei/src/ifxmips_mei_interface.h diff --git a/package/system/ltq-dsl/src/lantiq_mei.c b/package/platform/lantiq/ltq-adsl-mei/src/lantiq_mei.c index 00ac90289b..f9d54d28cb 100644 --- a/package/system/ltq-dsl/src/lantiq_mei.c +++ b/package/platform/lantiq/ltq-adsl-mei/src/lantiq_mei.c @@ -29,11 +29,7 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/version.h> -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) -#include <linux/utsrelease.h> -#else #include <generated/utsrelease.h> -#endif #include <linux/types.h> #include <linux/fs.h> #include <linux/mm.h> @@ -47,11 +43,13 @@ #include <linux/delay.h> #include <linux/device.h> #include <linux/sched.h> +#include <linux/platform_device.h> #include <asm/uaccess.h> #include <asm/hardirq.h> +#include "lantiq_atm.h" #include <lantiq_soc.h> -#include "ifxmips_atm.h" +//#include "ifxmips_atm.h" #define IFX_MEI_BSP #include "ifxmips_mei_interface.h" @@ -144,6 +142,7 @@ DSL_DEV_HwVersion_t bsp_chip_info; #define IFX_MEI_DEVNAME "ifx_mei" #define BSP_MAX_DEVICES 1 +#define MEI_DIRNAME "ifxmips_mei" DSL_DEV_MeiError_t DSL_BSP_FWDownload (DSL_DEV_Device_t *, const char *, unsigned long, long *, long *); DSL_DEV_MeiError_t DSL_BSP_Showtime (DSL_DEV_Device_t *, DSL_uint32_t, DSL_uint32_t); @@ -164,32 +163,12 @@ static int IFX_MEI_GetPage (DSL_DEV_Device_t *, u32, u32, u32, u32 *, u32 *); static int IFX_MEI_BarUpdate (DSL_DEV_Device_t *, int); static ssize_t IFX_MEI_Write (DSL_DRV_file_t *, const char *, size_t, loff_t *); -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) -static int IFX_MEI_UserIoctls (DSL_DRV_inode_t *, DSL_DRV_file_t *, unsigned int, unsigned long); -#else -static int IFX_MEI_UserIoctls (DSL_DRV_file_t *, unsigned int, unsigned long); -#endif +static long IFX_MEI_UserIoctls (DSL_DRV_file_t *, unsigned int, unsigned long); static int IFX_MEI_Open (DSL_DRV_inode_t *, DSL_DRV_file_t *); static int IFX_MEI_Release (DSL_DRV_inode_t *, DSL_DRV_file_t *); void AMAZON_SE_MEI_ARC_MUX_Test(void); -#ifdef CONFIG_PROC_FS -static int IFX_MEI_ProcRead (struct file *, char *, size_t, loff_t *); -static ssize_t IFX_MEI_ProcWrite (struct file *, const char *, size_t, loff_t *); - -#define PROC_ITEMS 11 -#define MEI_DIRNAME "ifxmips_mei" - -static struct proc_dir_entry *meidir; -static struct file_operations IFX_MEI_ProcOperations = { - read:IFX_MEI_ProcRead, - write:IFX_MEI_ProcWrite, -}; -static reg_entry_t regs[BSP_MAX_DEVICES][PROC_ITEMS]; //total items to be monitored by /proc/mei -#define NUM_OF_REG_ENTRY (sizeof(regs[0])/sizeof(reg_entry_t)) -#endif //CONFIG_PROC_FS - void IFX_MEI_ARC_MUX_Test(void); static int adsl_dummy_ledcallback(void); @@ -208,18 +187,13 @@ static void *g_xdata_addr = NULL; static u32 *mei_arc_swap_buff = NULL; // holding swap pages -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)) -extern void ltq_mask_and_ack_irq(unsigned int irq_nr); -#define MEI_MASK_AND_ACK_IRQ ltq_mask_and_ack_irq -#else extern void ltq_mask_and_ack_irq(struct irq_data *d); static void inline MEI_MASK_AND_ACK_IRQ(int x) { struct irq_data d; - d.irq = x; + d.hwirq = x; ltq_mask_and_ack_irq(&d); } -#endif #define MEI_MAJOR 105 static int dev_major = MEI_MAJOR; @@ -228,11 +202,7 @@ static struct file_operations bsp_mei_operations = { open:IFX_MEI_Open, release:IFX_MEI_Release, write:IFX_MEI_Write, -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - ioctl:IFX_MEI_UserIoctls, -#else unlocked_ioctl:IFX_MEI_UserIoctls, -#endif }; static DSL_DEV_Device_t dsl_devices[BSP_MAX_DEVICES]; @@ -1763,7 +1733,7 @@ int DSL_BSP_EventCBUnregister(DSL_BSP_EventCallBack_t *p) * \param regs Pointer to the structure of danube mips registers * \ingroup Internal */ -static irqreturn_t IFX_MEI_Dying_Gasp_IrqHandle (int int1, void *void0) +/*static irqreturn_t IFX_MEI_Dying_Gasp_IrqHandle (int int1, void *void0) { DSL_DEV_Device_t *pDev = (DSL_DEV_Device_t *) void0; DSL_BSP_CB_Type_t event; @@ -1785,11 +1755,11 @@ static irqreturn_t IFX_MEI_Dying_Gasp_IrqHandle (int int1, void *void0) IFX_MEI_EMSG("Dying Gasp! Shutting Down... (Work around for Amazon-S Venus emulator)\n"); #else IFX_MEI_EMSG("Dying Gasp! Shutting Down...\n"); -// kill_proc (1, SIGINT, 1); /* Ask init to reboot us */ +// kill_proc (1, SIGINT, 1); #endif return IRQ_HANDLED; } - +*/ extern void ifx_usb_enable_afe_oc(void); /** @@ -2462,14 +2432,14 @@ IFX_MEI_IoctlCopyTo (int from_kernel, char *dest, char *from, int size) return ret; } -static int +int IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev, int from_kernel, unsigned int command, unsigned long lon) { int i = 0; int meierr = DSL_DEV_MEI_ERR_SUCCESS; u32 base_address = LTQ_MEI_BASE_ADDR; DSL_DEV_WinHost_Message_t winhost_msg, m; - DSL_DEV_MeiDebug_t debugrdwr; +// DSL_DEV_MeiDebug_t debugrdwr; DSL_DEV_MeiReg_t regrdwr; switch (command) { @@ -2561,7 +2531,7 @@ IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev, int from_kernel, unsigned int command, } break; - case DSL_FIO_BSP_DEBUG_READ: +/* case DSL_FIO_BSP_DEBUG_READ: case DSL_FIO_BSP_DEBUG_WRITE: IFX_MEI_IoctlCopyFrom (from_kernel, (char *) (&debugrdwr), @@ -2588,7 +2558,7 @@ IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev, int from_kernel, unsigned int command, iCount); IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, (char *) (&debugrdwr), sizeof (debugrdwr)); - break; + break;*/ case DSL_FIO_BSP_GET_VERSION: IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, (char *) (&bsp_mei_version), sizeof (DSL_DEV_Version_t)); break; @@ -2694,28 +2664,14 @@ DSL_BSP_KernelIoctls (DSL_DEV_Device_t * pDev, unsigned int command, return error; } -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) -static int -IFX_MEI_UserIoctls (DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil, - unsigned int command, unsigned long lon) -#else -static int +static long IFX_MEI_UserIoctls (DSL_DRV_file_t * fil, unsigned int command, unsigned long lon) -#endif { int error = 0; -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - int maj = MAJOR (ino->i_rdev); - int num = MINOR (ino->i_rdev); -#endif DSL_DEV_Device_t *pDev; -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - pDev = IFX_BSP_HandleGet (maj, num); -#else pDev = IFX_BSP_HandleGet (0, 0); -#endif if (pDev == NULL) return -EIO; @@ -2723,207 +2679,6 @@ IFX_MEI_UserIoctls (DSL_DRV_file_t * fil, return error; } -#ifdef CONFIG_PROC_FS -/* - * Register a callback function for linux proc filesystem - */ -static int -IFX_MEI_InitProcFS (int num) -{ - struct proc_dir_entry *entry; - int i ; - DSL_DEV_Device_t *pDev; - reg_entry_t regs_temp[PROC_ITEMS] = { - /* flag, name, description } */ - {NULL, "arcmsgav", "arc to mei message ", 0}, - {NULL, "cmv_reply", "cmv needs reply", 0}, - {NULL, "cmv_waiting", "waiting for cmv reply from arc", 0}, - {NULL, "modem_ready_cnt", "ARC to MEI indicator count", 0}, - {NULL, "cmv_count", "MEI to ARC CMVs", 0}, - {NULL, "reply_count", "ARC to MEI Reply", 0}, - {NULL, "Recent_indicator", "most recent indicator", 0}, - {NULL, "fw_version", "Firmware Version", 0}, - {NULL, "fw_date", "Firmware Date", 0}, - {NULL, "meminfo", "Memory Allocation Information", 0}, - {NULL, "version", "MEI version information", 0}, - }; - - pDev = &dsl_devices[num]; - if (pDev == NULL) - return -ENOMEM; - - regs_temp[0].flag = &(DSL_DEV_PRIVATE(pDev)->arcmsgav); - regs_temp[1].flag = &(DSL_DEV_PRIVATE(pDev)->cmv_reply); - regs_temp[2].flag = &(DSL_DEV_PRIVATE(pDev)->cmv_waiting); - regs_temp[3].flag = &(DSL_DEV_PRIVATE(pDev)->modem_ready_cnt); - regs_temp[4].flag = &(DSL_DEV_PRIVATE(pDev)->cmv_count); - regs_temp[5].flag = &(DSL_DEV_PRIVATE(pDev)->reply_count); - regs_temp[6].flag = (int *) &(DSL_DEV_PRIVATE(pDev)->Recent_indicator); - - memcpy ((char *) regs[num], (char *) regs_temp, sizeof (regs_temp)); - // procfs - meidir = proc_mkdir (MEI_DIRNAME, NULL); - if (meidir == NULL) { - IFX_MEI_EMSG ("Failed to create /proc/%s\n", MEI_DIRNAME); - return (-ENOMEM); - } - - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - entry = create_proc_entry (regs[num][i].name, - S_IWUSR | S_IRUSR | S_IRGRP | - S_IROTH, meidir); - if (entry) { - regs[num][i].low_ino = entry->low_ino; - entry->proc_fops = &IFX_MEI_ProcOperations; - } - else { - IFX_MEI_EMSG ("Failed to create /proc/%s/%s\n", MEI_DIRNAME, regs[num][i].name); - return (-ENOMEM); - } - } - return 0; -} - -/* - * Reading function for linux proc filesystem - */ -static int -IFX_MEI_ProcRead (struct file *file, char *buf, size_t nbytes, loff_t * ppos) -{ - int i_ino = (file->f_dentry->d_inode)->i_ino; - char *p = buf; - int i; - int num; - reg_entry_t *entry = NULL; - DSL_DEV_Device_t *pDev = NULL; - DSL_DEV_WinHost_Message_t m; - - for (num = 0; num < BSP_MAX_DEVICES; num++) { - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - if (regs[num][i].low_ino == (unsigned short)i_ino) { - entry = ®s[num][i]; - pDev = &dsl_devices[num]; - break; - } - } - } - if (entry == NULL) - return -EINVAL; - else if (strcmp(entry->name, "meminfo") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - p += sprintf (p, "No Address Size\n"); - for (i = 0; i < MAX_BAR_REGISTERS; i++) { - p += sprintf (p, "BAR[%02d] Addr:0x%08X Size:%lu\n", - i, (u32) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[i].address, - DSL_DEV_PRIVATE(pDev)-> adsl_mem_info[i].size); - //printk( "BAR[%02d] Addr:0x%08X Size:%d\n",i,adsl_mem_info[i].address,adsl_mem_info[i].size); - } - *ppos += (p - buf); - } else if (strcmp(entry->name, "fw_version") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - if (DSL_DEV_PRIVATE(pDev)->modem_ready_cnt < 1) - return -EAGAIN; - //major:bits 0-7 - //minor:bits 8-15 - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 54, 0, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - p += sprintf(p, "FW Version: %d.%d.", m.msg.RxMessage[4] & 0xFF, (m.msg.RxMessage[4] >> 8) & 0xFF); - //sub_version:bits 4-7 - //int_version:bits 0-3 - //spl_appl:bits 8-13 - //rel_state:bits 14-15 - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 54, 1, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - p += sprintf(p, "%d.%d.%d.%d\n", - (m.msg.RxMessage[4] >> 4) & 0xF, m.msg.RxMessage[4] & 0xF, - (m.msg.RxMessage[4] >> 14) & 3, (m.msg.RxMessage[4] >> 8) & 0x3F); - *ppos += (p - buf); - } else if (strcmp(entry->name, "fw_date") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - if (DSL_DEV_PRIVATE(pDev)->modem_ready_cnt < 1) - return -EAGAIN; - - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 55, 0, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - /* Day/Month */ - p += sprintf(p, "FW Date: %d.%d.", m.msg.RxMessage[4] & 0xFF, (m.msg.RxMessage[4] >> 8) & 0xFF); - - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 55, 2, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - /* Year */ - p += sprintf(p, "%d ", m.msg.RxMessage[4]); - - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 55, 1, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - /* Hour:Minute */ - p += sprintf(p, "%d:%d\n", (m.msg.RxMessage[4] >> 8) & 0xFF, m.msg.RxMessage[4] & 0xFF); - - *ppos += (p - buf); - } else if (strcmp(entry->name, "version") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - p += sprintf (p, "IFX MEI V%ld.%ld.%ld\n", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision); - - *ppos += (p - buf); - } else if (entry->flag != (int *) DSL_DEV_PRIVATE(pDev)->Recent_indicator) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; // indicates end of file - p += sprintf (p, "0x%08X\n\n", *(entry->flag)); - *ppos += (p - buf); - if ((p - buf) > nbytes) /* Assume output can be read at one time */ - return -EINVAL; - } else { - if ((int) (*ppos) / ((int) 7) == 16) - return 0; // indicate end of the message - p += sprintf (p, "0x%04X\n\n", *(((u16 *) (entry->flag)) + (int) (*ppos) / ((int) 7))); - *ppos += (p - buf); - } - return p - buf; -} - -/* - * Writing function for linux proc filesystem - */ -static ssize_t -IFX_MEI_ProcWrite (struct file *file, const char *buffer, size_t count, loff_t * ppos) -{ - int i_ino = (file->f_dentry->d_inode)->i_ino; - reg_entry_t *current_reg = NULL; - int i = 0; - int num = 0; - unsigned long newRegValue = 0; - char *endp = NULL; - DSL_DEV_Device_t *pDev = NULL; - - for (num = 0; num < BSP_MAX_DEVICES; num++) { - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - if (regs[num][i].low_ino == i_ino) { - current_reg = ®s[num][i]; - pDev = &dsl_devices[num]; - break; - } - } - } - if ((current_reg == NULL) - || (current_reg->flag == - (int *) DSL_DEV_PRIVATE(pDev)-> - Recent_indicator)) - return -EINVAL; - - newRegValue = simple_strtoul (buffer, &endp, 0); - *(current_reg->flag) = (int) newRegValue; - return (count + endp - buffer); -} -#endif //CONFIG_PROC_FS - static int adsl_dummy_ledcallback(void) { return 0; @@ -2962,13 +2717,12 @@ EXPORT_SYMBOL(ifx_mei_atm_showtime_check); /* * Writing function for linux proc filesystem */ -int __init -IFX_MEI_ModuleInit (void) +static int __devinit ltq_mei_probe(struct platform_device *pdev) { int i = 0; static struct class *dsl_class; - pr_info("IFX MEI Version %ld.%02ld.%02ld", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision); + pr_info("IFX MEI Version %ld.%02ld.%02ld\n", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision); for (i = 0; i < BSP_MAX_DEVICES; i++) { if (IFX_MEI_InitDevice (i) != 0) { @@ -2976,9 +2730,6 @@ IFX_MEI_ModuleInit (void) return -EIO; } IFX_MEI_InitDevNode (i); -#ifdef CONFIG_PROC_FS - IFX_MEI_InitProcFS (i); -#endif } for (i = 0; i <= DSL_BSP_CB_LAST ; i++) dsl_bsp_event_callback[i].function = NULL; @@ -2992,29 +2743,40 @@ IFX_MEI_ModuleInit (void) return 0; } -void __exit -IFX_MEI_ModuleExit (void) +static int __devexit ltq_mei_remove(struct platform_device *pdev) { int i = 0; int num; for (num = 0; num < BSP_MAX_DEVICES; num++) { IFX_MEI_CleanUpDevNode (num); -#ifdef CONFIG_PROC_FS - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - remove_proc_entry (regs[num][i].name, meidir); - } -#endif } - remove_proc_entry (MEI_DIRNAME, NULL); for (i = 0; i < BSP_MAX_DEVICES; i++) { for (i = 0; i < BSP_MAX_DEVICES; i++) { IFX_MEI_ExitDevice (i); } } + return 0; } +static const struct of_device_id ltq_mei_match[] = { + { .compatible = "lantiq,mei-xway"}, + {}, +}; + +static struct platform_driver ltq_mei_driver = { + .probe = ltq_mei_probe, + .remove = __devexit_p(ltq_mei_remove), + .driver = { + .name = "lantiq,mei-xway", + .owner = THIS_MODULE, + .of_match_table = ltq_mei_match, + }, +}; + +module_platform_driver(ltq_mei_driver); + /* export function for DSL Driver */ /* The functions of MEI_DriverHandleGet and MEI_DriverHandleDelete are @@ -3040,7 +2802,4 @@ EXPORT_SYMBOL (DSL_BSP_SendCMV); EXPORT_SYMBOL (DSL_BSP_EventCBRegister); EXPORT_SYMBOL (DSL_BSP_EventCBUnregister); -module_init (IFX_MEI_ModuleInit); -module_exit (IFX_MEI_ModuleExit); - MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/system/ltq-dsl/Config.in b/package/platform/lantiq/ltq-adsl/Config.in index 6d9caf4419..6d9caf4419 100644 --- a/package/system/ltq-dsl/Config.in +++ b/package/platform/lantiq/ltq-adsl/Config.in diff --git a/package/system/ltq-dsl/Makefile b/package/platform/lantiq/ltq-adsl/Makefile index aa8106aeae..6a0daa25c9 100644 --- a/package/system/ltq-dsl/Makefile +++ b/package/platform/lantiq/ltq-adsl/Makefile @@ -8,9 +8,9 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_NAME:=ltq-dsl +PKG_NAME:=ltq-adsl PKG_VERSION:=3.24.4.4 -PKG_RELEASE:=4 +PKG_RELEASE:=1 PKG_SOURCE:=drv_dsl_cpe_api_danube-$(PKG_VERSION).tar.gz PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-dsl-$(BUILD_VARIANT)/drv_dsl_cpe_api-$(PKG_VERSION) PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/ @@ -19,23 +19,21 @@ PKG_MAINTAINER:=John Crispin <blogic@openwrt.org> include $(INCLUDE_DIR)/package.mk -define KernelPackage/ltq-dsl-template +define KernelPackage/ltq-adsl-template SECTION:=sys CATEGORY:=Kernel modules SUBMENU:=Network Devices - TITLE:=Lantiq dsl driver for $(1) + TITLE:=adsl driver for $(1) URL:=http://www.lantiq.com/ VARIANT:=$(1) - DEPENDS:=@(TARGET_lantiq_$(1)||TARGET_lantiq_$(2)) +kmod-atm - FILES:=$(PKG_BUILD_DIR)/src/mei/lantiq_mei.ko \ - $(PKG_BUILD_DIR)/src/drv_dsl_cpe_api.ko \ - $(PKG_BUILD_DIR)/src/mei/lantiq_atm.ko - AUTOLOAD:=$(call AutoLoad,50,lantiq_mei drv_dsl_cpe_api lantiq_atm) + DEPENDS:=@TARGET_lantiq_$(2) +kmod-ltq-adsl-$(1)-mei + FILES:=$(PKG_BUILD_DIR)/src/drv_dsl_cpe_api.ko + AUTOLOAD:=$(call AutoLoad,51,drv_dsl_cpe_api) endef -KernelPackage/ltq-dsl-danube=$(call KernelPackage/ltq-dsl-template,danube,xway) -KernelPackage/ltq-dsl-ar9=$(call KernelPackage/ltq-dsl-template,ar9,xway) -KernelPackage/ltq-dsl-ase=$(call KernelPackage/ltq-dsl-template,ase,ase) +KernelPackage/ltq-adsl-danube=$(call KernelPackage/ltq-adsl-template,danube,xway) +KernelPackage/ltq-adsl-ar9=$(call KernelPackage/ltq-adsl-template,ar9,xway) +KernelPackage/ltq-adsl-ase=$(call KernelPackage/ltq-adsl-template,ase,ase) define KernelPackage/ltq-dsl/config source "$(SOURCE)/Config.in" @@ -83,39 +81,16 @@ endif EXTRA_CFLAGS = -fno-pic -mno-abicalls -mlong-calls -G 0 -define Build/Prepare - $(PKG_UNPACK) - $(Build/Patch) - $(INSTALL_DIR) $(PKG_BUILD_DIR)/src/mei/ - $(CP) ./src/* $(PKG_BUILD_DIR)/src/mei/ -endef - define Build/Configure (cd $(PKG_BUILD_DIR); aclocal && autoconf && automake) $(call Build/Configure/Default) endef -define Build/Compile - cd $(LINUX_DIR); \ - ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \ - $(MAKE) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR)/src/mei/ V=1 modules - $(call Build/Compile/Default) -endef - define Build/InstallDev - $(INSTALL_DIR) $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_ioctl.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_adslmib.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_adslmib_ioctl.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_g997.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_types.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_pm.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_error.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_danube_ctx.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_cmv_danube.h $(1)/usr/include + $(INSTALL_DIR) $(1)/usr/include/adsl + $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_*.h $(1)/usr/include/adsl/ endef -$(eval $(call KernelPackage,ltq-dsl-danube)) -$(eval $(call KernelPackage,ltq-dsl-ase)) -$(eval $(call KernelPackage,ltq-dsl-ar9)) +$(eval $(call KernelPackage,ltq-adsl-danube)) +$(eval $(call KernelPackage,ltq-adsl-ase)) +$(eval $(call KernelPackage,ltq-adsl-ar9)) diff --git a/package/platform/lantiq/ltq-adsl/patches/100-dsl_compat.patch b/package/platform/lantiq/ltq-adsl/patches/100-dsl_compat.patch new file mode 100644 index 0000000000..f2ed230bd0 --- /dev/null +++ b/package/platform/lantiq/ltq-adsl/patches/100-dsl_compat.patch @@ -0,0 +1,1065 @@ +Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h +=================================================================== +--- drv_dsl_cpe_api-3.24.4.4.orig/src/include/drv_dsl_cpe_device_danube.h 2009-05-12 20:02:16.000000000 +0200 ++++ drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h 2012-11-29 19:47:21.060210322 +0100 +@@ -24,7 +24,7 @@ + #include "drv_dsl_cpe_simulator_danube.h" + #else + /* Include for the low level driver interface header file */ +-#include "asm/ifx/ifx_mei_bsp.h" ++#include "ifxmips_mei_interface.h" + #endif /* defined(DSL_CPE_SIMULATOR_DRIVER) && defined(WIN32)*/ + + #define DSL_MAX_LINE_NUMBER 1 +Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c +=================================================================== +--- drv_dsl_cpe_api-3.24.4.4.orig/src/common/drv_dsl_cpe_os_linux.c 2009-07-13 11:33:43.000000000 +0200 ++++ drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c 2012-11-29 19:46:32.700209112 +0100 +@@ -11,6 +11,7 @@ + #ifdef __LINUX__ + + #define DSL_INTERN ++#include <linux/device.h> + + #include "drv_dsl_cpe_api.h" + #include "drv_dsl_cpe_api_ioctl.h" +@@ -34,9 +35,13 @@ + static DSL_ssize_t DSL_DRV_Write(DSL_DRV_file_t *pFile, const DSL_char_t * pBuf, + DSL_DRV_size_t nSize, DSL_DRV_offset_t * pLoff); + ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) + static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_inode_t * pINode, DSL_DRV_file_t * pFile, + DSL_uint_t nCommand, unsigned long nArg); +- ++#else ++static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_file_t * pFile, ++ DSL_uint_t nCommand, unsigned long nArg); ++#endif + static int DSL_DRV_Open(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil); + + static int DSL_DRV_Release(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil); +@@ -72,7 +77,11 @@ + open: DSL_DRV_Open, + release: DSL_DRV_Release, + write: DSL_DRV_Write, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) + ioctl: DSL_DRV_Ioctls, ++#else ++ unlocked_ioctl: DSL_DRV_Ioctls, ++#endif + poll: DSL_DRV_Poll + }; + #else +@@ -168,10 +177,17 @@ + \return Success or failure. + \ingroup Internal + */ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) + static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_inode_t * pINode, + DSL_DRV_file_t * pFile, + DSL_uint_t nCommand, + unsigned long nArg) ++#else ++static DSL_int_t DSL_DRV_Ioctls( ++ DSL_DRV_file_t * pFile, ++ DSL_uint_t nCommand, ++ unsigned long nArg) ++#endif + { + DSL_int_t nErr=0; + DSL_boolean_t bIsInKernel; +@@ -216,16 +232,7 @@ + } + } + } +- +- if (pINode == DSL_NULL) +- { +- bIsInKernel = DSL_TRUE; +- } +- else +- { +- bIsInKernel = DSL_FALSE; +- } +- ++ bIsInKernel = DSL_FALSE; + if ( (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API) || + (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API_G997) || + (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API_PM) || +@@ -1058,6 +1065,7 @@ + /* Entry point of driver */ + int __init DSL_ModuleInit(void) + { ++ struct class *dsl_class; + DSL_int_t i; + + printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF, +@@ -1104,7 +1112,8 @@ + } + + DSL_DRV_DevNodeInit(); +- ++ dsl_class = class_create(THIS_MODULE, "dsl_cpe_api"); ++ device_create(dsl_class, NULL, MKDEV(DRV_DSL_CPE_API_DEV_MAJOR, 0), NULL, "dsl_cpe_api"); + return 0; + } + +Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_os_linux.h +=================================================================== +--- drv_dsl_cpe_api-3.24.4.4.orig/src/include/drv_dsl_cpe_os_linux.h 2009-07-03 17:04:51.000000000 +0200 ++++ drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_os_linux.h 2012-11-29 19:47:23.092210377 +0100 +@@ -17,17 +17,17 @@ + #endif + + #include <asm/ioctl.h> +-#include <linux/autoconf.h> ++#include <generated/autoconf.h> + #include <linux/module.h> + #include <linux/kernel.h> + #include <linux/init.h> + #include <linux/ctype.h> + #include <linux/version.h> + #include <linux/spinlock.h> +- ++#include <linux/sched.h> + + #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) +- #include <linux/utsrelease.h> ++ #include <generated/utsrelease.h> + #endif + + #include <linux/types.h> +Index: drv_dsl_cpe_api-3.24.4.4/src/ifxmips_mei_interface.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ drv_dsl_cpe_api-3.24.4.4/src/ifxmips_mei_interface.h 2012-11-29 19:47:54.972211177 +0100 +@@ -0,0 +1,702 @@ ++/****************************************************************************** ++ ++ Copyright (c) 2009 ++ Infineon Technologies AG ++ Am Campeon 1-12; 81726 Munich, Germany ++ ++ For licensing information, see the file 'LICENSE' in the root folder of ++ this software module. ++ ++******************************************************************************/ ++ ++#ifndef IFXMIPS_MEI_H ++#define IFXMIPS_MEI_H ++ ++//#define CONFIG_AMAZON_SE 1 ++//#define CONFIG_DANUBE 1 ++//#define CONFIG_AR9 1 ++ ++#if !defined(CONFIG_DANUBE) && !defined(CONFIG_AMAZON_SE) && !defined(CONFIG_AR9) && !defined(CONFIG_VR9) ++#error Platform undefined!!! ++#endif ++ ++#ifdef IFX_MEI_BSP ++/** This is the character datatype. */ ++typedef char DSL_char_t; ++/** This is the unsigned 8-bit datatype. */ ++typedef unsigned char DSL_uint8_t; ++/** This is the signed 8-bit datatype. */ ++typedef signed char DSL_int8_t; ++/** This is the unsigned 16-bit datatype. */ ++typedef unsigned short DSL_uint16_t; ++/** This is the signed 16-bit datatype. */ ++typedef signed short DSL_int16_t; ++/** This is the unsigned 32-bit datatype. */ ++typedef unsigned long DSL_uint32_t; ++/** This is the signed 32-bit datatype. */ ++typedef signed long DSL_int32_t; ++/** This is the float datatype. */ ++typedef float DSL_float_t; ++/** This is the void datatype. */ ++typedef void DSL_void_t; ++/** integer type, width is depending on processor arch */ ++typedef int DSL_int_t; ++/** unsigned integer type, width is depending on processor arch */ ++typedef unsigned int DSL_uint_t; ++typedef struct file DSL_DRV_file_t; ++typedef struct inode DSL_DRV_inode_t; ++ ++/** ++ * Defines all possible CMV groups ++ * */ ++typedef enum { ++ DSL_CMV_GROUP_CNTL = 1, ++ DSL_CMV_GROUP_STAT = 2, ++ DSL_CMV_GROUP_INFO = 3, ++ DSL_CMV_GROUP_TEST = 4, ++ DSL_CMV_GROUP_OPTN = 5, ++ DSL_CMV_GROUP_RATE = 6, ++ DSL_CMV_GROUP_PLAM = 7, ++ DSL_CMV_GROUP_CNFG = 8 ++} DSL_CmvGroup_t; ++/** ++ * Defines all opcode types ++ * */ ++typedef enum { ++ H2D_CMV_READ = 0x00, ++ H2D_CMV_WRITE = 0x04, ++ H2D_CMV_INDICATE_REPLY = 0x10, ++ H2D_ERROR_OPCODE_UNKNOWN =0x20, ++ H2D_ERROR_CMV_UNKNOWN =0x30, ++ ++ D2H_CMV_READ_REPLY =0x01, ++ D2H_CMV_WRITE_REPLY = 0x05, ++ D2H_CMV_INDICATE = 0x11, ++ D2H_ERROR_OPCODE_UNKNOWN = 0x21, ++ D2H_ERROR_CMV_UNKNOWN = 0x31, ++ D2H_ERROR_CMV_READ_NOT_AVAILABLE = 0x41, ++ D2H_ERROR_CMV_WRITE_ONLY = 0x51, ++ D2H_ERROR_CMV_READ_ONLY = 0x61, ++ ++ H2D_DEBUG_READ_DM = 0x02, ++ H2D_DEBUG_READ_PM = 0x06, ++ H2D_DEBUG_WRITE_DM = 0x0a, ++ H2D_DEBUG_WRITE_PM = 0x0e, ++ ++ D2H_DEBUG_READ_DM_REPLY = 0x03, ++ D2H_DEBUG_READ_FM_REPLY = 0x07, ++ D2H_DEBUG_WRITE_DM_REPLY = 0x0b, ++ D2H_DEBUG_WRITE_FM_REPLY = 0x0f, ++ D2H_ERROR_ADDR_UNKNOWN = 0x33, ++ ++ D2H_AUTONOMOUS_MODEM_READY_MSG = 0xf1 ++} DSL_CmvOpcode_t; ++ ++/* mutex macros */ ++#define MEI_MUTEX_INIT(id,flag) \ ++ sema_init(&id,flag) ++#define MEI_MUTEX_LOCK(id) \ ++ down_interruptible(&id) ++#define MEI_MUTEX_UNLOCK(id) \ ++ up(&id) ++#define MEI_WAIT(ms) \ ++ {\ ++ set_current_state(TASK_INTERRUPTIBLE);\ ++ schedule_timeout(ms);\ ++ } ++#define MEI_INIT_WAKELIST(name,queue) \ ++ init_waitqueue_head(&queue) ++ ++/* wait for an event, timeout is measured in ms */ ++#define MEI_WAIT_EVENT_TIMEOUT(ev,timeout)\ ++ interruptible_sleep_on_timeout(&ev,timeout * HZ / 1000) ++#define MEI_WAKEUP_EVENT(ev)\ ++ wake_up_interruptible(&ev) ++#endif /* IFX_MEI_BSP */ ++ ++/*** Register address offsets, relative to MEI_SPACE_ADDRESS ***/ ++#define ME_DX_DATA (0x0000) ++#define ME_VERSION (0x0004) ++#define ME_ARC_GP_STAT (0x0008) ++#define ME_DX_STAT (0x000C) ++#define ME_DX_AD (0x0010) ++#define ME_DX_MWS (0x0014) ++#define ME_ME2ARC_INT (0x0018) ++#define ME_ARC2ME_STAT (0x001C) ++#define ME_ARC2ME_MASK (0x0020) ++#define ME_DBG_WR_AD (0x0024) ++#define ME_DBG_RD_AD (0x0028) ++#define ME_DBG_DATA (0x002C) ++#define ME_DBG_DECODE (0x0030) ++#define ME_CONFIG (0x0034) ++#define ME_RST_CTRL (0x0038) ++#define ME_DBG_MASTER (0x003C) ++#define ME_CLK_CTRL (0x0040) ++#define ME_BIST_CTRL (0x0044) ++#define ME_BIST_STAT (0x0048) ++#define ME_XDATA_BASE_SH (0x004c) ++#define ME_XDATA_BASE (0x0050) ++#define ME_XMEM_BAR_BASE (0x0054) ++#define ME_XMEM_BAR0 (0x0054) ++#define ME_XMEM_BAR1 (0x0058) ++#define ME_XMEM_BAR2 (0x005C) ++#define ME_XMEM_BAR3 (0x0060) ++#define ME_XMEM_BAR4 (0x0064) ++#define ME_XMEM_BAR5 (0x0068) ++#define ME_XMEM_BAR6 (0x006C) ++#define ME_XMEM_BAR7 (0x0070) ++#define ME_XMEM_BAR8 (0x0074) ++#define ME_XMEM_BAR9 (0x0078) ++#define ME_XMEM_BAR10 (0x007C) ++#define ME_XMEM_BAR11 (0x0080) ++#define ME_XMEM_BAR12 (0x0084) ++#define ME_XMEM_BAR13 (0x0088) ++#define ME_XMEM_BAR14 (0x008C) ++#define ME_XMEM_BAR15 (0x0090) ++#define ME_XMEM_BAR16 (0x0094) ++ ++#define WHILE_DELAY 20000 ++/* ++** Define where in ME Processor's memory map the Stratify chip lives ++*/ ++ ++#define MAXSWAPSIZE (8 * 1024) //8k *(32bits) ++ ++// Mailboxes ++#define MSG_LENGTH 16 // x16 bits ++#define YES_REPLY 1 ++#define NO_REPLY 0 ++ ++#define CMV_TIMEOUT 1000 //jiffies ++ ++// Block size per BAR ++#define SDRAM_SEGMENT_SIZE (64*1024) ++// Number of Bar registers ++#define MAX_BAR_REGISTERS (17) ++ ++#define XDATA_REGISTER (15) ++ ++// ARC register addresss ++#define ARC_STATUS 0x0 ++#define ARC_LP_START 0x2 ++#define ARC_LP_END 0x3 ++#define ARC_DEBUG 0x5 ++#define ARC_INT_MASK 0x10A ++ ++#define IRAM0_BASE (0x00000) ++#define IRAM1_BASE (0x04000) ++#if defined(CONFIG_DANUBE) ++#define BRAM_BASE (0x0A000) ++#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9) ++#define BRAM_BASE (0x08000) ++#endif ++#define XRAM_BASE (0x18000) ++#define YRAM_BASE (0x1A000) ++#define EXT_MEM_BASE (0x80000) ++#define ARC_GPIO_CTRL (0xC030) ++#define ARC_GPIO_DATA (0xC034) ++ ++#define IRAM0_SIZE (16*1024) ++#define IRAM1_SIZE (16*1024) ++#define BRAM_SIZE (12*1024) ++#define XRAM_SIZE (8*1024) ++#define YRAM_SIZE (8*1024) ++#define EXT_MEM_SIZE (1536*1024) ++ ++#define ADSL_BASE (0x20000) ++#define CRI_BASE (ADSL_BASE + 0x11F00) ++#define CRI_CCR0 (CRI_BASE + 0x00) ++#define CRI_RST (CRI_BASE + 0x04*4) ++#define ADSL_DILV_BASE (ADSL_BASE+0x20000) ++ ++// ++#define IRAM0_ADDR_BIT_MASK 0xFFF ++#define IRAM1_ADDR_BIT_MASK 0xFFF ++#define BRAM_ADDR_BIT_MASK 0xFFF ++#define RX_DILV_ADDR_BIT_MASK 0x1FFF ++ ++/*** Bit definitions ***/ ++#define ARC_AUX_HALT (1 << 25) ++#define ARC_DEBUG_HALT (1 << 1) ++#define FALSE 0 ++#define TRUE 1 ++#define BIT0 (1<<0) ++#define BIT1 (1<<1) ++#define BIT2 (1<<2) ++#define BIT3 (1<<3) ++#define BIT4 (1<<4) ++#define BIT5 (1<<5) ++#define BIT6 (1<<6) ++#define BIT7 (1<<7) ++#define BIT8 (1<<8) ++#define BIT9 (1<<9) ++#define BIT10 (1<<10) ++#define BIT11 (1<<11) ++#define BIT12 (1<<12) ++#define BIT13 (1<<13) ++#define BIT14 (1<<14) ++#define BIT15 (1<<15) ++#define BIT16 (1<<16) ++#define BIT17 (1<<17) ++#define BIT18 (1<<18) ++#define BIT19 (1<<19) ++#define BIT20 (1<<20) ++#define BIT21 (1<<21) ++#define BIT22 (1<<22) ++#define BIT23 (1<<23) ++#define BIT24 (1<<24) ++#define BIT25 (1<<25) ++#define BIT26 (1<<26) ++#define BIT27 (1<<27) ++#define BIT28 (1<<28) ++#define BIT29 (1<<29) ++#define BIT30 (1<<30) ++#define BIT31 (1<<31) ++ ++// CRI_CCR0 Register definitions ++#define CLK_2M_MODE_ENABLE BIT6 ++#define ACL_CLK_MODE_ENABLE BIT4 ++#define FDF_CLK_MODE_ENABLE BIT2 ++#define STM_CLK_MODE_ENABLE BIT0 ++ ++// CRI_RST Register definitions ++#define FDF_SRST BIT3 ++#define MTE_SRST BIT2 ++#define FCI_SRST BIT1 ++#define AAI_SRST BIT0 ++ ++// MEI_TO_ARC_INTERRUPT Register definitions ++#define MEI_TO_ARC_INT1 BIT3 ++#define MEI_TO_ARC_INT0 BIT2 ++#define MEI_TO_ARC_CS_DONE BIT1 //need to check ++#define MEI_TO_ARC_MSGAV BIT0 ++ ++// ARC_TO_MEI_INTERRUPT Register definitions ++#define ARC_TO_MEI_INT1 BIT8 ++#define ARC_TO_MEI_INT0 BIT7 ++#define ARC_TO_MEI_CS_REQ BIT6 ++#define ARC_TO_MEI_DBG_DONE BIT5 ++#define ARC_TO_MEI_MSGACK BIT4 ++#define ARC_TO_MEI_NO_ACCESS BIT3 ++#define ARC_TO_MEI_CHECK_AAITX BIT2 ++#define ARC_TO_MEI_CHECK_AAIRX BIT1 ++#define ARC_TO_MEI_MSGAV BIT0 ++ ++// ARC_TO_MEI_INTERRUPT_MASK Register definitions ++#define GP_INT1_EN BIT8 ++#define GP_INT0_EN BIT7 ++#define CS_REQ_EN BIT6 ++#define DBG_DONE_EN BIT5 ++#define MSGACK_EN BIT4 ++#define NO_ACC_EN BIT3 ++#define AAITX_EN BIT2 ++#define AAIRX_EN BIT1 ++#define MSGAV_EN BIT0 ++ ++#define MEI_SOFT_RESET BIT0 ++ ++#define HOST_MSTR BIT0 ++ ++#define JTAG_MASTER_MODE 0x0 ++#define MEI_MASTER_MODE HOST_MSTR ++ ++// MEI_DEBUG_DECODE Register definitions ++#define MEI_DEBUG_DEC_MASK (0x3) ++#define MEI_DEBUG_DEC_AUX_MASK (0x0) ++#define ME_DBG_DECODE_DMP1_MASK (0x1) ++#define MEI_DEBUG_DEC_DMP2_MASK (0x2) ++#define MEI_DEBUG_DEC_CORE_MASK (0x3) ++ ++#define AUX_STATUS (0x0) ++#define AUX_ARC_GPIO_CTRL (0x10C) ++#define AUX_ARC_GPIO_DATA (0x10D) ++// ARC_TO_MEI_MAILBOX[11] is a special location used to indicate ++// page swap requests. ++#if defined(CONFIG_DANUBE) ++#define OMBOX_BASE 0xDF80 ++#define ARC_TO_MEI_MAILBOX 0xDFA0 ++#define IMBOX_BASE 0xDFC0 ++#define MEI_TO_ARC_MAILBOX 0xDFD0 ++#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9) ++#define OMBOX_BASE 0xAF80 ++#define ARC_TO_MEI_MAILBOX 0xAFA0 ++#define IMBOX_BASE 0xAFC0 ++#define MEI_TO_ARC_MAILBOX 0xAFD0 ++#endif ++ ++#define MEI_TO_ARC_MAILBOXR (MEI_TO_ARC_MAILBOX + 0x2C) ++#define ARC_MEI_MAILBOXR (ARC_TO_MEI_MAILBOX + 0x2C) ++#define OMBOX1 (OMBOX_BASE+0x4) ++ ++// Codeswap request messages are indicated by setting BIT31 ++#define OMB_CODESWAP_MESSAGE_MSG_TYPE_MASK (0x80000000) ++ ++// Clear Eoc messages received are indicated by setting BIT17 ++#define OMB_CLEAREOC_INTERRUPT_CODE (0x00020000) ++#define OMB_REBOOT_INTERRUPT_CODE (1 << 18) ++ ++/* ++** Swap page header ++*/ ++// Page must be loaded at boot time if size field has BIT31 set ++#define BOOT_FLAG (BIT31) ++#define BOOT_FLAG_MASK ~BOOT_FLAG ++ ++#define FREE_RELOAD 1 ++#define FREE_SHOWTIME 2 ++#define FREE_ALL 3 ++ ++// marcos ++#define IFX_MEI_WRITE_REGISTER_L(data,addr) *((volatile u32*)(addr)) = (u32)(data) ++#define IFX_MEI_READ_REGISTER_L(addr) (*((volatile u32*)(addr))) ++#define SET_BIT(reg, mask) reg |= (mask) ++#define CLEAR_BIT(reg, mask) reg &= (~mask) ++#define CLEAR_BITS(reg, mask) CLEAR_BIT(reg, mask) ++//#define SET_BITS(reg, mask) SET_BIT(reg, mask) ++#define SET_BITFIELD(reg, mask, off, val) {reg &= (~mask); reg |= (val << off);} ++ ++#define ALIGN_SIZE ( 1L<<10 ) //1K size align ++#define MEM_ALIGN(addr) (((addr) + ALIGN_SIZE - 1) & ~ (ALIGN_SIZE -1) ) ++ ++// swap marco ++#define MEI_HALF_WORD_SWAP(data) {data = ((data & 0xffff)<<16) + ((data & 0xffff0000)>>16);} ++#define MEI_BYTE_SWAP(data) {data = ((data & 0xff)<<24) + ((data & 0xff00)<<8)+ ((data & 0xff0000)>>8)+ ((data & 0xff000000)>>24);} ++ ++ ++#ifdef CONFIG_PROC_FS ++typedef struct reg_entry ++{ ++ int *flag; ++ char name[30]; /* big enough to hold names */ ++ char description[100]; /* big enough to hold description */ ++ unsigned short low_ino; ++} reg_entry_t; ++#endif ++// Swap page header describes size in 32-bit words, load location, and image offset ++// for program and/or data segments ++typedef struct _arc_swp_page_hdr { ++ u32 p_offset; //Offset bytes of progseg from beginning of image ++ u32 p_dest; //Destination addr of progseg on processor ++ u32 p_size; //Size in 32-bitwords of program segment ++ u32 d_offset; //Offset bytes of dataseg from beginning of image ++ u32 d_dest; //Destination addr of dataseg on processor ++ u32 d_size; //Size in 32-bitwords of data segment ++} ARC_SWP_PAGE_HDR; ++ ++/* ++** Swap image header ++*/ ++#define GET_PROG 0 // Flag used for program mem segment ++#define GET_DATA 1 // Flag used for data mem segment ++ ++// Image header contains size of image, checksum for image, and count of ++// page headers. Following that are 'count' page headers followed by ++// the code and/or data segments to be loaded ++typedef struct _arc_img_hdr { ++ u32 size; // Size of binary image in bytes ++ u32 checksum; // Checksum for image ++ u32 count; // Count of swp pages in image ++ ARC_SWP_PAGE_HDR page[1]; // Should be "count" pages - '1' to make compiler happy ++} ARC_IMG_HDR; ++ ++typedef struct smmu_mem_info { ++ int type; ++ int boot; ++ unsigned long nCopy; ++ unsigned long size; ++ unsigned char *address; ++ unsigned char *org_address; ++} smmu_mem_info_t; ++ ++#ifdef __KERNEL__ ++typedef struct ifx_mei_device_private { ++ int modem_ready; ++ int arcmsgav; ++ int cmv_reply; ++ int cmv_waiting; ++ // Mei to ARC CMV count, reply count, ARC Indicator count ++ int modem_ready_cnt; ++ int cmv_count; ++ int reply_count; ++ unsigned long image_size; ++ int nBar; ++ u16 Recent_indicator[MSG_LENGTH]; ++ ++ u16 CMV_RxMsg[MSG_LENGTH] __attribute__ ((aligned (4))); ++ ++ smmu_mem_info_t adsl_mem_info[MAX_BAR_REGISTERS]; ++ ARC_IMG_HDR *img_hdr; ++ // to wait for arc cmv reply, sleep on wait_queue_arcmsgav; ++ wait_queue_head_t wait_queue_arcmsgav; ++ wait_queue_head_t wait_queue_modemready; ++ struct semaphore mei_cmv_sema; ++} ifx_mei_device_private_t; ++#endif ++typedef struct winhost_message { ++ union { ++ u16 RxMessage[MSG_LENGTH] __attribute__ ((aligned (4))); ++ u16 TxMessage[MSG_LENGTH] __attribute__ ((aligned (4))); ++ } msg; ++} DSL_DEV_WinHost_Message_t; ++/******************************************************************************************************** ++ * DSL CPE API Driver Stack Interface Definitions ++ * *****************************************************************************************************/ ++/** IOCTL codes for bsp driver */ ++#define DSL_IOC_MEI_BSP_MAGIC 's' ++ ++#define DSL_FIO_BSP_DSL_START _IO (DSL_IOC_MEI_BSP_MAGIC, 0) ++#define DSL_FIO_BSP_RUN _IO (DSL_IOC_MEI_BSP_MAGIC, 1) ++#define DSL_FIO_BSP_FREE_RESOURCE _IO (DSL_IOC_MEI_BSP_MAGIC, 2) ++#define DSL_FIO_BSP_RESET _IO (DSL_IOC_MEI_BSP_MAGIC, 3) ++#define DSL_FIO_BSP_REBOOT _IO (DSL_IOC_MEI_BSP_MAGIC, 4) ++#define DSL_FIO_BSP_HALT _IO (DSL_IOC_MEI_BSP_MAGIC, 5) ++#define DSL_FIO_BSP_BOOTDOWNLOAD _IO (DSL_IOC_MEI_BSP_MAGIC, 6) ++#define DSL_FIO_BSP_JTAG_ENABLE _IO (DSL_IOC_MEI_BSP_MAGIC, 7) ++#define DSL_FIO_FREE_RESOURCE _IO (DSL_IOC_MEI_BSP_MAGIC, 8) ++#define DSL_FIO_ARC_MUX_TEST _IO (DSL_IOC_MEI_BSP_MAGIC, 9) ++#define DSL_FIO_BSP_REMOTE _IOW (DSL_IOC_MEI_BSP_MAGIC, 10, u32) ++#define DSL_FIO_BSP_GET_BASE_ADDRESS _IOR (DSL_IOC_MEI_BSP_MAGIC, 11, u32) ++#define DSL_FIO_BSP_IS_MODEM_READY _IOR (DSL_IOC_MEI_BSP_MAGIC, 12, u32) ++#define DSL_FIO_BSP_GET_VERSION _IOR (DSL_IOC_MEI_BSP_MAGIC, 13, DSL_DEV_Version_t) ++#define DSL_FIO_BSP_CMV_WINHOST _IOWR(DSL_IOC_MEI_BSP_MAGIC, 14, DSL_DEV_WinHost_Message_t) ++#define DSL_FIO_BSP_CMV_READ _IOWR(DSL_IOC_MEI_BSP_MAGIC, 15, DSL_DEV_MeiReg_t) ++#define DSL_FIO_BSP_CMV_WRITE _IOW (DSL_IOC_MEI_BSP_MAGIC, 16, DSL_DEV_MeiReg_t) ++#define DSL_FIO_BSP_DEBUG_READ _IOWR(DSL_IOC_MEI_BSP_MAGIC, 17, DSL_DEV_MeiDebug_t) ++#define DSL_FIO_BSP_DEBUG_WRITE _IOWR(DSL_IOC_MEI_BSP_MAGIC, 18, DSL_DEV_MeiDebug_t) ++#define DSL_FIO_BSP_GET_CHIP_INFO _IOR (DSL_IOC_MEI_BSP_MAGIC, 19, DSL_DEV_HwVersion_t) ++ ++#define DSL_DEV_MEIDEBUG_BUFFER_SIZES 512 ++ ++typedef struct DSL_DEV_MeiDebug ++{ ++ DSL_uint32_t iAddress; ++ DSL_uint32_t iCount; ++ DSL_uint32_t buffer[DSL_DEV_MEIDEBUG_BUFFER_SIZES]; ++} DSL_DEV_MeiDebug_t; /* meidebug */ ++ ++/** ++ * Structure is used for debug access only. ++ * Refer to configure option INCLUDE_ADSL_WINHOST_DEBUG */ ++typedef struct struct_meireg ++{ ++ /* ++ * Specifies that address for debug access */ ++ unsigned long iAddress; ++ /* ++ * Specifies the pointer to the data that has to be written or returns a ++ * pointer to the data that has been read out*/ ++ unsigned long iData; ++} DSL_DEV_MeiReg_t; /* meireg */ ++ ++typedef struct DSL_DEV_Device ++{ ++ DSL_int_t nInUse; /* modem state, update by bsp driver, */ ++ DSL_void_t *pPriv; ++ DSL_uint32_t base_address; /* mei base address */ ++ DSL_int_t nIrq[2]; /* irq number */ ++#define IFX_DFEIR 0 ++#define IFX_DYING_GASP 1 ++ DSL_DEV_MeiDebug_t lop_debugwr; /* dying gasp */ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)) ++ struct module *owner; ++#endif ++} DSL_DEV_Device_t; /* ifx_adsl_device_t */ ++ ++#define DSL_DEV_PRIVATE(dev) ((ifx_mei_device_private_t*)(dev->pPriv)) ++ ++typedef struct DSL_DEV_Version /* ifx_adsl_bsp_version */ ++{ ++ unsigned long major; ++ unsigned long minor; ++ unsigned long revision; ++} DSL_DEV_Version_t; /* ifx_adsl_bsp_version_t */ ++ ++typedef struct DSL_DEV_ChipInfo ++{ ++ unsigned long major; ++ unsigned long minor; ++} DSL_DEV_HwVersion_t; ++ ++typedef struct ++{ ++ DSL_uint8_t dummy; ++} DSL_DEV_DeviceConfig_t; ++ ++/** error code definitions */ ++typedef enum DSL_DEV_MeiError ++{ ++ DSL_DEV_MEI_ERR_SUCCESS = 0, ++ DSL_DEV_MEI_ERR_FAILURE = -1, ++ DSL_DEV_MEI_ERR_MAILBOX_FULL = -2, ++ DSL_DEV_MEI_ERR_MAILBOX_EMPTY = -3, ++ DSL_DEV_MEI_ERR_MAILBOX_TIMEOUT = -4 ++} DSL_DEV_MeiError_t; /* MEI_ERROR */ ++ ++typedef enum { ++ DSL_BSP_MEMORY_READ=0, ++ DSL_BSP_MEMORY_WRITE, ++} DSL_BSP_MemoryAccessType_t; /* ifx_adsl_memory_access_type_t */ ++ ++typedef enum ++{ ++ DSL_LED_LINK_ID=0, ++ DSL_LED_DATA_ID ++} DSL_DEV_LedId_t; /* ifx_adsl_led_id_t */ ++ ++typedef enum ++{ ++ DSL_LED_LINK_TYPE=0, ++ DSL_LED_DATA_TYPE ++} DSL_DEV_LedType_t; /* ifx_adsl_led_type_t */ ++ ++typedef enum ++{ ++ DSL_LED_HD_CPU=0, ++ DSL_LED_HD_FW ++} DSL_DEV_LedHandler_t; /* ifx_adsl_led_handler_t */ ++ ++typedef enum { ++ DSL_LED_ON=0, ++ DSL_LED_OFF, ++ DSL_LED_FLASH, ++} DSL_DEV_LedMode_t; /* ifx_adsl_led_mode_t */ ++ ++typedef enum { ++ DSL_CPU_HALT=0, ++ DSL_CPU_RUN, ++ DSL_CPU_RESET, ++} DSL_DEV_CpuMode_t; /* ifx_adsl_cpu_mode_t */ ++ ++#if 0 ++typedef enum { ++ DSL_BSP_EVENT_DYING_GASP = 0, ++ DSL_BSP_EVENT_CEOC_IRQ, ++} DSL_BSP_Event_id_t; /* ifx_adsl_event_id_t */ ++ ++typedef union DSL_BSP_CB_Param ++{ ++ DSL_uint32_t nIrqMessage; ++} DSL_BSP_CB_Param_t; /* ifx_adsl_cbparam_t */ ++ ++typedef struct DSL_BSP_CB_Event ++{ ++ DSL_BSP_Event_id_t nID; ++ DSL_DEV_Device_t *pDev; ++ DSL_BSP_CB_Param_t *pParam; ++} DSL_BSP_CB_Event_t; /* ifx_adsl_cb_event_t */ ++#endif ++ ++/* external functions (from the BSP Driver) */ ++extern DSL_DEV_Device_t* DSL_BSP_DriverHandleGet(int, int); ++extern DSL_int_t DSL_BSP_DriverHandleDelete(DSL_DEV_Device_t *); ++extern DSL_DEV_MeiError_t DSL_BSP_FWDownload(DSL_DEV_Device_t *, const DSL_char_t *, DSL_uint32_t, DSL_int32_t *, DSL_int32_t *); ++extern int DSL_BSP_KernelIoctls(DSL_DEV_Device_t *, unsigned int, unsigned long); ++extern DSL_DEV_MeiError_t DSL_BSP_SendCMV(DSL_DEV_Device_t *, DSL_uint16_t *, DSL_int_t, DSL_uint16_t *); ++extern DSL_DEV_MeiError_t DSL_BSP_AdslLedInit(DSL_DEV_Device_t *, DSL_DEV_LedId_t, DSL_DEV_LedType_t, DSL_DEV_LedHandler_t); ++extern DSL_DEV_MeiError_t DSL_BSP_Showtime(DSL_DEV_Device_t *, DSL_uint32_t, DSL_uint32_t); ++extern int DSL_BSP_ATMLedCBRegister( int (*ifx_adsl_ledcallback)(void)); ++extern DSL_DEV_MeiError_t DSL_BSP_MemoryDebugAccess(DSL_DEV_Device_t *, DSL_BSP_MemoryAccessType_t, DSL_uint32_t, DSL_uint32_t *, DSL_uint32_t); ++extern volatile DSL_DEV_Device_t *adsl_dev; ++ ++/** ++ * Dummy structure by now to show mechanism of extended data that will be ++ * provided within event callback itself. ++ * */ ++typedef struct ++{ ++ /** ++ * Dummy value */ ++ DSL_uint32_t nDummy1; ++} DSL_BSP_CB_Event1DataDummy_t; ++ ++/** ++ * Dummy structure by now to show mechanism of extended data that will be ++ * provided within event callback itself. ++ * */ ++typedef struct ++{ ++ /** ++ * Dummy value */ ++ DSL_uint32_t nDummy2; ++} DSL_BSP_CB_Event2DataDummy_t; ++ ++/** ++ * encapsulate all data structures that are necessary for status event ++ * callbacks. ++ * */ ++typedef union ++{ ++ DSL_BSP_CB_Event1DataDummy_t dataEvent1; ++ DSL_BSP_CB_Event2DataDummy_t dataEvent2; ++} DSL_BSP_CB_DATA_Union_t; ++ ++ ++typedef enum ++{ ++ /** ++ * Informs the upper layer driver (DSL CPE API) about a reboot request from the ++ * firmware. ++ * \note This event does NOT include any additional data. ++ * More detailed information upon reboot reason has to be requested from ++ * upper layer software via CMV (INFO 109) if necessary. */ ++ DSL_BSP_CB_FIRST = 0, ++ DSL_BSP_CB_DYING_GASP, ++ DSL_BSP_CB_CEOC_IRQ, ++ DSL_BSP_CB_FIRMWARE_REBOOT, ++ /** ++ * Delimiter only */ ++ DSL_BSP_CB_LAST ++} DSL_BSP_CB_Type_t; ++ ++/** ++ * Specifies the common event type that has to be used for registering and ++ * signalling of interrupts/autonomous status events from MEI BSP Driver. ++ * ++ * \param pDev ++ * Context pointer from MEI BSP Driver. ++ * ++ * \param IFX_ADSL_BSP_CallbackType_t ++ * Specifies the event callback type (reason of callback). Regrading to the ++ * setting of this value the data which is included in the following union ++ * might have different meanings. ++ * Please refer to the description of the union to get information about the ++ * meaning of the included data. ++ * ++ * \param pData ++ * Data according to \ref DSL_BSP_CB_DATA_Union_t. ++ * If this pointer is NULL there is no additional data available. ++ * ++ * \return depending on event ++ */ ++typedef int (*DSL_BSP_EventCallback_t) ++( ++ DSL_DEV_Device_t *pDev, ++ DSL_BSP_CB_Type_t nCallbackType, ++ DSL_BSP_CB_DATA_Union_t *pData ++); ++ ++typedef struct { ++ DSL_BSP_EventCallback_t function; ++ DSL_BSP_CB_Type_t event; ++ DSL_BSP_CB_DATA_Union_t *pData; ++} DSL_BSP_EventCallBack_t; ++ ++extern int DSL_BSP_EventCBRegister(DSL_BSP_EventCallBack_t *); ++extern int DSL_BSP_EventCBUnregister(DSL_BSP_EventCallBack_t *); ++ ++/** Modem states */ ++#define DSL_DEV_STAT_InitState 0x0000 ++#define DSL_DEV_STAT_ReadyState 0x0001 ++#define DSL_DEV_STAT_FailState 0x0002 ++#define DSL_DEV_STAT_IdleState 0x0003 ++#define DSL_DEV_STAT_QuietState 0x0004 ++#define DSL_DEV_STAT_GhsState 0x0005 ++#define DSL_DEV_STAT_FullInitState 0x0006 ++#define DSL_DEV_STAT_ShowTimeState 0x0007 ++#define DSL_DEV_STAT_FastRetrainState 0x0008 ++#define DSL_DEV_STAT_LoopDiagMode 0x0009 ++#define DSL_DEV_STAT_ShortInit 0x000A /* Bis short initialization */ ++ ++#define DSL_DEV_STAT_CODESWAP_COMPLETE 0x0002 ++ ++#endif //IFXMIPS_MEI_H +--- a/configure.in ++++ b/configure.in +@@ -310,7 +310,7 @@ + AC_ARG_ENABLE(kernelbuild, + AC_HELP_STRING(--enable-kernel-build=x,Set the target kernel build path), + [ +- if test -e $enableval/include/linux/autoconf.h; then ++ if test -e $enableval/include/linux/autoconf.h -o -e $enableval/include/generated/autoconf.h; then + AC_SUBST([KERNEL_BUILD_PATH],[$enableval]) + else + AC_MSG_ERROR([The kernel build directory is not valid or not configured!]) +@@ -333,12 +333,12 @@ + echo Set the lib_ifxos include path $enableval + AC_SUBST([IFXOS_INCLUDE_PATH],[$enableval]) + else +- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH ++ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH + AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) + fi + ], + [ +- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH ++ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH + AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) + ] + ) +@@ -1702,73 +1702,73 @@ + AC_SUBST([DISTCHECK_CONFIGURE_PARAMS],[$CONFIGURE_OPTIONS]) + + AC_CONFIG_COMMANDS_PRE([ +-echo -e "------------------------------------------------------------------------" +-echo -e " Configuration for drv_dsl_cpe_api:" +-echo -e " Configure model type: $DSL_CONFIG_MODEL_TYPE" +-echo -e " Source code location: $srcdir" +-echo -e " Compiler: $CC" +-echo -e " Compiler c-flags: $CFLAGS" +-echo -e " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" +-echo -e " Host System Type: $host" +-echo -e " Install path: $prefix" +-echo -e " Linux kernel include path: $KERNEL_INCL_PATH" +-echo -e " Linux kernel build path: $KERNEL_BUILD_PATH" +-echo -e " Linux kernel architecture: $KERNEL_ARCH" +-echo -e " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" +-echo -e " IFXOS include path: $IFXOS_INCLUDE_PATH" +-echo -e " Driver Include Path $DSL_DRIVER_INCL_PATH" +-echo -e " DSL device: $DSL_DEVICE_NAME" +-echo -e " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" +-echo -e " Channels per line: $DSL_CHANNELS_PER_LINE" +-echo -e " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" +-echo -e " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" +-echo -e " Disable debug prints: $DSL_DEBUG_DISABLE" +-echo -e " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" +-echo -e " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" +-echo -e " Include deprecated functions: $INCLUDE_DEPRECATED" +-echo -e " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" +-echo -e " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" +-echo -e " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" +-echo -e " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" +-echo -e " Include ADSL LED: $INCLUDE_ADSL_LED" +-echo -e " Include CEOC: $INCLUDE_DSL_CEOC" +-echo -e " Include config get support: $INCLUDE_DSL_CONFIG_GET" +-echo -e " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" +-echo -e " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" +-echo -e " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" +-echo -e " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" +-echo -e " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" +-echo -e " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" +-echo -e " Include G997 status: $INCLUDE_DSL_G997_STATUS" +-echo -e " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" +-echo -e " Include DSL Bonding: $INCLUDE_DSL_BONDING" +-echo -e " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" +-echo -e " Include DELT: $INCLUDE_DSL_DELT" +-echo -e " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" +-echo -e " Include PM: $INCLUDE_DSL_PM" +-echo -e " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" +-echo -e " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" +-echo -e " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" +-echo -e " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" +-echo -e " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" +-echo -e " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" +-echo -e " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" +-echo -e " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" +-echo -e " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" +-echo -e " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" +-echo -e " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" +-echo -e " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" +-echo -e " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" +-echo -e " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" +-echo -e " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" +-echo -e " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" +-echo -e " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" +-echo -e "----------------------- deprectated ! ----------------------------------" +-echo -e " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" +-echo -e "" +-echo -e " Settings:" +-echo -e " Configure options: $CONFIGURE_OPTIONS" +-echo -e "------------------------------------------------------------------------" ++echo "------------------------------------------------------------------------" ++echo " Configuration for drv_dsl_cpe_api:" ++echo " Configure model type: $DSL_CONFIG_MODEL_TYPE" ++echo " Source code location: $srcdir" ++echo " Compiler: $CC" ++echo " Compiler c-flags: $CFLAGS" ++echo " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" ++echo " Host System Type: $host" ++echo " Install path: $prefix" ++echo " Linux kernel include path: $KERNEL_INCL_PATH" ++echo " Linux kernel build path: $KERNEL_BUILD_PATH" ++echo " Linux kernel architecture: $KERNEL_ARCH" ++echo " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" ++echo " IFXOS include path: $IFXOS_INCLUDE_PATH" ++echo " Driver Include Path $DSL_DRIVER_INCL_PATH" ++echo " DSL device: $DSL_DEVICE_NAME" ++echo " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" ++echo " Channels per line: $DSL_CHANNELS_PER_LINE" ++echo " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" ++echo " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" ++echo " Disable debug prints: $DSL_DEBUG_DISABLE" ++echo " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" ++echo " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" ++echo " Include deprecated functions: $INCLUDE_DEPRECATED" ++echo " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" ++echo " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" ++echo " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" ++echo " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" ++echo " Include ADSL LED: $INCLUDE_ADSL_LED" ++echo " Include CEOC: $INCLUDE_DSL_CEOC" ++echo " Include config get support: $INCLUDE_DSL_CONFIG_GET" ++echo " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" ++echo " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" ++echo " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" ++echo " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" ++echo " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" ++echo " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" ++echo " Include G997 status: $INCLUDE_DSL_G997_STATUS" ++echo " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" ++echo " Include DSL Bonding: $INCLUDE_DSL_BONDING" ++echo " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" ++echo " Include DELT: $INCLUDE_DSL_DELT" ++echo " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" ++echo " Include PM: $INCLUDE_DSL_PM" ++echo " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" ++echo " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" ++echo " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" ++echo " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" ++echo " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" ++echo " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" ++echo " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" ++echo " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" ++echo " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" ++echo " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" ++echo " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" ++echo " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" ++echo " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" ++echo " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" ++echo " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" ++echo " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" ++echo " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" ++echo "----------------------- deprectated ! ----------------------------------" ++echo " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" ++echo "" ++echo " Settings:" ++echo " Configure options: $CONFIGURE_OPTIONS" ++echo "------------------------------------------------------------------------" + ]) + + AC_CONFIG_FILES([Makefile src/Makefile]) +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -303,7 +303,7 @@ + drv_dsl_cpe_api_OBJS = "$(subst .c,.o,$(filter %.c,$(drv_dsl_cpe_api_SOURCES)))" + + drv_dsl_cpe_api.ko: $(drv_dsl_cpe_api_SOURCES) +- @echo -e "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" ++ @echo "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" + if test ! -e common/drv_dsl_cpe_api.c ; then \ + echo "copy source files (as links only!)"; \ + for f in $(filter %.c,$(drv_dsl_cpe_api_SOURCES)); do \ +@@ -311,10 +311,10 @@ + cp -s $(addprefix @abs_srcdir@/,$$f) $(PWD)/`dirname $$f`/ ; \ + done \ + fi +- @echo -e "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild +- @echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild +- @echo -e "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild +- @echo -e "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild ++ @echo "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild ++ @echo "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild ++ @echo "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild ++ @echo "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild + $(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules + + clean-generic: +--- a/src/include/drv_dsl_cpe_os_linux.h ++++ b/src/include/drv_dsl_cpe_os_linux.h +@@ -16,8 +16,6 @@ + extern "C" { + #endif + +-#include <asm/ioctl.h> +-#include <generated/autoconf.h> + #include <linux/module.h> + #include <linux/kernel.h> + #include <linux/init.h> +@@ -26,8 +24,10 @@ + #include <linux/spinlock.h> + #include <linux/sched.h> + +-#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) +- #include <generated/utsrelease.h> ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) ++#include <linux/utsrelease.h> ++#else ++#include <generated/utsrelease.h> + #endif + + #include <linux/types.h> +@@ -39,7 +39,8 @@ + #include <linux/delay.h> + #include <linux/poll.h> + #include <asm/uaccess.h> +-#include <linux/smp_lock.h> ++//#include <linux/smp_lock.h> ++#include <asm/ioctl.h> + + #ifdef INCLUDE_DSL_CPE_API_IFXOS_SUPPORT + /** IFXOS includes*/ diff --git a/package/system/ltq-dsl/patches/110-fix_status_polling_loop.patch b/package/platform/lantiq/ltq-adsl/patches/110-fix_status_polling_loop.patch index 870943d950..870943d950 100644 --- a/package/system/ltq-dsl/patches/110-fix_status_polling_loop.patch +++ b/package/platform/lantiq/ltq-adsl/patches/110-fix_status_polling_loop.patch diff --git a/package/platform/lantiq/ltq-adsl/patches/120-platform.patch b/package/platform/lantiq/ltq-adsl/patches/120-platform.patch new file mode 100644 index 0000000000..48c7581e4f --- /dev/null +++ b/package/platform/lantiq/ltq-adsl/patches/120-platform.patch @@ -0,0 +1,72 @@ +Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c +=================================================================== +--- drv_dsl_cpe_api-3.24.4.4.orig/src/common/drv_dsl_cpe_os_linux.c 2012-12-07 21:22:58.020256076 +0100 ++++ drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c 2012-12-07 21:31:13.156268489 +0100 +@@ -12,6 +12,7 @@ + + #define DSL_INTERN + #include <linux/device.h> ++#include <linux/platform_device.h> + + #include "drv_dsl_cpe_api.h" + #include "drv_dsl_cpe_api_ioctl.h" +@@ -1063,7 +1064,7 @@ + #endif + + /* Entry point of driver */ +-int __init DSL_ModuleInit(void) ++static int __devinit ltq_adsl_probe(struct platform_device *pdev) + { + struct class *dsl_class; + DSL_int_t i; +@@ -1117,7 +1118,7 @@ + return 0; + } + +-void __exit DSL_ModuleCleanup(void) ++static int __devexit ltq_adsl_remove(struct platform_device *pdev) + { + printk("Module will be unloaded"DSL_DRV_CRLF); + +@@ -1132,7 +1133,7 @@ + (DSL_uint8_t**)&g_BndFpgaBase); + #endif /* defined(INCLUDE_DSL_CPE_API_VINAX) && defined(INCLUDE_DSL_BONDING)*/ + +- return; ++ return 0; + } + + #ifndef _lint +@@ -1148,8 +1149,30 @@ + MODULE_PARM_DESC(debug_level, "set to get more (1) or fewer (4) debug outputs"); + #endif /* #ifndef DSL_DEBUG_DISABLE*/ + +-module_init(DSL_ModuleInit); +-module_exit(DSL_ModuleCleanup); ++static const struct of_device_id ltq_adsl_match[] = { ++#ifdef CONFIG_DANUBE ++ { .compatible = "lantiq,adsl-danube"}, ++#elif defined CONFIG_AMAZON_SE ++ { .compatible = "lantiq,adsl-ase"}, ++#elif defined CONFIG_AR9 ++ { .compatible = "lantiq,adsl-arx100"}, ++#endif ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ltq_adsl_match); ++ ++static struct platform_driver ltq_adsl_driver = { ++ .probe = ltq_adsl_probe, ++ .remove = __devexit_p(ltq_adsl_remove), ++ .driver = { ++ .name = "adsl", ++ .owner = THIS_MODULE, ++ .of_match_table = ltq_adsl_match, ++ }, ++}; ++ ++module_platform_driver(ltq_adsl_driver); ++ + #endif /* #ifndef _lint*/ + + //EXPORT_SYMBOL(DSL_ModuleInit); diff --git a/package/platform/lantiq/ltq-atm/Makefile b/package/platform/lantiq/ltq-atm/Makefile new file mode 100644 index 0000000000..e6e005933c --- /dev/null +++ b/package/platform/lantiq/ltq-atm/Makefile @@ -0,0 +1,51 @@ +# Copyright (C) 2012 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=ltq-atm +PKG_RELEASE:=1 +PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-atm-$(BUILD_VARIANT) + +PKG_MAINTAINER:=John Crispin <blogic@openwrt.org> + +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/ltq-atm-template + SECTION:=sys + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=atm driver for $(1) + URL:=http://www.lantiq.com/ + VARIANT:=$(1) + DEPENDS:=@TARGET_lantiq_$(2) +kmod-atm +br2684ctl + FILES:=$(PKG_BUILD_DIR)/ltq_atm_$(1).ko + AUTOLOAD:=$(call AutoLoad,52,ltq_atm_$(1)) +endef + +KernelPackage/ltq-atm-danube=$(call KernelPackage/ltq-atm-template,danube,xway) +KernelPackage/ltq-atm-ar9=$(call KernelPackage/ltq-atm-template,ar9,xway) +KernelPackage/ltq-atm-ase=$(call KernelPackage/ltq-atm-template,ase,ase) +KernelPackage/ltq-atm-vr9=$(call KernelPackage/ltq-atm-template,vr9,xway) + +define Build/Prepare + $(INSTALL_DIR) $(PKG_BUILD_DIR) + $(CP) ./src/* $(PKG_BUILD_DIR) +endef + +define Build/Configure +endef + +define Build/Compile + cd $(LINUX_DIR); \ + ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \ + $(MAKE) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR) V=1 modules +endef + +$(eval $(call KernelPackage,ltq-atm-danube)) +$(eval $(call KernelPackage,ltq-atm-ase)) +$(eval $(call KernelPackage,ltq-atm-ar9)) +$(eval $(call KernelPackage,ltq-atm-vr9)) diff --git a/package/platform/lantiq/ltq-atm/src/Makefile b/package/platform/lantiq/ltq-atm/src/Makefile new file mode 100644 index 0000000000..3d68c8f6de --- /dev/null +++ b/package/platform/lantiq/ltq-atm/src/Makefile @@ -0,0 +1,23 @@ +ifeq ($(BUILD_VARIANT),danube) + CFLAGS_MODULE = -DCONFIG_DANUBE + obj-m = ltq_atm_danube.o + ltq_atm_danube-objs = ltq_atm.o ifxmips_atm_danube.o +endif + +ifeq ($(BUILD_VARIANT),ase) + CFLAGS_MODULE = -DCONFIG_AMAZON_SE + obj-m = ltq_atm_ase.o + ltq_atm_ase-objs = ltq_atm.o ifxmips_atm_amazon_se.o +endif + +ifeq ($(BUILD_VARIANT),ar9) + CFLAGS_MODULE = -DCONFIG_AR9 + obj-m = ltq_atm_ar9.o + ltq_atm_ar9-objs = ltq_atm.o ifxmips_atm_ar9.o +endif + +ifeq ($(BUILD_VARIANT),vr9) + CFLAGS_MODULE = -DCONFIG_VR9 + obj-m = ltq_atm_vr9.o + ltq_atm_vr9-objs = ltq_atm.o ifxmips_atm_vr9.o +endif diff --git a/package/system/ltq-dsl/src/ifxmips_atm_amazon_se.c b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_amazon_se.c index 1028815927..6e8975bac0 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_amazon_se.c +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_amazon_se.c @@ -40,17 +40,23 @@ #include <linux/proc_fs.h> #include <linux/init.h> #include <linux/ioctl.h> -#include <linux/clk.h> #include <asm/delay.h> /* * Chip Specific Head File */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" #include "ifxmips_atm_core.h" #include "ifxmips_atm_fw_amazon_se.h" +#include <lantiq_soc.h> + +#define EMA_CMD_BUF_LEN 0x0040 +#define EMA_CMD_BASE_ADDR (0x00001580 << 2) +#define EMA_DATA_BUF_LEN 0x0100 +#define EMA_DATA_BASE_ADDR (0x00001900 << 2) +#define EMA_WRITE_BURST 0x2 +#define EMA_READ_BURST 0x2 + /* @@ -103,6 +109,12 @@ static inline void clear_share_buffer(void); * Local Function * #################################### */ +#define IFX_PMU_MODULE_PPE_SLL01 BIT(19) +#define IFX_PMU_MODULE_PPE_TC BIT(21) +#define IFX_PMU_MODULE_PPE_EMA BIT(22) +#define IFX_PMU_MODULE_PPE_QSB BIT(18) +#define IFX_PMU_MODULE_TPE BIT(13) +#define IFX_PMU_MODULE_DSL_DFE BIT(9) static inline void init_pmu(void) { @@ -114,27 +126,28 @@ static inline void init_pmu(void) //PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_enable(clk); + ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 | + IFX_PMU_MODULE_PPE_TC | + IFX_PMU_MODULE_PPE_EMA | + IFX_PMU_MODULE_TPE | + IFX_PMU_MODULE_DSL_DFE); } static inline void uninit_pmu(void) { -/* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); + /*PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); //PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE); //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_disable(clk); } static inline void reset_ppe(void) { -#ifdef MODULE -/* unsigned int etop_cfg; +#if 0 //MODULE + unsigned int etop_cfg; unsigned int etop_mdio_cfg; unsigned int etop_ig_plen_ctrl; unsigned int enet_mac_cfg; @@ -152,7 +165,7 @@ static inline void reset_ppe(void) *IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg; *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl; *IFX_PP32_ENET_MAC_CFG = enet_mac_cfg; - *IFX_PP32_ETOP_CFG = etop_cfg;*/ + *IFX_PP32_ETOP_CFG = etop_cfg; #endif } @@ -211,7 +224,7 @@ static inline void clear_share_buffer(void) * src --- u32 *, binary code buffer * dword_len --- unsigned int, binary code length in DWORD (32-bit) * Output: - * int --- IFX_SUCCESS: Success + * int --- 0: Success * else: Error Code */ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) @@ -220,7 +233,7 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; + return -1; if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) IFX_REG_W32(0x00, CDM_CFG); @@ -237,7 +250,7 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, while ( data_dword_len-- > 0 ) IFX_REG_W32(*data_src++, dest++); - return IFX_SUCCESS; + return 0; } @@ -248,21 +261,16 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, * #################################### */ -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) +extern void ase_fw_ver(unsigned int *major, unsigned int *minor) { ASSERT(major != NULL, "pointer is NULL"); ASSERT(minor != NULL, "pointer is NULL"); -#ifdef VER_IN_FIRMWARE *major = FW_VER_ID->major; *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif } -void ifx_atm_init_chip(void) +void ase_init(void) { init_pmu(); @@ -277,7 +285,7 @@ void ifx_atm_init_chip(void) clear_share_buffer(); } -void ifx_atm_uninit_chip(void) +void ase_shutdown(void) { uninit_pmu(); } @@ -288,16 +296,16 @@ void ifx_atm_uninit_chip(void) * Input: * none * Output: - * int --- IFX_SUCCESS: Success + * int --- 0: Success * else: Error Code */ -int ifx_pp32_start(int pp32) +int ase_start(int pp32) { int ret; /* download firmware */ ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) + if ( ret != 0 ) return ret; /* run PP32 */ @@ -306,7 +314,7 @@ int ifx_pp32_start(int pp32) /* idle for a while to let PP32 init itself */ udelay(10); - return IFX_SUCCESS; + return 0; } /* @@ -317,8 +325,17 @@ int ifx_pp32_start(int pp32) * Output: * none */ -void ifx_pp32_stop(int pp32) +void ase_stop(int pp32) { /* halt PP32 */ IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL); } + +struct ltq_atm_ops ase_ops = { + .init = ase_init, + .shutdown = ase_shutdown, + .start = ase_start, + .stop = ase_stop, + .fw_ver = ase_fw_ver, +}; + diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ar9.c b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ar9.c index 31b89f5c84..b68848b22d 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_ar9.c +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ar9.c @@ -40,23 +40,17 @@ #include <linux/proc_fs.h> #include <linux/init.h> #include <linux/ioctl.h> -#include <linux/clk.h> #include <asm/delay.h> /* * Chip Specific Head File */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" -#define IFX_MEI_BSP 1 -#include "ifxmips_mei_interface.h" #include "ifxmips_atm_core.h" -#include "ifxmips_atm_ppe_common.h" - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - #include "ifxmips_atm_fw_ar9_retx.h" -#else - #include "ifxmips_atm_fw_ar9.h" -#endif + +#include "ifxmips_atm_fw_ar9.h" +#include "ifxmips_atm_fw_regs_ar9.h" + +#include <lantiq_soc.h> @@ -92,7 +86,6 @@ static inline void uninit_pmu(void); static inline void reset_ppe(void); static inline void init_ema(void); static inline void init_mailbox(void); -static inline void init_atm_tc(void); static inline void clear_share_buffer(void); @@ -111,38 +104,32 @@ static inline void clear_share_buffer(void); * #################################### */ +#define IFX_PMU_MODULE_PPE_SLL01 BIT(19) +#define IFX_PMU_MODULE_PPE_TC BIT(21) +#define IFX_PMU_MODULE_PPE_EMA BIT(22) +#define IFX_PMU_MODULE_PPE_QSB BIT(18) +#define IFX_PMU_MODULE_TPE BIT(13) +#define IFX_PMU_MODULE_DSL_DFE BIT(9) + static inline void init_pmu(void) { - //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); - //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); -/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_enable(clk); + ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 | + IFX_PMU_MODULE_PPE_TC | + IFX_PMU_MODULE_PPE_EMA | + IFX_PMU_MODULE_PPE_QSB | + IFX_PMU_MODULE_TPE | + IFX_PMU_MODULE_DSL_DFE); } static inline void uninit_pmu(void) { - /* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/ - //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_disable(clk); } static inline void reset_ppe(void) { #ifdef MODULE // reset PPE - //ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); +// ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); #endif } @@ -162,10 +149,6 @@ static inline void init_mailbox(void) IFX_REG_W32(0x00000000, MBOX_IGU3_IER); } -static inline void init_atm_tc(void) -{ -} - static inline void clear_share_buffer(void) { volatile u32 *p = SB_RAM0_ADDR(0); @@ -175,23 +158,13 @@ static inline void clear_share_buffer(void) IFX_REG_W32(0, p++); } -/* - * Description: - * Download PPE firmware binary code. - * Input: - * src --- u32 *, binary code buffer - * dword_len --- unsigned int, binary code length in DWORD (32-bit) - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) { volatile u32 *dest; if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; + return -1; if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) IFX_REG_W32(0x00, CDM_CFG); @@ -208,88 +181,64 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, while ( data_dword_len-- > 0 ) IFX_REG_W32(*data_src++, dest++); - return IFX_SUCCESS; + return 0; } - - -/* - * #################################### - * Global Function - * #################################### - */ - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) +void ar9_fw_ver(unsigned int *major, unsigned int *minor) { ASSERT(major != NULL, "pointer is NULL"); ASSERT(minor != NULL, "pointer is NULL"); -#if (defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX) || defined(VER_IN_FIRMWARE) *major = FW_VER_ID->major; *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif } -void ifx_atm_init_chip(void) +void ar9_init(void) { - init_pmu(); - - reset_ppe(); - - init_ema(); - - init_mailbox(); - - init_atm_tc(); - - clear_share_buffer(); + init_pmu(); + reset_ppe(); + init_ema(); + init_mailbox(); + clear_share_buffer(); } -void ifx_atm_uninit_chip(void) +void ar9_shutdown(void) { - uninit_pmu(); + ltq_pmu_disable(IFX_PMU_MODULE_PPE_SLL01 | + IFX_PMU_MODULE_PPE_TC | + IFX_PMU_MODULE_PPE_EMA | + IFX_PMU_MODULE_PPE_QSB | + IFX_PMU_MODULE_TPE | + IFX_PMU_MODULE_DSL_DFE); } -/* - * Description: - * Initialize and start up PP32. - * Input: - * none - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -int ifx_pp32_start(int pp32) +int ar9_start(int pp32) { - int ret; + int ret; - /* download firmware */ - ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) - return ret; + ret = pp32_download_code(ar9_fw_bin, sizeof(ar9_fw_bin) / sizeof(*ar9_fw_bin), + ar9_fw_data, sizeof(ar9_fw_data) / sizeof(*ar9_fw_data)); + if ( ret != 0 ) + return ret; - /* run PP32 */ - IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL(0)); + IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL(0)); - /* idle for a while to let PP32 init itself */ - udelay(10); + udelay(10); - return IFX_SUCCESS; + return 0; } -/* - * Description: - * Halt PP32. - * Input: - * none - * Output: - * none - */ -void ifx_pp32_stop(int pp32) +void ar9_stop(int pp32) { - /* halt PP32 */ - IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(0)); + IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(0)); } + +struct ltq_atm_ops ar9_ops = { + .init = ar9_init, + .shutdown = ar9_shutdown, + .start = ar9_start, + .stop = ar9_stop, + .fw_ver = ar9_fw_ver, +}; + + diff --git a/package/system/ltq-dsl/src/ifxmips_atm_core.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_core.h index e566039552..2f754c982b 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_core.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_core.h @@ -25,12 +25,25 @@ #define IFXMIPS_ATM_CORE_H -#include "ifxmips_compat.h" -#include "ifx_atm.h" -#include "ifxmips_atm_ppe_common.h" -#include "ifxmips_atm_fw_regs_common.h" - +#define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24) +#define INT_NUM_IM2_IRL13 (INT_NUM_IM2_IRL0 + 13) +#define CONFIG_IFXMIPS_DSL_CPE_MEI +#define IFX_REG_W32(_v, _r) __raw_writel((_v), (volatile unsigned int *)(_r)) +#define IFX_REG_R32(_r) __raw_readl((volatile unsigned int *)(_r)) +#define IFX_REG_W32_MASK(_clr, _set, _r) IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r)) +#define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb))) + +struct ltq_atm_ops { + void (*init)(void); + void (*shutdown)(void); + + int (*start)(int pp32); + void (*stop)(int pp32); + + void (*fw_ver)(unsigned int *major, unsigned int *minor); +}; +#include <lantiq_atm.h> /* * #################################### @@ -74,6 +87,8 @@ * Debug/Assert/Error Message */ +#define ifx_atm_dbg_enable 1 + #define DBG_ENABLE_MASK_ERR (1 << 0) #define DBG_ENABLE_MASK_DEBUG_PRINT (1 << 1) #define DBG_ENABLE_MASK_ASSERT (1 << 2) @@ -84,17 +99,6 @@ #define DBG_ENABLE_MASK_MAC_SWAP (1 << 12) #define DBG_ENABLE_MASK_ALL (DBG_ENABLE_MASK_ERR | DBG_ENABLE_MASK_DEBUG_PRINT | DBG_ENABLE_MASK_ASSERT | DBG_ENABLE_MASK_DUMP_SKB_RX | DBG_ENABLE_MASK_DUMP_SKB_TX | DBG_ENABLE_MASK_DUMP_QOS | DBG_ENABLE_MASK_DUMP_INIT | DBG_ENABLE_MASK_MAC_SWAP) -#define err(format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ERR) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 ) - -#if defined(ENABLE_DEBUG) && ENABLE_DEBUG - #undef dbg - #define dbg(format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DEBUG_PRINT) ) printk(KERN_WARNING __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 ) -#else - #if !defined(dbg) - #define dbg(format, arg...) - #endif -#endif - #if defined(ENABLE_ASSERT) && ENABLE_ASSERT #define ASSERT(cond, format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) && !(cond) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 ) #else @@ -129,7 +133,7 @@ #define RX_DMA_CH_AAL 1 #define RX_DMA_CH_TOTAL 2 #define RX_DMA_CH_OAM_DESC_LEN 32 -#define RX_DMA_CH_OAM_BUF_SIZE (CELL_SIZE & ~15) +#define RX_DMA_CH_OAM_BUF_SIZE ((CELL_SIZE + 14) & ~15) #define RX_DMA_CH_AAL_BUF_SIZE (2048 - 48) /* @@ -164,14 +168,8 @@ #define TX_INBAND_HEADER_LENGTH 8 #define MAX_TX_FRAME_EXTRA_BYTES (TX_INBAND_HEADER_LENGTH + MAX_TX_HEADER_ALIGN_BYTES + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES) -/* - * Cell Constant - */ #define CELL_SIZE ATM_AAL0_SDU -/* - * ReTX Constant - */ #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX #define RETX_PLAYOUT_BUFFER_ORDER 6 #define RETX_PLAYOUT_BUFFER_SIZE (PAGE_SIZE * (1 << RETX_PLAYOUT_BUFFER_ORDER)) @@ -179,93 +177,69 @@ #define RETX_POLLING_INTERVAL (HZ / 100 > 0 ? HZ / 100 : 1) #endif - - -/* - * #################################### - * Data Type - * #################################### - */ - typedef struct { - unsigned int h; - unsigned int l; + unsigned int h; + unsigned int l; } ppe_u64_t; struct port { - unsigned int tx_max_cell_rate; - unsigned int tx_current_cell_rate; + unsigned int tx_max_cell_rate; + unsigned int tx_current_cell_rate; - struct atm_dev *dev; + struct atm_dev *dev; }; struct connection { - struct atm_vcc *vcc; + struct atm_vcc *vcc; - volatile struct tx_descriptor - *tx_desc; - unsigned int tx_desc_pos; - struct sk_buff **tx_skb; + volatile struct tx_descriptor *tx_desc; + unsigned int tx_desc_pos; + struct sk_buff **tx_skb; - unsigned int aal5_vcc_crc_err; /* number of packets with CRC error */ - unsigned int aal5_vcc_oversize_sdu; /* number of packets with oversize error */ + unsigned int aal5_vcc_crc_err; /* number of packets with CRC error */ + unsigned int aal5_vcc_oversize_sdu; /* number of packets with oversize error */ - unsigned int port; + unsigned int port; }; struct atm_priv_data { - unsigned long conn_table; - struct connection conn[MAX_PVC_NUMBER]; - - volatile struct rx_descriptor - *aal_desc; - unsigned int aal_desc_pos; - - volatile struct rx_descriptor - *oam_desc; - unsigned char *oam_buf; - unsigned int oam_desc_pos; - - struct port port[ATM_PORT_NUMBER]; - - unsigned int wrx_pdu; /* successfully received AAL5 packet */ - unsigned int wrx_drop_pdu; /* AAL5 packet dropped by driver on RX */ - unsigned int wtx_pdu; /* successfully tranmitted AAL5 packet */ - unsigned int wtx_err_pdu; /* error AAL5 packet */ - unsigned int wtx_drop_pdu; /* AAL5 packet dropped by driver on TX */ - - ppe_u64_t wrx_total_byte; - ppe_u64_t wtx_total_byte; - unsigned int prev_wrx_total_byte; - unsigned int prev_wtx_total_byte; - - void *aal_desc_base; - void *oam_desc_base; - void *oam_buf_base; - void *tx_desc_base; - void *tx_skb_base; + unsigned long conn_table; + struct connection conn[MAX_PVC_NUMBER]; + + volatile struct rx_descriptor *aal_desc; + unsigned int aal_desc_pos; + + volatile struct rx_descriptor *oam_desc; + unsigned char *oam_buf; + unsigned int oam_desc_pos; + + struct port port[ATM_PORT_NUMBER]; + + unsigned int wrx_pdu; /* successfully received AAL5 packet */ + unsigned int wrx_drop_pdu; /* AAL5 packet dropped by driver on RX */ + unsigned int wtx_pdu; /* successfully transmitted AAL5 packet */ + unsigned int wtx_err_pdu; /* error AAL5 packet */ + unsigned int wtx_drop_pdu; /* AAL5 packet dropped by driver on TX */ + + unsigned int wrx_oam; /* successfully received OAM cell */ + unsigned int wrx_drop_oam; /* OAM cell dropped by driver on RX */ + unsigned int wtx_oam; /* successfully transmitted OAM cell */ + unsigned int wtx_err_oam; /* error during transmiting OAM cell */ + unsigned int wtx_drop_oam; /* OAM cell dropped by driver on TX */ + + ppe_u64_t wrx_total_byte; + ppe_u64_t wtx_total_byte; + unsigned int prev_wrx_total_byte; + unsigned int prev_wtx_total_byte; + + void *aal_desc_base; + void *oam_desc_base; + void *oam_buf_base; + void *tx_desc_base; + void *tx_skb_base; }; +#include "ifxmips_atm_ppe_common.h" +#include "ifxmips_atm_fw_regs_common.h" - -/* - * #################################### - * Declaration - * #################################### - */ - -extern unsigned int ifx_atm_dbg_enable; - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor); - -extern void ifx_atm_init_chip(void); -extern void ifx_atm_uninit_chip(void); - -extern int ifx_pp32_start(int pp32); -extern void ifx_pp32_stop(int pp32); - -extern void ifx_reset_ppe(void); - - - -#endif // IFXMIPS_ATM_CORE_H +#endif diff --git a/package/platform/lantiq/ltq-atm/src/ifxmips_atm_danube.c b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_danube.c new file mode 100644 index 0000000000..9bab5b4a98 --- /dev/null +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_danube.c @@ -0,0 +1,231 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_danube.c +** PROJECT : UEIP +** MODULES : ATM +** +** DATE : 7 Jul 2009 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM driver common source file (core functions) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 07 JUL 2009 Xu Liang Init Version +*******************************************************************************/ + + + +/* + * #################################### + * Head File + * #################################### + */ + +/* + * Common Head File + */ +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/version.h> +#include <linux/types.h> +#include <linux/errno.h> +#include <linux/proc_fs.h> +#include <linux/init.h> +#include <linux/ioctl.h> +#include <linux/delay.h> + +/* + * Chip Specific Head File + */ +#include "ifxmips_atm_core.h" + +#ifdef CONFIG_DANUBE + +#include "ifxmips_atm_fw_danube.h" +#include "ifxmips_atm_fw_regs_danube.h" + +#include <lantiq_soc.h> + +#define EMA_CMD_BUF_LEN 0x0040 +#define EMA_CMD_BASE_ADDR (0x00001580 << 2) +#define EMA_DATA_BUF_LEN 0x0100 +#define EMA_DATA_BASE_ADDR (0x00001900 << 2) +#define EMA_WRITE_BURST 0x2 +#define EMA_READ_BURST 0x2 + +static inline void reset_ppe(void); + +#define IFX_PMU_MODULE_PPE_SLL01 BIT(19) +#define IFX_PMU_MODULE_PPE_TC BIT(21) +#define IFX_PMU_MODULE_PPE_EMA BIT(22) +#define IFX_PMU_MODULE_PPE_QSB BIT(18) +#define IFX_PMU_MODULE_TPE BIT(13) +#define IFX_PMU_MODULE_DSL_DFE BIT(9) + +static inline void reset_ppe(void) +{ +/*#ifdef MODULE + unsigned int etop_cfg; + unsigned int etop_mdio_cfg; + unsigned int etop_ig_plen_ctrl; + unsigned int enet_mac_cfg; + + etop_cfg = *IFX_PP32_ETOP_CFG; + etop_mdio_cfg = *IFX_PP32_ETOP_MDIO_CFG; + etop_ig_plen_ctrl = *IFX_PP32_ETOP_IG_PLEN_CTRL; + enet_mac_cfg = *IFX_PP32_ENET_MAC_CFG; + + *IFX_PP32_ETOP_CFG &= ~0x03C0; + + // reset PPE + ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); + + *IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg; + *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl; + *IFX_PP32_ENET_MAC_CFG = enet_mac_cfg; + *IFX_PP32_ETOP_CFG = etop_cfg; +#endif*/ +} + +/* + * Description: + * Download PPE firmware binary code. + * Input: + * src --- u32 *, binary code buffer + * dword_len --- unsigned int, binary code length in DWORD (32-bit) + * Output: + * int --- 0: Success + * else: Error Code + */ +static inline int danube_pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) +{ + volatile u32 *dest; + + if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 + || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) + return -1; + + if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) + IFX_REG_W32(0x00, CDM_CFG); + else + IFX_REG_W32(0x04, CDM_CFG); + + /* copy code */ + dest = CDM_CODE_MEMORY(0, 0); + while ( code_dword_len-- > 0 ) + IFX_REG_W32(*code_src++, dest++); + + /* copy data */ + dest = CDM_DATA_MEMORY(0, 0); + while ( data_dword_len-- > 0 ) + IFX_REG_W32(*data_src++, dest++); + + return 0; +} + +static void danube_fw_ver(unsigned int *major, unsigned int *minor) +{ + ASSERT(major != NULL, "pointer is NULL"); + ASSERT(minor != NULL, "pointer is NULL"); + + *major = FW_VER_ID->major; + *minor = FW_VER_ID->minor; +} + +static void danube_init(void) +{ + volatile u32 *p = SB_RAM0_ADDR(0); + unsigned int i; + + ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 | + IFX_PMU_MODULE_PPE_TC | + IFX_PMU_MODULE_PPE_EMA | + IFX_PMU_MODULE_PPE_QSB | + IFX_PMU_MODULE_TPE | + IFX_PMU_MODULE_DSL_DFE); + + reset_ppe(); + + /* init ema */ + IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG); + IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG); + IFX_REG_W32(0x000000FF, EMA_IER); + IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG); + + /* init mailbox */ + IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); + IFX_REG_W32(0x00000000, MBOX_IGU1_IER); + IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); + IFX_REG_W32(0x00000000, MBOX_IGU3_IER); + + /* init atm tc */ + IFX_REG_W32(0x0000, DREG_AT_CTRL); + IFX_REG_W32(0x0000, DREG_AR_CTRL); + IFX_REG_W32(0x0, DREG_AT_IDLE0); + IFX_REG_W32(0x0, DREG_AT_IDLE1); + IFX_REG_W32(0x0, DREG_AR_IDLE0); + IFX_REG_W32(0x0, DREG_AR_IDLE1); + IFX_REG_W32(0x40, RFBI_CFG); + IFX_REG_W32(0x1600, SFSM_DBA0); + IFX_REG_W32(0x1718, SFSM_DBA1); + IFX_REG_W32(0x1830, SFSM_CBA0); + IFX_REG_W32(0x1844, SFSM_CBA1); + IFX_REG_W32(0x14014, SFSM_CFG0); + IFX_REG_W32(0x14014, SFSM_CFG1); + IFX_REG_W32(0x1858, FFSM_DBA0); + IFX_REG_W32(0x18AC, FFSM_DBA1); + IFX_REG_W32(0x10006, FFSM_CFG0); + IFX_REG_W32(0x10006, FFSM_CFG1); + IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC0); + IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC1); + + for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ ) + IFX_REG_W32(0, p++); +} + +static void danube_shutdown(void) +{ +} + +int danube_start(int pp32) +{ + int ret; + + /* download firmware */ + ret = danube_pp32_download_code( + danube_fw_bin, sizeof(danube_fw_bin) / sizeof(*danube_fw_bin), + danube_fw_data, sizeof(danube_fw_data) / sizeof(*danube_fw_data)); + if ( ret != 0 ) + return ret; + + /* run PP32 */ + IFX_REG_W32(DBG_CTRL_START_SET(1), PP32_DBG_CTRL); + + /* idle for a while to let PP32 init itself */ + udelay(10); + + return 0; +} + +void danube_stop(int pp32) +{ + IFX_REG_W32(DBG_CTRL_STOP_SET(1), PP32_DBG_CTRL); +} + +struct ltq_atm_ops danube_ops = { + .init = danube_init, + .shutdown = danube_shutdown, + .start = danube_start, + .stop = danube_stop, + .fw_ver = danube_fw_ver, +}; + +#endif diff --git a/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_amazon_se.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_amazon_se.h new file mode 100644 index 0000000000..b0a9c91bc4 --- /dev/null +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_amazon_se.h @@ -0,0 +1,457 @@ +#ifndef IFXMIPS_ATM_FW_AMAZON_SE_H +#define IFXMIPS_ATM_FW_AMAZON_SE_H + + +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_fw_amazon_se.h +** PROJECT : UEIP +** MODULES : ATM (ADSL) +** +** DATE : 1 AUG 2005 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM Driver (PP32 Firmware) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 4 AUG 2005 Xu Liang Initiate Version +** 23 OCT 2006 Xu Liang Add GPL header. +** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) +*******************************************************************************/ + + +#define VER_IN_FIRMWARE 1 + +#define ATM_FW_VER_MAJOR 0 +#define ATM_FW_VER_MINOR 16 + + +static unsigned int firmware_binary_code[] = { + 0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000, + 0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80004cc8, 0xc2000000, 0xda0800f9, 0x80004330, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x800042e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x800055a8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x800041e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xc0400000, 0xc0004840, 0xc88400f8, 0x80004988, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xc0400002, 0xc0004840, 0xc88400f8, 0x80004908, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xc3c00004, 0xdbc800f9, 0xc10c0002, 0xd90c00f8, 0x8000fee0, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xc10e0002, 0xd90c00f8, 0xc0004808, 0xc84000f8, 0x80004938, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xc3e1fffe, 0x597dfffe, 0x593dfe14, 0x900004d9, 0x00000000, 0x00000000, 0x00000000, 0x90cc0481, + 0x00000000, 0x00000000, 0x00000000, 0xc3c00000, 0xdbc800f9, 0xc1400008, 0xc1900000, 0x71588000, + 0x14100100, 0xc140000a, 0xc1900002, 0x71588000, 0x14100100, 0xc140000c, 0xc1900004, 0x71588000, + 0x14100100, 0xc1400004, 0xc1900006, 0x71588000, 0x14100100, 0xc1400006, 0xc1900008, 0x71588000, + 0x14100100, 0xc140000e, 0xc190000a, 0x71588000, 0x14100100, 0xc1400000, 0xc190000c, 0x71588000, + 0x14100100, 0xc1400002, 0xc190000e, 0x71588000, 0x14100100, 0xc0400000, 0xc11c0000, 0xc000082c, + 0xcd05ce00, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0400002, 0xc11c0000, 0xc000082c, 0xcd05ce00, + 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc0000824, 0x00000000, 0xcbc000f9, 0xcb8000f9, 0xcb4000f9, + 0xcb0000f8, 0xc0004878, 0x5bfc4000, 0xcfc000f9, 0x5bb84000, 0xcf8000f9, 0x5b744000, 0xcf4000f9, + 0x5b304000, 0xcf0000f8, 0xc0000a10, 0x00000000, 0xcbc000f9, 0xcb8000f8, 0xc0004874, 0x5bfc4000, + 0xcfc000f9, 0x5bb84000, 0xcf8000f8, 0xc30001fe, 0xc000140a, 0xcf0000f8, 0xc3000000, 0x7f018000, + 0xc000042e, 0xcf0000f8, 0xc000040e, 0xcf0000f8, 0xc3c1fffe, 0xc000490e, 0xcfc00078, 0xc000492c, + 0xcfc00078, 0xc0004924, 0xcfc00038, 0xc0004912, 0xcfc00038, 0xc0004966, 0xcfc00038, 0xc0004968, + 0xcfc00078, 0xc000496a, 0xcfc00078, 0xc3c1fffe, 0xc00049a0, 0xcfc000f8, 0xc3c00000, 0xc2800020, + 0xc3000000, 0x7f018000, 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0x5838000a, 0xcf0000f8, + 0x5bfc0002, 0xb7e8ffc8, 0x00000000, 0xc3c00000, 0xc2800010, 0x6ff86000, 0x47bdc000, 0x5bb84c80, + 0xc3400000, 0x58380004, 0xcb420078, 0x00000000, 0x58380008, 0xcf400078, 0x5bfc0002, 0xb7e8ffb0, + 0x00000000, 0xc3c00000, 0xc2800020, 0xc348001e, 0xc3000000, 0x7f018000, 0x6ff8a000, 0x6fd44000, + 0x4795c000, 0x47bdc000, 0x5bb85e00, 0x58380008, 0xcf408418, 0x5838000a, 0xcf0000f8, 0x5bfc0002, + 0xb7e8ffb0, 0x00000000, 0x00000000, 0xc3e06242, 0x5bfc0020, 0xc0004802, 0xcfc000f8, 0xc161fffe, + 0x5955fffe, 0x14140000, 0x00000000, 0xc1000000, 0xd91c00f8, 0xc3e01002, 0x5bfd88c0, 0xc3a00f88, + 0x5bb839a2, 0x99005fa8, 0xdbd800f8, 0xdb9800f9, 0x00000000, 0xc3c00000, 0xdf7f0038, 0xa7ccfff0, + 0xc3800000, 0xc00048c0, 0xcb818078, 0xc0001408, 0xcfc000f8, 0xc10e0002, 0xd90c00f8, 0x5d3802a6, + 0xc1000002, 0xd91c1f02, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xa9fe0270, 0xc3c00000, + 0xddfc00f0, 0x5d3c0000, 0x84000100, 0xc0000c04, 0xcb8000f8, 0xc11c0002, 0x00000000, 0x7391c000, + 0xcf8000f8, 0xc3800000, 0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3203002, 0x5b3188c4, 0xc2e00f88, + 0x5aec100e, 0x99005fa8, 0xdb1800f8, 0xdad800f9, 0x00000000, 0xc3800000, 0xc3400080, 0xdf780038, + 0xb7b4ffea, 0xc3205002, 0x5b3188c8, 0xc2e00f90, 0x5aec180c, 0x99005fa8, 0xdb1800f8, 0xdad800f9, + 0x00000000, 0x80000128, 0xc00048cc, 0xca8000f8, 0x00000000, 0xc1000006, 0x76914000, 0x840000fa, + 0x00000000, 0xa6800070, 0xc3800000, 0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3202002, 0x5b31c8c6, + 0xc2e00f88, 0x5aec100e, 0x99005fa8, 0xdb1800f8, 0xdad800f9, 0x00000000, 0xa6820068, 0xc3800000, + 0xc3400080, 0xdf780038, 0xb7b4ffea, 0xc3204002, 0x5b31c8ca, 0xc2e00f90, 0x5aec180c, 0x99005fa8, + 0xdb1800f8, 0xdad800f9, 0x00000000, 0xc00048cc, 0xc2800000, 0xce8000f8, 0xc3a00140, 0x5bfc0002, + 0x47bc8000, 0xc1000000, 0xc53c00fe, 0xdbdc00f0, 0x80000530, 0x00000000, 0x80002130, 0x00000000, + 0x8000fd70, 0xc0004958, 0xc84000f8, 0x00000000, 0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0004848, + 0xcb8400f8, 0xc000495c, 0xcac400f8, 0xc0004844, 0xc88400f8, 0x47ad0000, 0x8400ff82, 0xc000487c, + 0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc0001624, 0xcb0400f8, 0xa63c007a, + 0x00000000, 0x00000000, 0xa71eff22, 0x00000000, 0xc0000824, 0xca8400f8, 0x6ca08000, 0x6ca42000, + 0x46250000, 0x42290000, 0xc35e0002, 0xc6340060, 0xc0001624, 0xcf440078, 0xc2000000, 0xc161fffe, + 0x5955fffe, 0x14140000, 0x00000000, 0xc0004844, 0xc88400f8, 0xc000082c, 0xca040038, 0x00000000, + 0x00000000, 0x58880002, 0xb6080018, 0x00000000, 0xc0800000, 0xc0004844, 0xcc840038, 0x5aec0002, + 0xc000495c, 0xcec400f8, 0x5e6c0006, 0x84000060, 0xc0004848, 0xcb8400f8, 0xc0000838, 0xc2500002, + 0xce450800, 0x5fb80002, 0xc0004848, 0xcf8400f8, 0x5eec0002, 0xc000495c, 0xcec400f8, 0x00000000, + 0xc121fffe, 0x5911fe14, 0x14100000, 0x8000fd98, 0xc000495a, 0xc84000f8, 0x00000000, 0xc3c00002, + 0x787c2000, 0xcc4000f8, 0xc0004960, 0xcac400f8, 0x00000000, 0x00000000, 0x5eec0000, 0x8400010a, + 0x00000000, 0xb6fc0050, 0xc0001600, 0xca0400f8, 0x00000000, 0x00000000, 0xa61e00d2, 0x6fe90000, + 0xc0000a28, 0xce850800, 0xc2c00000, 0xc2800004, 0xb6e800a0, 0xc0001604, 0xca8400f8, 0xc0004960, + 0xcec400f8, 0xa69efcc2, 0x00000000, 0x6fe90000, 0xc0000a28, 0xce850800, 0xc2c00002, 0xc0001600, + 0xca0400f8, 0x00000000, 0x00000000, 0xa61e002a, 0x6fe90000, 0xc0000a28, 0xce850800, 0xc2c00000, + 0xc0001604, 0xca8400f8, 0xc0004960, 0xcec400f8, 0xa69efc2a, 0xc2400000, 0xc0000a14, 0xca440028, + 0x00000000, 0x00000000, 0x466d2000, 0xa4400020, 0xc2800000, 0xdfeb0029, 0x80000010, 0xdfea0029, + 0xb668f932, 0x00000000, 0xc00048a0, 0xcb0400f8, 0xc0000a10, 0xca8400f8, 0x6f208000, 0x6f242000, + 0x46250000, 0x42a10000, 0xc2400000, 0xc0000a14, 0xca440028, 0xc35e0002, 0xc6340060, 0xc0001604, + 0xcf440078, 0x5b300002, 0xb6700018, 0x5aec0002, 0xc3000000, 0xc00048a0, 0xcf0400f8, 0xc0004960, + 0xcec400f8, 0x8000f868, 0xc0004918, 0xd28000f8, 0xc2000000, 0xdf600038, 0x5e600080, 0x84000272, + 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc000480a, 0xca0000f8, 0xc0004912, + 0xca4000f8, 0xc0004924, 0xca8000f8, 0xc0004966, 0xcac000f8, 0x00000000, 0xc121fffe, 0x5911fe14, + 0x14100000, 0x76250000, 0x76290000, 0x762d0000, 0x840001ca, 0xc0004918, 0xca4000f8, 0xc28001fe, + 0x76290000, 0x5a640002, 0x6a254010, 0x5ee80000, 0x8400001a, 0x6aa54000, 0x80000010, 0xc62800f8, + 0x62818008, 0xc0004918, 0xcf0000f8, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0xc0004966, + 0xca4000f8, 0xc2000002, 0x6a310000, 0x7e010000, 0x76612000, 0xce4000f8, 0x00000000, 0xc121fffe, + 0x5911fe14, 0x14100000, 0x6f346000, 0x4771a000, 0x5b744c80, 0xc2800000, 0x58340006, 0xca800078, + 0xc2c00000, 0x58340000, 0xcac000d8, 0xc2400000, 0x5834000a, 0xca420078, 0x6ea82000, 0x42e9e000, + 0x6f2ca000, 0x42e56000, 0x5aec1400, 0xc3990040, 0xc7381c18, 0xc6f80060, 0x99005fa8, 0xdb9800f8, + 0xdbd800f9, 0x00000000, 0xdea000f8, 0x46310000, 0x8400fd80, 0xc0004958, 0xc84000f8, 0x00000000, + 0xc3c00002, 0x787c2000, 0xcc4000f8, 0xc0004848, 0xcb8400f8, 0xc0004844, 0xc88400f8, 0x5fb80000, + 0x8400f7f2, 0xc0001a1c, 0xca0000f8, 0xc2400002, 0x6a452000, 0x76250000, 0x8400f7c2, 0xc000487c, + 0xc80400f8, 0x00000000, 0x00000000, 0x40080000, 0xca0000f8, 0xc42400f8, 0x00000000, 0xa63c17da, + 0x00000000, 0xc0004878, 0xc80400f8, 0x6c908000, 0x45088000, 0x45088000, 0x40100000, 0xca0000f8, + 0xc42400f8, 0x00000000, 0xc0004934, 0xce0000f8, 0xc2800002, 0xc4681c08, 0xc62821d0, 0xc2600010, + 0x5a652440, 0xc0004800, 0xcb4000f8, 0xc2200400, 0x5a202400, 0xc7601040, 0xc0001220, 0xce8000f8, + 0xc0001200, 0xce4000f8, 0xc0001202, 0xce0000f8, 0xc0001240, 0xcb4000f8, 0x00000000, 0x00000000, + 0xa754ffe0, 0xc2000000, 0xc7600040, 0xa7520042, 0x00000000, 0x00000000, 0x99006720, 0xc0004822, + 0xc94000f8, 0xc1800002, 0x80001680, 0x58206480, 0xc2000000, 0xca000018, 0xc2400000, 0xca414000, + 0xc2800000, 0xca812000, 0xc2c00000, 0xcac20018, 0xc0004938, 0xce0000f8, 0xc0004920, 0xce4000f8, + 0xc0004916, 0xce8000f8, 0xc0004922, 0xcec000f8, 0xa6400540, 0x00000000, 0xc0004938, 0xcbc000f8, + 0x00000000, 0xc3800000, 0x6ff48000, 0x6fd44000, 0x4355a000, 0x5b744a00, 0x58340000, 0xcb802010, + 0x00000000, 0xc2000000, 0x6fb46000, 0x4779a000, 0x5b744c80, 0x5834000c, 0xca000020, 0xc000491a, + 0xcf8000f8, 0x5e200000, 0x8400046a, 0xc2000000, 0xdf610048, 0x5e6001e8, 0x8800ffe8, 0xc2000002, + 0xc2400466, 0xc2a00000, 0x5aa80000, 0xc0001006, 0xce0000f8, 0xc0001008, 0xce4000f8, 0xc000100a, + 0xce8000f8, 0x990059e8, 0xc1a0fffe, 0xc0000824, 0xc9840060, 0xc0004934, 0xca4000f8, 0xc2000000, + 0xc2800002, 0x99005a28, 0xda9800f8, 0xc61400f8, 0xc65800f8, 0xc161fffe, 0x5955fffe, 0x14140000, + 0x00000000, 0x99005b10, 0xc000491a, 0xc94000f8, 0x00000000, 0x00000000, 0xc121fffe, 0x5911fe14, + 0x14100000, 0xc0004922, 0xca001118, 0xc3c00000, 0xc3800000, 0xc0004930, 0xce023118, 0xc0004932, + 0xcbc000d8, 0xc2800000, 0xc000491e, 0xcfc000f8, 0xc0004862, 0xca800060, 0xc3a0001a, 0x5bb94000, + 0xc6b80060, 0xc000491c, 0xcf8000f8, 0x99005d80, 0xc000491c, 0xc1400000, 0xc9420048, 0x00000000, + 0x00000000, 0x00000000, 0xa8e2ffe8, 0xc2000000, 0xc1220002, 0xd90c00f8, 0xdf600038, 0x5e600080, + 0x8400fff2, 0xc000491c, 0xca0000f8, 0xc000491e, 0xca4000f8, 0x00000000, 0x00000000, 0x99005fa8, + 0xda1800f8, 0xda5800f9, 0x00000000, 0xc2000000, 0xdf610048, 0x5e6001fe, 0x8800ffe8, 0xc0004916, + 0xca8000f8, 0xc2c00000, 0xdfec0048, 0xc2400000, 0x466d2000, 0x8400004a, 0x5ea80000, 0x8400003a, + 0xc2600002, 0x99006720, 0xc000482e, 0xc94000f8, 0xc1800002, 0x80000030, 0xc2600000, 0x99006720, + 0xc000482c, 0xc94000f8, 0xc1800002, 0xc2000068, 0xc6240078, 0xc0004930, 0xce400080, 0xc000491a, + 0xc98000f8, 0xc0004862, 0xc94000f8, 0x6d9c6000, 0x45d8e000, 0x59dc4c80, 0x99005e08, 0xd95800f8, + 0xd99800f9, 0xd9d400f8, 0x99005d80, 0xc000491c, 0xc1400000, 0xc9420048, 0xc2000000, 0xdf600038, + 0x5e600080, 0x8400ffea, 0x00000000, 0xc000491c, 0xca0000f8, 0xc000491e, 0xca4000f8, 0x00000000, + 0x00000000, 0x99005fa8, 0xda1800f8, 0xda5800f9, 0x00000000, 0x800010e8, 0x00000000, 0x99006720, + 0xc000482a, 0xc94000f8, 0xc1800002, 0x800010b8, 0xc0004938, 0xcbc000f8, 0x00000000, 0x00000000, + 0x6ff88000, 0x6fd44000, 0x4395c000, 0x5bb84a00, 0x58380008, 0xca0000f8, 0x00000000, 0x00000000, + 0xa6000382, 0x00000000, 0xc0004938, 0xcbc000f8, 0xc3000000, 0x00000000, 0x6ff88000, 0x6fd44000, + 0x4395c000, 0x5bb84a00, 0x58380000, 0xcb002010, 0xc2000000, 0x58380008, 0xca020078, 0x5838000c, + 0xcac000f8, 0x5838000e, 0xca4000f8, 0xc000491a, 0xcf0000f8, 0xc0004930, 0xcec000f8, 0xc000493c, + 0xce0000f8, 0xc0004932, 0xce4000f8, 0x5e200000, 0x84000120, 0xc2800000, 0xa6fe00ba, 0x6f206000, + 0x46310000, 0x5a204c80, 0x5820000c, 0xca800020, 0x00000000, 0x00000000, 0x5ea80000, 0x840001f2, + 0x00000000, 0xc161fffe, 0x5955fffe, 0x14140000, 0x00000000, 0x99005b10, 0xc000491a, 0xc94000f8, + 0x00000000, 0x00000000, 0xc121fffe, 0x5911fe14, 0x14100000, 0xc0004930, 0xcac000f8, 0xc0004932, + 0xca4000f8, 0xc7ec1118, 0xc0004930, 0xcec000f8, 0x5838000c, 0xcec000f8, 0x58000002, 0xce4000f8, + 0xc0004934, 0xca0000f8, 0xc2400002, 0x6e642000, 0x6e642000, 0x76612000, 0x8400002a, 0xc2400002, + 0x6e684000, 0x58380008, 0xce804200, 0xa6000020, 0x6e682000, 0x58380008, 0xce802100, 0xc2400002, + 0x6e642000, 0x76612000, 0x840000ea, 0x58380008, 0xca0000f8, 0xc2800000, 0xc2400000, 0xa60200c0, + 0xdba800f8, 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0x69d8e000, 0x7dc0c000, 0x7558a000, 0xcd4000f8, 0xc000492c, 0xc94000f8, 0xdd8000f9, + 0x58000032, 0x755ca000, 0x84000090, 0xc94000f9, 0xc98000f8, 0xdd8000f9, 0x5800000c, 0x00000000, + 0xcd4000f9, 0xcd8000f8, 0xc000492c, 0xc94000f8, 0xc000492a, 0xc98000f8, 0x715ca000, 0xc000492c, + 0xcd4000f8, 0x719cc000, 0xc000492a, 0xcd8000f8, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, + 0xc0004862, 0xc98000f8, 0x00000000, 0xc1c00200, 0x4194c000, 0x459ce000, 0x88000012, 0xc5d800f8, + 0xc0004862, 0xcd8000f8, 0xc0001406, 0xc98000f8, 0xc1c00002, 0x9d000000, 0xc5d80a00, 0xc5581048, + 0xcd8000f8, 0xc0004930, 0xc98000f8, 0xc0004932, 0xc9c000f8, 0xc140000e, 0xc5581c18, 0xdd9400f8, + 0xc0005600, 0x40140000, 0x5d405800, 0x88000012, 0x5c000200, 0xcd8000f8, 0x58000002, 0x5d405800, + 0x88000012, 0x5c000200, 0xcdc000f8, 0xdd5400f8, 0xc1c00000, 0x58140006, 0xc9c20078, 0xc1800000, + 0x58140000, 0xc98000d8, 0x6ddc2000, 0xc000491e, 0x41d8e000, 0xcdc000f8, 0xdd9800f8, 0xc1c00022, + 0xc5d80d70, 0xdd9400f9, 0xc5581c18, 0xc000491c, 0xcd8000f8, 0xdd5400f8, 0xc1c00000, 0x58140006, + 0xc9c20078, 0xc1800000, 0x58140004, 0xc9820078, 0x00000000, 0x59dc0002, 0x45d8c000, 0x84000010, + 0xc1c00000, 0x9d000000, 0x58140006, 0xc5d81078, 0xcd821078, 0xc0004860, 0xc94000f8, 0xc1820080, + 0xc1d00002, 0x58146b00, 0xd58000f8, 0x58000002, 0xd58000f9, 0x59540004, 0xb5580018, 0xc0004860, + 0xc1400000, 0xcd4000f8, 0xdd9800f9, 0x9d000000, 0xdd9400f8, 0xc0001404, 0xcdc10800, 0xc1c00000, + 0xc1800200, 0x5d980004, 0xdf5d0048, 0x459ca000, 0x8800fff2, 0xdd8000f9, 0x5800000c, 0x00000000, + 0xc94000f9, 0xc98000f8, 0xc1c00002, 0xc5d43f00, 0xc5d81e00, 0xc0004862, 0xc9c000f8, 0x00000000, + 0x00000000, 0x581c5600, 0x5dc05800, 0x88000012, 0x5c000200, 0xcd4000f8, 0x58000002, 0x5dc05800, + 0x88000012, 0x5c000200, 0xcd8000f8, 0xc0004862, 0xc9c000f8, 0x00000000, 0xc15004c0, 0xc5d40060, + 0xdd9c00f8, 0xc5d41c18, 0xc1c00000, 0xdd8000f9, 0x58000030, 0xc9c00078, 0xdd8000f9, 0x58000002, + 0xc98000f8, 0x6ddc2000, 0xc000491c, 0x41d8e000, 0xcd4000f9, 0xcdc000f8, 0xdd9400f9, 0xc1c00000, + 0x58140030, 0xc9c00078, 0xc1800000, 0x58140006, 0xc9820078, 0x00000000, 0x59dc0002, 0x45d8c000, + 0x84000010, 0xc1c00000, 0x9d000000, 0x58140030, 0xc5d80078, 0xcd800078, 0xc1c00000, 0xdf5c0038, + 0x5ddc0080, 0x8400ffea, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0xc160fffe, + 0xc0000a10, 0xc9440060, 0xc1a0fffe, 0x59981e08, 0xc000100c, 0xcd4000f8, 0xc000100e, 0xcd8000f8, + 0xc0004964, 0xc98000f8, 0x00000000, 0xc170000a, 0x7158a000, 0x6c988000, 0x4588c000, 0x4588c000, + 0x59980004, 0xc5940270, 0xc0001010, 0xcd4000f8, 0xc0004946, 0xc94000f8, 0x00000000, 0x00000000, + 0x6d58a000, 0x6d5c4000, 0x459cc000, 0x4594c000, 0xc000494a, 0xc94000f8, 0xc0004948, 0xc9c000f8, + 0x4194c000, 0xc1400012, 0xc55c1818, 0x9d000000, 0xc59c0268, 0xc0001012, 0xcdc000f8, 0xc1400000, + 0x58000012, 0xc9410038, 0xc0004950, 0xc9c000f8, 0xc55800f8, 0xc5940838, 0xc5581078, 0xd99400f8, + 0xc000493c, 0xc94000f8, 0xc0004954, 0xc98000f8, 0x59dc00a8, 0x45d4e000, 0x41d8e000, 0x5d5c0030, + 0x88000010, 0xc1c00030, 0xc1800000, 0xc5d84028, 0xc1400000, 0xc5d40008, 0x5dd40002, 0x84000072, + 0x5dd40004, 0x8400009a, 0x5dd40006, 0x840000c2, 0x5dd80026, 0x840000ea, 0xdd5400f8, 0xdd8000f9, + 0x58000008, 0x40180000, 0xcd4000f8, 0x59980002, 0x8000ffc0, 0xdd5400f8, 0xdd8000f9, 0x58000008, + 0x40180000, 0xcd4000b8, 0x59980002, 0x8000ff88, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, + 0xcd400078, 0x59980002, 0x8000ff50, 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd400038, + 0x59980002, 0x8000ff18, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012, + 0xc94000f8, 0xc0004954, 0xc9c000f8, 0xc0004950, 0xc9400078, 0xdd8000f9, 0x58000028, 0x5d9c0000, + 0x84000052, 0x5d9c0002, 0x84000052, 0x5d9c0004, 0x8400006a, 0xc55b0038, 0xc55c08b8, 0xcd800039, + 0xcdc108b8, 0x80000060, 0xcd4000f8, 0x80000050, 0xc55900b8, 0xc55c1838, 0xcd8000b9, 0xcdc31838, + 0x80000028, 0xc55a0078, 0xc55c1078, 0xcd800079, 0xcdc21078, 0x9d000000, 0x00000000, 0x00000000, + 0x00000000, 0x59540002, 0x6994e018, 0x61c0c008, 0x4194a000, 0x5d940040, 0x88000012, 0xc59400f8, + 0x9d000000, 0xcd4000f8, 0x00000000, 0x00000000, 0x9d000000, 0x4158a000, 0xcd4000f8, 0x00000000, +}; + +static unsigned int firmware_binary_data[] = { +}; + + +#endif // IFXMIPS_ATM_FW_AMAZON_SE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9.h index b22bcccca4..5ee6d23bb1 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9.h @@ -32,7 +32,7 @@ #define ATM_FW_VER_MINOR 16 -static unsigned int firmware_binary_code[] = { +static unsigned int ar9_fw_bin[] = { 0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000, 0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80004980, 0xc2000000, 0xda0800f9, 0x80003fe8, @@ -432,7 +432,7 @@ static unsigned int firmware_binary_code[] = { 0xcd4000f8, 0x00000000, }; -static unsigned int firmware_binary_data[] = { +static unsigned int ar9_fw_data[] = { }; diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9_retx.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9_retx.h index 51e4f9c6c9..51e4f9c6c9 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9_retx.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_ar9_retx.h diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_danube.h index fff0d31e5e..57b7586bd0 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_danube.h @@ -31,9 +31,11 @@ #define ATM_FW_VER_MAJOR 0 #define ATM_FW_VER_MINOR 17 +// fix 1 upstream packet stuck in TX queue issue +// add multiple queue per PVC feature -static unsigned int firmware_binary_code[] = { +static unsigned int danube_fw_bin[] = { 0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000, 0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0x80004968, 0xC2000000, 0xDA080001, 0x80003FD0, @@ -433,7 +435,7 @@ static unsigned int firmware_binary_code[] = { 0xCD400000, 0x00000000, }; -static unsigned int firmware_binary_data[] = { +static unsigned int danube_fw_data[] = { }; diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube_retx.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_danube_retx.h index 1c915dbba1..1c915dbba1 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube_retx.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_danube_retx.h diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_amazon_se.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_amazon_se.h index af2b550869..87cbe5dbe7 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_amazon_se.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_amazon_se.h @@ -1,3 +1,30 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_fw_regs_amazon_se.h +** PROJECT : UEIP +** MODULES : ATM (ADSL) +** +** DATE : 1 AUG 2005 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM Driver (Firmware Registers) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 4 AUG 2005 Xu Liang Initiate Version +** 23 OCT 2006 Xu Liang Add GPL header. +** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) +*******************************************************************************/ + + + #ifndef IFXMIPS_ATM_FW_REGS_AMAZON_SE_H #define IFXMIPS_ATM_FW_REGS_AMAZON_SE_H @@ -6,9 +33,9 @@ /* * Host-PPE Communication Data Address Mapping */ -#define FW_VER_ID SB_BUFFER(0x2001) /* Firmware Version ID */ +#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2401)) /* Firmware Version ID */ #define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ -#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ +//#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ #define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ #define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ #define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_ar9.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_ar9.h index dd010f54f9..dd010f54f9 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_ar9.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_ar9.h diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_common.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_common.h index 432969b933..49be99e12a 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_common.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_common.h @@ -29,7 +29,6 @@ #define IFXMIPS_ATM_FW_REGS_COMMON_H - #if defined(CONFIG_DANUBE) #include "ifxmips_atm_fw_regs_danube.h" #elif defined(CONFIG_AMAZON_SE) @@ -226,10 +225,12 @@ struct wan_mib_table { }; struct wtx_queue_config { - unsigned int res1 :25; + unsigned int res1 :16; + unsigned int same_vc_qmap:8; + unsigned int res2 :1; unsigned int sbid :1; unsigned int qsb_vcid :4; // Which QSB queue (VCID) does this TX queue map to. - unsigned int res2 :1; + unsigned int res3 :1; unsigned int qsben :1; }; @@ -365,10 +366,12 @@ struct wan_mib_table { struct wtx_queue_config { unsigned int qsben :1; - unsigned int res2 :1; + unsigned int res3 :1; unsigned int qsb_vcid :4; // Which QSB queue (VCID) does this TX queue map to. unsigned int sbid :1; - unsigned int res1 :25; + unsigned int res2 :1; + unsigned int same_vc_qmap:8; + unsigned int res1 :16; }; struct wrx_dma_channel_config diff --git a/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_danube.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_danube.h new file mode 100644 index 0000000000..9bdefdb17c --- /dev/null +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_danube.h @@ -0,0 +1,51 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_fw_regs_danube.h +** PROJECT : UEIP +** MODULES : ATM (ADSL) +** +** DATE : 1 AUG 2005 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM Driver (Firmware Registers) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 4 AUG 2005 Xu Liang Initiate Version +** 23 OCT 2006 Xu Liang Add GPL header. +** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) +*******************************************************************************/ + + + +#ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H +#define IFXMIPS_ATM_FW_REGS_DANUBE_H + +#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001)) +#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ +#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ +#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ +#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ +#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ +#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ +#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ +#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */ + +#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20)) +#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7)) +#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i))) +#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2710 + (i) * 27)) +#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2711 + (i) * 27)) +#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410)) +#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2000 + (i))) +#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2020 + (i))) +#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2040 + (i))) + +#endif diff --git a/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_vr9.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_vr9.h new file mode 100644 index 0000000000..708d337629 --- /dev/null +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_regs_vr9.h @@ -0,0 +1,72 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_fw_regs_vr9.h +** PROJECT : UEIP +** MODULES : ATM (ADSL) +** +** DATE : 1 AUG 2005 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM Driver (Firmware Registers) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 4 AUG 2005 Xu Liang Initiate Version +** 23 OCT 2006 Xu Liang Add GPL header. +** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) +*******************************************************************************/ + + + +#ifndef IFXMIPS_ATM_FW_REGS_VR9_H +#define IFXMIPS_ATM_FW_REGS_VR9_H + +#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001)) + +/* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ +#define CFG_WRX_HTUTS SB_BUFFER(0x2010) +/* WAN RX Queue Number */ +#define CFG_WRX_QNUM SB_BUFFER(0x2011) +/* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ +#define CFG_WRX_DCHNUM SB_BUFFER(0x2012) +/* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ +#define CFG_WTX_DCHNUM SB_BUFFER(0x2013) +/* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ +#define CFG_WRDES_DELAY SB_BUFFER(0x2014) +/* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ +#define WRX_DMACH_ON SB_BUFFER(0x2015) +/* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ +#define WTX_DMACH_ON SB_BUFFER(0x2016) +/* WAN RX HUNT Threshold, must be between 2 to 8. */ +#define WRX_HUNT_BITTH SB_BUFFER(0x2017) +/* i < 16 */ +#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config *) SB_BUFFER(0x4C00 + (i) * 20)) +/* i < 8 */ +#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config *) SB_BUFFER(0x4F80 + (i) * 7)) +/* i < 2 */ +#define WTX_PORT_CONFIG(i) ((struct wtx_port_config *) SB_BUFFER(0x4FB8 + (i))) +/* i < 16 */ +#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config *) SB_BUFFER(0x3A00 + (i) * 27)) +/* i < 16 */ +#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config *) SB_BUFFER(0x3A01 + (i) * 27)) + +#define WAN_MIB_TABLE ((struct wan_mib_table *) SB_BUFFER(0x4EF0)) +/* i < 32 */ +#define HTU_ENTRY(i) ((struct htu_entry *) SB_BUFFER(0x26A0 + (i))) +/* i < 32 */ +#define HTU_MASK(i) ((struct htu_mask *) SB_BUFFER(0x26C0 + (i))) +/* i < 32 */ +#define HTU_RESULT(i) ((struct htu_result *) SB_BUFFER(0x26E0 + (i))) +/* bit 0~3 - 0x0F: in showtime, 0x00: not in showtime */ +#define UTP_CFG SB_BUFFER(0x2018) + + + +#endif // IFXMIPS_ATM_FW_REGS_VR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_vr9.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_vr9.h index 96b1725949..42a26ec539 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_vr9.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_fw_vr9.h @@ -32,7 +32,7 @@ #define ATM_FW_VER_MINOR 24 -static u32 firmware_binary_code[] = { +static u32 vr9_fw_bin[] = { 0x800004B8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFE0, 0x00000000, 0x00000000, 0x00000000, 0xC1000002, 0xD90C00F8, 0xC2000002, 0xDA0800F9, 0x80004390, 0xC2000000, 0xDA0800F9, 0x80003A10, @@ -419,7 +419,7 @@ static u32 firmware_binary_code[] = { 0xCE0000F8, 0xC000697E, 0xCE4000F8, 0x9D000000, 0x4158A000, 0xCD4000F8, 0x00000000, }; -static u32 firmware_binary_data[] = { +static u32 vr9_fw_data[] = { }; diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_amazon_se.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h index b9ba2c7ebd..412f605b2b 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_amazon_se.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h @@ -1,3 +1,30 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_ppe_amazon_se.h +** PROJECT : UEIP +** MODULES : ATM (ADSL) +** +** DATE : 1 AUG 2005 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM Driver (PPE Registers) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 4 AUG 2005 Xu Liang Initiate Version +** 23 OCT 2006 Xu Liang Add GPL header. +** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) +*******************************************************************************/ + + + #ifndef IFXMIPS_ATM_PPE_AMAZON_SE_H #define IFXMIPS_ATM_PPE_AMAZON_SE_H @@ -87,7 +114,7 @@ /* * Mailbox IGU1 Interrupt */ -#define PPE_MAILBOX_IGU1_INT (INT_NUM_IM2_IRL0 + 13) +#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL13 diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_ar9.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h index 5c5bfa8260..fae0252c31 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_ar9.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h @@ -181,7 +181,7 @@ /* * Mailbox IGU1 Interrupt */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL0 + 24 +#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_common.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_common.h index 30b12c80d6..ee55fd7a0f 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_common.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_common.h @@ -27,7 +27,10 @@ #ifndef IFXMIPS_ATM_PPE_COMMON_H #define IFXMIPS_ATM_PPE_COMMON_H -#if defined(CONFIG_DANUBE) + + + +#if defined(CONFIG_DANUBE) #include "ifxmips_atm_ppe_danube.h" #elif defined(CONFIG_AMAZON_SE) #include "ifxmips_atm_ppe_amazon_se.h" diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_danube.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h index 58db3a7460..7aaaa8db1e 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_danube.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h @@ -28,7 +28,7 @@ #ifndef IFXMIPS_ATM_PPE_DANUBE_H #define IFXMIPS_ATM_PPE_DANUBE_H -#include <lantiq.h> + /* * FPI Configuration Bus Register and Memory Address Mapping @@ -122,8 +122,7 @@ /* * Mailbox IGU1 Interrupt */ -#define LTQ_PPE_MBOX_INT (INT_NUM_IM2_IRL0 + 24) -#define PPE_MAILBOX_IGU1_INT LTQ_PPE_MBOX_INT +#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_vr9.h b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h index 316a772858..144c39656c 100644 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_vr9.h +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h @@ -185,7 +185,7 @@ /* * Mailbox IGU1 Interrupt */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL0 + 24 +#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 diff --git a/package/platform/lantiq/ltq-atm/src/ifxmips_atm_vr9.c b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_vr9.c new file mode 100644 index 0000000000..89c71e37e6 --- /dev/null +++ b/package/platform/lantiq/ltq-atm/src/ifxmips_atm_vr9.c @@ -0,0 +1,190 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_vr9.c +** PROJECT : UEIP +** MODULES : ATM +** +** DATE : 7 Jul 2009 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM driver common source file (core functions) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 07 JUL 2009 Xu Liang Init Version +*******************************************************************************/ + + + +/* + * #################################### + * Head File + * #################################### + */ + +/* + * Common Head File + */ +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/version.h> +#include <linux/types.h> +#include <linux/errno.h> +#include <linux/proc_fs.h> +#include <linux/init.h> +#include <linux/ioctl.h> +#include <asm/delay.h> + +#include "ifxmips_atm_core.h" +#include "ifxmips_atm_fw_vr9.h" + +#ifdef CONFIG_VR9 + +#include <lantiq_soc.h> + +#define IFX_PMU_MODULE_PPE_SLL01 BIT(19) +#define IFX_PMU_MODULE_PPE_TC BIT(21) +#define IFX_PMU_MODULE_PPE_EMA BIT(22) +#define IFX_PMU_MODULE_PPE_QSB BIT(18) +#define IFX_PMU_MODULE_AHBS BIT(13) +#define IFX_PMU_MODULE_DSL_DFE BIT(9) + +static inline void vr9_reset_ppe(void) +{ +/*#ifdef MODULE + // reset PPE + ifx_rcu_rst(IFX_RCU_DOMAIN_DSLDFE, IFX_RCU_MODULE_ATM); + udelay(1000); + ifx_rcu_rst(IFX_RCU_DOMAIN_DSLTC, IFX_RCU_MODULE_ATM); + udelay(1000); + ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); + udelay(1000); + *PP32_SRST &= ~0x000303CF; + udelay(1000); + *PP32_SRST |= 0x000303CF; + udelay(1000); +#endif*/ +} + +static inline int vr9_pp32_download_code(int pp32, u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) +{ + unsigned int clr, set; + volatile u32 *dest; + + if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 + || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) + return -1; + + clr = pp32 ? 0xF0 : 0x0F; + if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) + set = pp32 ? (3 << 6): (2 << 2); + else + set = 0x00; + IFX_REG_W32_MASK(clr, set, CDM_CFG); + + dest = CDM_CODE_MEMORY(pp32, 0); + while ( code_dword_len-- > 0 ) + IFX_REG_W32(*code_src++, dest++); + + dest = CDM_DATA_MEMORY(pp32, 0); + while ( data_dword_len-- > 0 ) + IFX_REG_W32(*data_src++, dest++); + + return 0; +} + +static void vr9_fw_ver(unsigned int *major, unsigned int *minor) +{ + + *major = FW_VER_ID->major; + *minor = FW_VER_ID->minor; +} + +static void vr9_init(void) +{ + volatile u32 *p; + unsigned int i; + + /* setup pmu */ + ltq_pmu_enable(IFX_PMU_MODULE_PPE_SLL01 | + IFX_PMU_MODULE_PPE_TC | + IFX_PMU_MODULE_PPE_EMA | + IFX_PMU_MODULE_PPE_QSB | + IFX_PMU_MODULE_AHBS | + IFX_PMU_MODULE_DSL_DFE); + + vr9_reset_ppe(); + + /* pdma init */ + IFX_REG_W32(0x08, PDMA_CFG); + IFX_REG_W32(0x00203580, SAR_PDMA_RX_CMDBUF_CFG); + IFX_REG_W32(0x004035A0, SAR_PDMA_RX_FW_CMDBUF_CFG); + + /* mailbox init */ + IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); + IFX_REG_W32(0x00000000, MBOX_IGU1_IER); + IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); + IFX_REG_W32(0x00000000, MBOX_IGU3_IER); + + /* tc init - clear sync state */ + *SFSM_STATE0 = 0; + *SFSM_STATE1 = 0; + + /* init shared buffer */ + p = SB_RAM0_ADDR(0); + for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ ) + IFX_REG_W32(0, p++); + + p = SB_RAM6_ADDR(0); + for ( i = 0; i < SB_RAM6_DWLEN; i++ ) + IFX_REG_W32(0, p++); +} + +static void vr9_shutdown(void) +{ +} + +static int vr9_start(int pp32) +{ + unsigned int mask = 1 << (pp32 << 4); + int ret; + + /* download firmware */ + ret = vr9_pp32_download_code(pp32, + vr9_fw_bin, sizeof(vr9_fw_bin) / sizeof(*vr9_fw_bin), + vr9_fw_data, sizeof(vr9_fw_data) / sizeof(*vr9_fw_data)); + if ( ret != 0 ) + return ret; + + /* run PP32 */ + IFX_REG_W32_MASK(mask, 0, PP32_FREEZE); + + /* idle for a while to let PP32 init itself */ + udelay(10); + + return 0; +} + +static void vr9_stop(int pp32) +{ + unsigned int mask = 1 << (pp32 << 4); + + IFX_REG_W32_MASK(0, mask, PP32_FREEZE); +} + +struct ltq_atm_ops vr9_ops = { + .init = vr9_init, + .shutdown = vr9_shutdown, + .start = vr9_start, + .stop = vr9_stop, + .fw_ver = vr9_fw_ver, +}; + +#endif diff --git a/package/platform/lantiq/ltq-atm/src/ltq_atm.c b/package/platform/lantiq/ltq-atm/src/ltq_atm.c new file mode 100644 index 0000000000..ff4bbfcea4 --- /dev/null +++ b/package/platform/lantiq/ltq-atm/src/ltq_atm.c @@ -0,0 +1,1897 @@ +/****************************************************************************** +** +** FILE NAME : ifxmips_atm_core.c +** PROJECT : UEIP +** MODULES : ATM +** +** DATE : 7 Jul 2009 +** AUTHOR : Xu Liang +** DESCRIPTION : ATM driver common source file (core functions) +** COPYRIGHT : Copyright (c) 2006 +** Infineon Technologies AG +** Am Campeon 1-12, 85579 Neubiberg, Germany +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** HISTORY +** $Date $Author $Comment +** 07 JUL 2009 Xu Liang Init Version +*******************************************************************************/ + +#define IFX_ATM_VER_MAJOR 1 +#define IFX_ATM_VER_MID 0 +#define IFX_ATM_VER_MINOR 26 + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/version.h> +#include <linux/types.h> +#include <linux/errno.h> +#include <linux/proc_fs.h> +#include <linux/init.h> +#include <linux/ioctl.h> +#include <linux/atmdev.h> +#include <linux/platform_device.h> +#include <linux/of_device.h> +#include <linux/atm.h> +#include <linux/clk.h> +#include <linux/interrupt.h> +#ifdef CONFIG_XFRM + #include <net/xfrm.h> +#endif + +#include <lantiq_soc.h> + +#include "ifxmips_atm_core.h" + +#define MODULE_PARM_ARRAY(a, b) module_param_array(a, int, NULL, 0) +#define MODULE_PARM(a, b) module_param(a, int, 0) + +/*! + \brief QSB cell delay variation due to concurrency + */ +static int qsb_tau = 1; /* QSB cell delay variation due to concurrency */ +/*! + \brief QSB scheduler burst length + */ +static int qsb_srvm = 0x0F; /* QSB scheduler burst length */ +/*! + \brief QSB time step, all legal values are 1, 2, 4 + */ +static int qsb_tstep = 4 ; /* QSB time step, all legal values are 1, 2, 4 */ + +/*! + \brief Write descriptor delay + */ +static int write_descriptor_delay = 0x20; /* Write descriptor delay */ + +/*! + \brief AAL5 padding byte ('~') + */ +static int aal5_fill_pattern = 0x007E; /* AAL5 padding byte ('~') */ +/*! + \brief Max frame size for RX + */ +static int aal5r_max_packet_size = 0x0700; /* Max frame size for RX */ +/*! + \brief Min frame size for RX + */ +static int aal5r_min_packet_size = 0x0000; /* Min frame size for RX */ +/*! + \brief Max frame size for TX + */ +static int aal5s_max_packet_size = 0x0700; /* Max frame size for TX */ +/*! + \brief Min frame size for TX + */ +static int aal5s_min_packet_size = 0x0000; /* Min frame size for TX */ +/*! + \brief Drop error packet in RX path + */ +static int aal5r_drop_error_packet = 1; /* Drop error packet in RX path */ + +/*! + \brief Number of descriptors per DMA RX channel + */ +static int dma_rx_descriptor_length = 128; /* Number of descriptors per DMA RX channel */ +/*! + \brief Number of descriptors per DMA TX channel + */ +static int dma_tx_descriptor_length = 64; /* Number of descriptors per DMA TX channel */ +/*! + \brief PPE core clock cycles between descriptor write and effectiveness in external RAM + */ +static int dma_rx_clp1_descriptor_threshold = 38; +/*@}*/ + +MODULE_PARM(qsb_tau, "i"); +MODULE_PARM_DESC(qsb_tau, "Cell delay variation. Value must be > 0"); +MODULE_PARM(qsb_srvm, "i"); +MODULE_PARM_DESC(qsb_srvm, "Maximum burst size"); +MODULE_PARM(qsb_tstep, "i"); +MODULE_PARM_DESC(qsb_tstep, "n*32 cycles per sbs cycles n=1,2,4"); + +MODULE_PARM(write_descriptor_delay, "i"); +MODULE_PARM_DESC(write_descriptor_delay, "PPE core clock cycles between descriptor write and effectiveness in external RAM"); + +MODULE_PARM(aal5_fill_pattern, "i"); +MODULE_PARM_DESC(aal5_fill_pattern, "Filling pattern (PAD) for AAL5 frames"); +MODULE_PARM(aal5r_max_packet_size, "i"); +MODULE_PARM_DESC(aal5r_max_packet_size, "Max packet size in byte for downstream AAL5 frames"); +MODULE_PARM(aal5r_min_packet_size, "i"); +MODULE_PARM_DESC(aal5r_min_packet_size, "Min packet size in byte for downstream AAL5 frames"); +MODULE_PARM(aal5s_max_packet_size, "i"); +MODULE_PARM_DESC(aal5s_max_packet_size, "Max packet size in byte for upstream AAL5 frames"); +MODULE_PARM(aal5s_min_packet_size, "i"); +MODULE_PARM_DESC(aal5s_min_packet_size, "Min packet size in byte for upstream AAL5 frames"); +MODULE_PARM(aal5r_drop_error_packet, "i"); +MODULE_PARM_DESC(aal5r_drop_error_packet, "Non-zero value to drop error packet for downstream"); + +MODULE_PARM(dma_rx_descriptor_length, "i"); +MODULE_PARM_DESC(dma_rx_descriptor_length, "Number of descriptor assigned to DMA RX channel (>16)"); +MODULE_PARM(dma_tx_descriptor_length, "i"); +MODULE_PARM_DESC(dma_tx_descriptor_length, "Number of descriptor assigned to DMA TX channel (>16)"); +MODULE_PARM(dma_rx_clp1_descriptor_threshold, "i"); +MODULE_PARM_DESC(dma_rx_clp1_descriptor_threshold, "Descriptor threshold for cells with cell loss priority 1"); + + + +/* + * #################################### + * Definition + * #################################### + */ + +#ifdef CONFIG_AMAZON_SE + #define ENABLE_LESS_CACHE_INV 1 + #define LESS_CACHE_INV_LEN 96 +#endif + +#define DUMP_SKB_LEN ~0 + + + +/* + * #################################### + * Declaration + * #################################### + */ + +/* + * Network Operations + */ +static int ppe_ioctl(struct atm_dev *, unsigned int, void *); +static int ppe_open(struct atm_vcc *); +static void ppe_close(struct atm_vcc *); +static int ppe_send(struct atm_vcc *, struct sk_buff *); +static int ppe_send_oam(struct atm_vcc *, void *, int); +static int ppe_change_qos(struct atm_vcc *, struct atm_qos *, int); + +/* + * ADSL LED + */ +static inline void adsl_led_flash(void); + +/* + * 64-bit operation used by MIB calculation + */ +static inline void u64_add_u32(ppe_u64_t, unsigned int, ppe_u64_t *); + +/* + * buffer manage functions + */ +static inline struct sk_buff* alloc_skb_rx(void); +static inline struct sk_buff* alloc_skb_tx(unsigned int); +struct sk_buff* atm_alloc_tx(struct atm_vcc *, unsigned int); +static inline void atm_free_tx_skb_vcc(struct sk_buff *, struct atm_vcc *); +static inline struct sk_buff *get_skb_rx_pointer(unsigned int); +static inline int get_tx_desc(unsigned int); +static struct sk_buff* skb_duplicate(struct sk_buff *); +static struct sk_buff* skb_break_away_from_protocol(struct sk_buff *); + +/* + * mailbox handler and signal function + */ +static inline void mailbox_oam_rx_handler(void); +static inline void mailbox_aal_rx_handler(void); +static irqreturn_t mailbox_irq_handler(int, void *); +static inline void mailbox_signal(unsigned int, int); + +/* + * QSB & HTU setting functions + */ +static void set_qsb(struct atm_vcc *, struct atm_qos *, unsigned int); +static void qsb_global_set(void); +static inline void set_htu_entry(unsigned int, unsigned int, unsigned int, int, int); +static inline void clear_htu_entry(unsigned int); +static void validate_oam_htu_entry(void); +static void invalidate_oam_htu_entry(void); + +/* + * look up for connection ID + */ +static inline int find_vpi(unsigned int); +static inline int find_vpivci(unsigned int, unsigned int); +static inline int find_vcc(struct atm_vcc *); + +static inline int ifx_atm_version(const struct ltq_atm_ops *ops, char *); + +/* + * Init & clean-up functions + */ +static inline void check_parameters(void); +static inline int init_priv_data(void); +static inline void clear_priv_data(void); +static inline void init_rx_tables(void); +static inline void init_tx_tables(void); + +/* + * Exteranl Function + */ +#if defined(CONFIG_IFX_OAM) || defined(CONFIG_IFX_OAM_MODULE) +extern void ifx_push_oam(unsigned char *); +#else +static inline void ifx_push_oam(unsigned char *dummy) {} +#endif + +#if defined(CONFIG_IFXMIPS_DSL_CPE_MEI) || defined(CONFIG_IFXMIPS_DSL_CPE_MEI_MODULE) +extern int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr); +extern int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *); + +extern int (*ifx_mei_atm_showtime_exit)(void); +extern int ifx_mei_atm_led_blink(void); +#else +static inline int ifx_mei_atm_led_blink(void) { return 0; } +static inline int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr) +{ + if ( is_showtime != NULL ) + *is_showtime = 0; + return 0; +} +int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL; +EXPORT_SYMBOL(ifx_mei_atm_showtime_enter); + +int (*ifx_mei_atm_showtime_exit)(void) = NULL; +EXPORT_SYMBOL(ifx_mei_atm_showtime_exit); + +#endif + +static struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL; + +static struct atm_priv_data g_atm_priv_data; + +static struct atmdev_ops g_ifx_atm_ops = { + .open = ppe_open, + .close = ppe_close, + .ioctl = ppe_ioctl, + .send = ppe_send, + .send_oam = ppe_send_oam, + .change_qos = ppe_change_qos, + .owner = THIS_MODULE, +}; + +static int g_showtime = 0; +static void *g_xdata_addr = NULL; + +static int ppe_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg) +{ + int ret = 0; + atm_cell_ifEntry_t mib_cell; + atm_aal5_ifEntry_t mib_aal5; + atm_aal5_vcc_x_t mib_vcc; + unsigned int value; + int conn; + + if ( _IOC_TYPE(cmd) != PPE_ATM_IOC_MAGIC + || _IOC_NR(cmd) >= PPE_ATM_IOC_MAXNR ) + return -ENOTTY; + + if ( _IOC_DIR(cmd) & _IOC_READ ) + ret = !access_ok(VERIFY_WRITE, arg, _IOC_SIZE(cmd)); + else if ( _IOC_DIR(cmd) & _IOC_WRITE ) + ret = !access_ok(VERIFY_READ, arg, _IOC_SIZE(cmd)); + if ( ret ) + return -EFAULT; + + switch (cmd) { + case PPE_ATM_MIB_CELL: /* cell level MIB */ + /* These MIB should be read at ARC side, now put zero only. */ + mib_cell.ifHCInOctets_h = 0; + mib_cell.ifHCInOctets_l = 0; + mib_cell.ifHCOutOctets_h = 0; + mib_cell.ifHCOutOctets_l = 0; + mib_cell.ifInErrors = 0; + mib_cell.ifInUnknownProtos = WAN_MIB_TABLE->wrx_drophtu_cell; + mib_cell.ifOutErrors = 0; + + ret = sizeof(mib_cell) - copy_to_user(arg, &mib_cell, sizeof(mib_cell)); + break; + + case PPE_ATM_MIB_AAL5: /* AAL5 MIB */ + value = WAN_MIB_TABLE->wrx_total_byte; + u64_add_u32(g_atm_priv_data.wrx_total_byte, value - g_atm_priv_data.prev_wrx_total_byte, &g_atm_priv_data.wrx_total_byte); + g_atm_priv_data.prev_wrx_total_byte = value; + mib_aal5.ifHCInOctets_h = g_atm_priv_data.wrx_total_byte.h; + mib_aal5.ifHCInOctets_l = g_atm_priv_data.wrx_total_byte.l; + + value = WAN_MIB_TABLE->wtx_total_byte; + u64_add_u32(g_atm_priv_data.wtx_total_byte, value - g_atm_priv_data.prev_wtx_total_byte, &g_atm_priv_data.wtx_total_byte); + g_atm_priv_data.prev_wtx_total_byte = value; + mib_aal5.ifHCOutOctets_h = g_atm_priv_data.wtx_total_byte.h; + mib_aal5.ifHCOutOctets_l = g_atm_priv_data.wtx_total_byte.l; + + mib_aal5.ifInUcastPkts = g_atm_priv_data.wrx_pdu; + mib_aal5.ifOutUcastPkts = WAN_MIB_TABLE->wtx_total_pdu; + mib_aal5.ifInErrors = WAN_MIB_TABLE->wrx_err_pdu; + mib_aal5.ifInDiscards = WAN_MIB_TABLE->wrx_dropdes_pdu + g_atm_priv_data.wrx_drop_pdu; + mib_aal5.ifOutErros = g_atm_priv_data.wtx_err_pdu; + mib_aal5.ifOutDiscards = g_atm_priv_data.wtx_drop_pdu; + + ret = sizeof(mib_aal5) - copy_to_user(arg, &mib_aal5, sizeof(mib_aal5)); + break; + + case PPE_ATM_MIB_VCC: /* VCC related MIB */ + copy_from_user(&mib_vcc, arg, sizeof(mib_vcc)); + conn = find_vpivci(mib_vcc.vpi, mib_vcc.vci); + if (conn >= 0) { + mib_vcc.mib_vcc.aal5VccCrcErrors = g_atm_priv_data.conn[conn].aal5_vcc_crc_err; + mib_vcc.mib_vcc.aal5VccOverSizedSDUs = g_atm_priv_data.conn[conn].aal5_vcc_oversize_sdu; + mib_vcc.mib_vcc.aal5VccSarTimeOuts = 0; /* no timer support */ + ret = sizeof(mib_vcc) - copy_to_user(arg, &mib_vcc, sizeof(mib_vcc)); + } else + ret = -EINVAL; + break; + + default: + ret = -ENOIOCTLCMD; + } + + return ret; +} + +static int ppe_open(struct atm_vcc *vcc) +{ + int ret; + short vpi = vcc->vpi; + int vci = vcc->vci; + struct port *port = &g_atm_priv_data.port[(int)vcc->dev->dev_data]; + int conn; + int f_enable_irq = 0; + + if ( vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0 ) + return -EPROTONOSUPPORT; + +#if !defined(DISABLE_QOS_WORKAROUND) || !DISABLE_QOS_WORKAROUND + /* check bandwidth */ + if ( (vcc->qos.txtp.traffic_class == ATM_CBR && vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) + || (vcc->qos.txtp.traffic_class == ATM_VBR_RT && vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) + || (vcc->qos.txtp.traffic_class == ATM_VBR_NRT && vcc->qos.txtp.scr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) + || (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS && vcc->qos.txtp.min_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) ) + { + ret = -EINVAL; + goto PPE_OPEN_EXIT; + } +#endif + + /* check existing vpi,vci */ + conn = find_vpivci(vpi, vci); + if ( conn >= 0 ) { + ret = -EADDRINUSE; + goto PPE_OPEN_EXIT; + } + + /* check whether it need to enable irq */ + if ( g_atm_priv_data.conn_table == 0 ) + f_enable_irq = 1; + + /* allocate connection */ + for ( conn = 0; conn < MAX_PVC_NUMBER; conn++ ) { + if ( test_and_set_bit(conn, &g_atm_priv_data.conn_table) == 0 ) { + g_atm_priv_data.conn[conn].vcc = vcc; + break; + } + } + if ( conn == MAX_PVC_NUMBER ) { + ret = -EINVAL; + goto PPE_OPEN_EXIT; + } + + /* reserve bandwidth */ + switch ( vcc->qos.txtp.traffic_class ) { + case ATM_CBR: + case ATM_VBR_RT: + port->tx_current_cell_rate += vcc->qos.txtp.max_pcr; + break; + case ATM_VBR_NRT: + port->tx_current_cell_rate += vcc->qos.txtp.scr; + break; + case ATM_UBR_PLUS: + port->tx_current_cell_rate += vcc->qos.txtp.min_pcr; + break; + } + + /* set qsb */ + set_qsb(vcc, &vcc->qos, conn); + + /* update atm_vcc structure */ + vcc->itf = (int)vcc->dev->dev_data; + vcc->vpi = vpi; + vcc->vci = vci; + set_bit(ATM_VF_READY, &vcc->flags); + + /* enable irq */ + if ( f_enable_irq ) { + ifx_atm_alloc_tx = atm_alloc_tx; + + *MBOX_IGU1_ISRC = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); + *MBOX_IGU1_IER = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); + + enable_irq(PPE_MAILBOX_IGU1_INT); + } + + /* set port */ + WTX_QUEUE_CONFIG(conn + FIRST_QSB_QID)->sbid = (int)vcc->dev->dev_data; + + /* set htu entry */ + set_htu_entry(vpi, vci, conn, vcc->qos.aal == ATM_AAL5 ? 1 : 0, 0); + + ret = 0; + +PPE_OPEN_EXIT: + return ret; +} + +static void ppe_close(struct atm_vcc *vcc) +{ + int conn; + struct port *port; + struct connection *connection; + if ( vcc == NULL ) + return; + + /* get connection id */ + conn = find_vcc(vcc); + if ( conn < 0 ) { + pr_err("can't find vcc\n"); + goto PPE_CLOSE_EXIT; + } + connection = &g_atm_priv_data.conn[conn]; + port = &g_atm_priv_data.port[connection->port]; + + /* clear htu */ + clear_htu_entry(conn); + + /* release connection */ + connection->vcc = NULL; + connection->aal5_vcc_crc_err = 0; + connection->aal5_vcc_oversize_sdu = 0; + clear_bit(conn, &g_atm_priv_data.conn_table); + + /* disable irq */ + if ( g_atm_priv_data.conn_table == 0 ) { + disable_irq(PPE_MAILBOX_IGU1_INT); + ifx_atm_alloc_tx = NULL; + } + + /* release bandwidth */ + switch ( vcc->qos.txtp.traffic_class ) + { + case ATM_CBR: + case ATM_VBR_RT: + port->tx_current_cell_rate -= vcc->qos.txtp.max_pcr; + break; + case ATM_VBR_NRT: + port->tx_current_cell_rate -= vcc->qos.txtp.scr; + break; + case ATM_UBR_PLUS: + port->tx_current_cell_rate -= vcc->qos.txtp.min_pcr; + break; + } + +PPE_CLOSE_EXIT: + return; +} + +static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb) +{ + int ret; + int conn; + int desc_base; + struct tx_descriptor reg_desc = {0}; + struct sk_buff *new_skb; + + if ( vcc == NULL || skb == NULL ) + return -EINVAL; + + skb_get(skb); + atm_free_tx_skb_vcc(skb, vcc); + + conn = find_vcc(vcc); + if ( conn < 0 ) { + ret = -EINVAL; + goto FIND_VCC_FAIL; + } + + if ( !g_showtime ) { + pr_debug("not in showtime\n"); + ret = -EIO; + goto PPE_SEND_FAIL; + } + + if ( vcc->qos.aal == ATM_AAL5 ) { + int byteoff; + int datalen; + struct tx_inband_header *header; + + byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1); + if ( skb_headroom(skb) < byteoff + TX_INBAND_HEADER_LENGTH ) + new_skb = skb_duplicate(skb); + else + new_skb = skb_break_away_from_protocol(skb); + if ( new_skb == NULL ) { + pr_err("either skb_duplicate or skb_break_away_from_protocol fail\n"); + ret = -ENOMEM; + goto PPE_SEND_FAIL; + } + dev_kfree_skb_any(skb); + skb = new_skb; + + datalen = skb->len; + byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1); + + skb_push(skb, byteoff + TX_INBAND_HEADER_LENGTH); + + header = (struct tx_inband_header *)skb->data; + + /* setup inband trailer */ + header->uu = 0; + header->cpi = 0; + header->pad = aal5_fill_pattern; + header->res1 = 0; + + /* setup cell header */ + header->clp = (vcc->atm_options & ATM_ATMOPT_CLP) ? 1 : 0; + header->pti = ATM_PTI_US0; + header->vci = vcc->vci; + header->vpi = vcc->vpi; + header->gfc = 0; + + /* setup descriptor */ + reg_desc.dataptr = (unsigned int)skb->data >> 2; + reg_desc.datalen = datalen; + reg_desc.byteoff = byteoff; + reg_desc.iscell = 0; + } else { + /* if data pointer is not aligned, allocate new sk_buff */ + if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 ) { + pr_err("skb->data not aligned\n"); + new_skb = skb_duplicate(skb); + } else + new_skb = skb_break_away_from_protocol(skb); + if ( new_skb == NULL ) { + pr_err("either skb_duplicate or skb_break_away_from_protocol fail\n"); + ret = -ENOMEM; + goto PPE_SEND_FAIL; + } + dev_kfree_skb_any(skb); + skb = new_skb; + + reg_desc.dataptr = (unsigned int)skb->data >> 2; + reg_desc.datalen = skb->len; + reg_desc.byteoff = 0; + reg_desc.iscell = 1; + } + + reg_desc.own = 1; + reg_desc.c = 1; + reg_desc.sop = reg_desc.eop = 1; + + desc_base = get_tx_desc(conn); + if ( desc_base < 0 ) { + pr_debug("ALLOC_TX_CONNECTION_FAIL\n"); + ret = -EIO; + goto PPE_SEND_FAIL; + } + + if ( vcc->stats ) + atomic_inc(&vcc->stats->tx); + if ( vcc->qos.aal == ATM_AAL5 ) + g_atm_priv_data.wtx_pdu++; + + /* update descriptor send pointer */ + if ( g_atm_priv_data.conn[conn].tx_skb[desc_base] != NULL ) + dev_kfree_skb_any(g_atm_priv_data.conn[conn].tx_skb[desc_base]); + g_atm_priv_data.conn[conn].tx_skb[desc_base] = skb; + + /* write discriptor to memory and write back cache */ + g_atm_priv_data.conn[conn].tx_desc[desc_base] = reg_desc; + dma_cache_wback((unsigned long)skb->data, skb->len); + + mailbox_signal(conn, 1); + + adsl_led_flash(); + + return 0; + +FIND_VCC_FAIL: + pr_err("FIND_VCC_FAIL\n"); + g_atm_priv_data.wtx_err_pdu++; + dev_kfree_skb_any(skb); + return ret; + +PPE_SEND_FAIL: + if ( vcc->qos.aal == ATM_AAL5 ) + g_atm_priv_data.wtx_drop_pdu++; + if ( vcc->stats ) + atomic_inc(&vcc->stats->tx_err); + dev_kfree_skb_any(skb); + return ret; +} + +/* operation and maintainance */ +static int ppe_send_oam(struct atm_vcc *vcc, void *cell, int flags) +{ + int conn; + struct uni_cell_header *uni_cell_header = (struct uni_cell_header *)cell; + int desc_base; + struct sk_buff *skb; + struct tx_descriptor reg_desc = {0}; + + if ( ((uni_cell_header->pti == ATM_PTI_SEGF5 || uni_cell_header->pti == ATM_PTI_E2EF5) + && find_vpivci(uni_cell_header->vpi, uni_cell_header->vci) < 0) + || ((uni_cell_header->vci == 0x03 || uni_cell_header->vci == 0x04) + && find_vpi(uni_cell_header->vpi) < 0) ) + { + g_atm_priv_data.wtx_err_oam++; + return -EINVAL; + } + + if ( !g_showtime ) { + pr_err("not in showtime\n"); + g_atm_priv_data.wtx_drop_oam++; + return -EIO; + } + + conn = find_vcc(vcc); + if ( conn < 0 ) { + pr_err("FIND_VCC_FAIL\n"); + g_atm_priv_data.wtx_drop_oam++; + return -EINVAL; + } + + skb = alloc_skb_tx(CELL_SIZE); + if ( skb == NULL ) { + pr_err("ALLOC_SKB_TX_FAIL\n"); + g_atm_priv_data.wtx_drop_oam++; + return -ENOMEM; + } + skb_put(skb, CELL_SIZE); + memcpy(skb->data, cell, CELL_SIZE); + + reg_desc.dataptr = (unsigned int)skb->data >> 2; + reg_desc.datalen = CELL_SIZE; + reg_desc.byteoff = 0; + reg_desc.iscell = 1; + + reg_desc.own = 1; + reg_desc.c = 1; + reg_desc.sop = reg_desc.eop = 1; + + desc_base = get_tx_desc(conn); + if ( desc_base < 0 ) { + dev_kfree_skb_any(skb); + pr_err("ALLOC_TX_CONNECTION_FAIL\n"); + g_atm_priv_data.wtx_drop_oam++; + return -EIO; + } + + if ( vcc->stats ) + atomic_inc(&vcc->stats->tx); + + /* update descriptor send pointer */ + if ( g_atm_priv_data.conn[conn].tx_skb[desc_base] != NULL ) + dev_kfree_skb_any(g_atm_priv_data.conn[conn].tx_skb[desc_base]); + g_atm_priv_data.conn[conn].tx_skb[desc_base] = skb; + + /* write discriptor to memory and write back cache */ + g_atm_priv_data.conn[conn].tx_desc[desc_base] = reg_desc; + dma_cache_wback((unsigned long)skb->data, CELL_SIZE); + + mailbox_signal(conn, 1); + + g_atm_priv_data.wtx_oam++; + adsl_led_flash(); + + return 0; +} + +static int ppe_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags) +{ + int conn; + + if ( vcc == NULL || qos == NULL ) + return -EINVAL; + + conn = find_vcc(vcc); + if ( conn < 0 ) + return -EINVAL; + + set_qsb(vcc, qos, conn); + + return 0; +} + +static inline void adsl_led_flash(void) +{ + ifx_mei_atm_led_blink(); +} + +/* +* Description: +* Add a 32-bit value to 64-bit value, and put result in a 64-bit variable. +* Input: +* opt1 --- ppe_u64_t, first operand, a 64-bit unsigned integer value +* opt2 --- unsigned int, second operand, a 32-bit unsigned integer value +* ret --- ppe_u64_t, pointer to a variable to hold result +* Output: +* none +*/ +static inline void u64_add_u32(ppe_u64_t opt1, unsigned int opt2, ppe_u64_t *ret) +{ + ret->l = opt1.l + opt2; + if ( ret->l < opt1.l || ret->l < opt2 ) + ret->h++; +} + +static inline struct sk_buff* alloc_skb_rx(void) +{ + struct sk_buff *skb; + + skb = dev_alloc_skb(RX_DMA_CH_AAL_BUF_SIZE + DATA_BUFFER_ALIGNMENT); + if ( skb != NULL ) { + /* must be burst length alignment */ + if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 ) + skb_reserve(skb, ~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1)); + /* pub skb in reserved area "skb->data - 4" */ + *((struct sk_buff **)skb->data - 1) = skb; + /* write back and invalidate cache */ + dma_cache_wback_inv((unsigned long)skb->data - sizeof(skb), sizeof(skb)); + /* invalidate cache */ +#if defined(ENABLE_LESS_CACHE_INV) && ENABLE_LESS_CACHE_INV + dma_cache_inv((unsigned long)skb->data, LESS_CACHE_INV_LEN); +#else + dma_cache_inv((unsigned long)skb->data, RX_DMA_CH_AAL_BUF_SIZE); +#endif + } + return skb; +} + +static inline struct sk_buff* alloc_skb_tx(unsigned int size) +{ + struct sk_buff *skb; + + /* allocate memory including header and padding */ + size += TX_INBAND_HEADER_LENGTH + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES; + size &= ~(DATA_BUFFER_ALIGNMENT - 1); + skb = dev_alloc_skb(size + DATA_BUFFER_ALIGNMENT); + /* must be burst length alignment */ + if ( skb != NULL ) + skb_reserve(skb, (~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1)) + TX_INBAND_HEADER_LENGTH); + return skb; +} + +struct sk_buff* atm_alloc_tx(struct atm_vcc *vcc, unsigned int size) +{ + int conn; + struct sk_buff *skb; + + /* oversize packet */ + if ( size > aal5s_max_packet_size ) { + pr_err("atm_alloc_tx: oversize packet\n"); + return NULL; + } + /* send buffer overflow */ + if ( atomic_read(&sk_atm(vcc)->sk_wmem_alloc) && !atm_may_send(vcc, size) ) { + pr_err("atm_alloc_tx: send buffer overflow\n"); + return NULL; + } + conn = find_vcc(vcc); + if ( conn < 0 ) { + pr_err("atm_alloc_tx: unknown VCC\n"); + return NULL; + } + + skb = dev_alloc_skb(size); + if ( skb == NULL ) { + pr_err("atm_alloc_tx: sk buffer is used up\n"); + return NULL; + } + + atomic_add(skb->truesize, &sk_atm(vcc)->sk_wmem_alloc); + + return skb; +} + +static inline void atm_free_tx_skb_vcc(struct sk_buff *skb, struct atm_vcc *vcc) +{ + if ( vcc->pop != NULL ) + vcc->pop(vcc, skb); + else + dev_kfree_skb_any(skb); +} + +static inline struct sk_buff *get_skb_rx_pointer(unsigned int dataptr) +{ + unsigned int skb_dataptr; + struct sk_buff *skb; + + skb_dataptr = ((dataptr - 1) << 2) | KSEG1; + skb = *(struct sk_buff **)skb_dataptr; + + ASSERT((unsigned int)skb >= KSEG0, "invalid skb - skb = %#08x, dataptr = %#08x", (unsigned int)skb, dataptr); + ASSERT(((unsigned int)skb->data | KSEG1) == ((dataptr << 2) | KSEG1), "invalid skb - skb = %#08x, skb->data = %#08x, dataptr = %#08x", (unsigned int)skb, (unsigned int)skb->data, dataptr); + + return skb; +} + +static inline int get_tx_desc(unsigned int conn) +{ + int desc_base = -1; + struct connection *p_conn = &g_atm_priv_data.conn[conn]; + + if ( p_conn->tx_desc[p_conn->tx_desc_pos].own == 0 ) { + desc_base = p_conn->tx_desc_pos; + if ( ++(p_conn->tx_desc_pos) == dma_tx_descriptor_length ) + p_conn->tx_desc_pos = 0; + } + + return desc_base; +} + +static struct sk_buff* skb_duplicate(struct sk_buff *skb) +{ + struct sk_buff *new_skb; + + new_skb = alloc_skb_tx(skb->len); + if ( new_skb == NULL ) + return NULL; + + skb_put(new_skb, skb->len); + memcpy(new_skb->data, skb->data, skb->len); + + return new_skb; +} + +static struct sk_buff* skb_break_away_from_protocol(struct sk_buff *skb) +{ + struct sk_buff *new_skb; + + if ( skb_shared(skb) ) { + new_skb = skb_clone(skb, GFP_ATOMIC); + if ( new_skb == NULL ) + return NULL; + } else + new_skb = skb_get(skb); + + skb_dst_drop(new_skb); +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) + nf_conntrack_put(new_skb->nfct); + new_skb->nfct = NULL; + nf_conntrack_put_reasm(new_skb->nfct_reasm); + new_skb->nfct_reasm = NULL; + #ifdef CONFIG_BRIDGE_NETFILTER + nf_bridge_put(new_skb->nf_bridge); + new_skb->nf_bridge = NULL; + #endif +#endif + + return new_skb; +} + +static inline void mailbox_oam_rx_handler(void) +{ + unsigned int vlddes = WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_OAM)->vlddes; + struct rx_descriptor reg_desc; + struct uni_cell_header *header; + int conn; + struct atm_vcc *vcc; + unsigned int i; + + for ( i = 0; i < vlddes; i++ ) { + unsigned int loop_count = 0; + + do { + reg_desc = g_atm_priv_data.oam_desc[g_atm_priv_data.oam_desc_pos]; + if ( ++loop_count == 1000 ) + break; + } while ( reg_desc.own || !reg_desc.c ); // keep test OWN and C bit until data is ready + ASSERT(loop_count == 1, "loop_count = %u, own = %d, c = %d, oam_desc_pos = %u", loop_count, (int)reg_desc.own, (int)reg_desc.c, g_atm_priv_data.oam_desc_pos); + + header = (struct uni_cell_header *)&g_atm_priv_data.oam_buf[g_atm_priv_data.oam_desc_pos * RX_DMA_CH_OAM_BUF_SIZE]; + + if ( header->pti == ATM_PTI_SEGF5 || header->pti == ATM_PTI_E2EF5 ) + conn = find_vpivci(header->vpi, header->vci); + else if ( header->vci == 0x03 || header->vci == 0x04 ) + conn = find_vpi(header->vpi); + else + conn = -1; + + if ( conn >= 0 && g_atm_priv_data.conn[conn].vcc != NULL ) { + vcc = g_atm_priv_data.conn[conn].vcc; + + if ( vcc->push_oam != NULL ) + vcc->push_oam(vcc, header); + else + ifx_push_oam((unsigned char *)header); + + g_atm_priv_data.wrx_oam++; + + adsl_led_flash(); + } else + g_atm_priv_data.wrx_drop_oam++; + + reg_desc.byteoff = 0; + reg_desc.datalen = RX_DMA_CH_OAM_BUF_SIZE; + reg_desc.own = 1; + reg_desc.c = 0; + + g_atm_priv_data.oam_desc[g_atm_priv_data.oam_desc_pos] = reg_desc; + if ( ++g_atm_priv_data.oam_desc_pos == RX_DMA_CH_OAM_DESC_LEN ) + g_atm_priv_data.oam_desc_pos = 0; + + dma_cache_inv((unsigned long)header, CELL_SIZE); + mailbox_signal(RX_DMA_CH_OAM, 0); + } +} + +static inline void mailbox_aal_rx_handler(void) +{ + unsigned int vlddes = WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_AAL)->vlddes; + struct rx_descriptor reg_desc; + int conn; + struct atm_vcc *vcc; + struct sk_buff *skb, *new_skb; + struct rx_inband_trailer *trailer; + unsigned int i; + + for ( i = 0; i < vlddes; i++ ) { + unsigned int loop_count = 0; + + do { + reg_desc = g_atm_priv_data.aal_desc[g_atm_priv_data.aal_desc_pos]; + if ( ++loop_count == 1000 ) + break; + } while ( reg_desc.own || !reg_desc.c ); // keep test OWN and C bit until data is ready + ASSERT(loop_count == 1, "loop_count = %u, own = %d, c = %d, aal_desc_pos = %u", loop_count, (int)reg_desc.own, (int)reg_desc.c, g_atm_priv_data.aal_desc_pos); + + conn = reg_desc.id; + + if ( g_atm_priv_data.conn[conn].vcc != NULL ) { + vcc = g_atm_priv_data.conn[conn].vcc; + + skb = get_skb_rx_pointer(reg_desc.dataptr); + + if ( reg_desc.err ) { + if ( vcc->qos.aal == ATM_AAL5 ) { + trailer = (struct rx_inband_trailer *)((unsigned int)skb->data + ((reg_desc.byteoff + reg_desc.datalen + MAX_RX_PACKET_PADDING_BYTES) & ~MAX_RX_PACKET_PADDING_BYTES)); + if ( trailer->stw_crc ) + g_atm_priv_data.conn[conn].aal5_vcc_crc_err++; + if ( trailer->stw_ovz ) + g_atm_priv_data.conn[conn].aal5_vcc_oversize_sdu++; + g_atm_priv_data.wrx_drop_pdu++; + } + if ( vcc->stats ) { + atomic_inc(&vcc->stats->rx_drop); + atomic_inc(&vcc->stats->rx_err); + } + reg_desc.err = 0; + } else if ( atm_charge(vcc, skb->truesize) ) { + new_skb = alloc_skb_rx(); + if ( new_skb != NULL ) { +#if defined(ENABLE_LESS_CACHE_INV) && ENABLE_LESS_CACHE_INV + if ( reg_desc.byteoff + reg_desc.datalen > LESS_CACHE_INV_LEN ) + dma_cache_inv((unsigned long)skb->data + LESS_CACHE_INV_LEN, reg_desc.byteoff + reg_desc.datalen - LESS_CACHE_INV_LEN); +#endif + + skb_reserve(skb, reg_desc.byteoff); + skb_put(skb, reg_desc.datalen); + ATM_SKB(skb)->vcc = vcc; + + vcc->push(vcc, skb); + + if ( vcc->qos.aal == ATM_AAL5 ) + g_atm_priv_data.wrx_pdu++; + if ( vcc->stats ) + atomic_inc(&vcc->stats->rx); + adsl_led_flash(); + + reg_desc.dataptr = (unsigned int)new_skb->data >> 2; + } else { + atm_return(vcc, skb->truesize); + if ( vcc->qos.aal == ATM_AAL5 ) + g_atm_priv_data.wrx_drop_pdu++; + if ( vcc->stats ) + atomic_inc(&vcc->stats->rx_drop); + } + } else { + if ( vcc->qos.aal == ATM_AAL5 ) + g_atm_priv_data.wrx_drop_pdu++; + if ( vcc->stats ) + atomic_inc(&vcc->stats->rx_drop); + } + } else { + g_atm_priv_data.wrx_drop_pdu++; + } + + reg_desc.byteoff = 0; + reg_desc.datalen = RX_DMA_CH_AAL_BUF_SIZE; + reg_desc.own = 1; + reg_desc.c = 0; + + g_atm_priv_data.aal_desc[g_atm_priv_data.aal_desc_pos] = reg_desc; + if ( ++g_atm_priv_data.aal_desc_pos == dma_rx_descriptor_length ) + g_atm_priv_data.aal_desc_pos = 0; + + mailbox_signal(RX_DMA_CH_AAL, 0); + } +} + +static irqreturn_t mailbox_irq_handler(int irq, void *dev_id) +{ + if ( !*MBOX_IGU1_ISR ) + return IRQ_HANDLED; + + *MBOX_IGU1_ISRC = *MBOX_IGU1_ISR; + mailbox_oam_rx_handler(); + mailbox_aal_rx_handler(); + + return IRQ_HANDLED; +} + +static inline void mailbox_signal(unsigned int queue, int is_tx) +{ + int count = 1000; + + if ( is_tx ) { + while ( MBOX_IGU3_ISR_ISR(queue + FIRST_QSB_QID + 16) && count > 0 ) + count--; + *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(queue + FIRST_QSB_QID + 16); + } else { + while ( MBOX_IGU3_ISR_ISR(queue) && count > 0 ) + count--; + *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(queue); + } + + ASSERT(count > 0, "queue = %u, is_tx = %d, MBOX_IGU3_ISR = 0x%08x", queue, is_tx, IFX_REG_R32(MBOX_IGU3_ISR)); +} + +static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue) +{ + struct clk *fpi_clk = clk_get_fpi(); + unsigned int qsb_clk = clk_get_rate(fpi_clk); + unsigned int qsb_qid = queue + FIRST_QSB_QID; + union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}}; + union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}}; + unsigned int tmp; + + + /* + * Peak Cell Rate (PCR) Limiter + */ + if ( qos->txtp.max_pcr == 0 ) + qsb_queue_parameter_table.bit.tp = 0; /* disable PCR limiter */ + else { + /* peak cell rate would be slightly lower than requested [maximum_rate / pcr = (qsb_clock / 8) * (time_step / 4) / pcr] */ + tmp = ((qsb_clk * qsb_tstep) >> 5) / qos->txtp.max_pcr + 1; + /* check if overflow takes place */ + qsb_queue_parameter_table.bit.tp = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp; + } + +#if !defined(DISABLE_QOS_WORKAROUND) || !DISABLE_QOS_WORKAROUND + // A funny issue. Create two PVCs, one UBR and one UBR with max_pcr. + // Send packets to these two PVCs at same time, it trigger strange behavior. + // In A1, RAM from 0x80000000 to 0x0x8007FFFF was corrupted with fixed pattern 0x00000000 0x40000000. + // In A4, PPE firmware keep emiting unknown cell and do not respond to driver. + // To work around, create UBR always with max_pcr. + // If user want to create UBR without max_pcr, we give a default one larger than line-rate. + if ( qos->txtp.traffic_class == ATM_UBR && qsb_queue_parameter_table.bit.tp == 0 ) { + int port = g_atm_priv_data.conn[queue].port; + unsigned int max_pcr = g_atm_priv_data.port[port].tx_max_cell_rate + 1000; + + tmp = ((qsb_clk * qsb_tstep) >> 5) / max_pcr + 1; + if ( tmp > QSB_TP_TS_MAX ) + tmp = QSB_TP_TS_MAX; + else if ( tmp < 1 ) + tmp = 1; + qsb_queue_parameter_table.bit.tp = tmp; + } +#endif + + /* + * Weighted Fair Queueing Factor (WFQF) + */ + switch ( qos->txtp.traffic_class ) { + case ATM_CBR: + case ATM_VBR_RT: + /* real time queue gets weighted fair queueing bypass */ + qsb_queue_parameter_table.bit.wfqf = 0; + break; + case ATM_VBR_NRT: + case ATM_UBR_PLUS: + /* WFQF calculation here is based on virtual cell rates, to reduce granularity for high rates */ + /* WFQF is maximum cell rate / garenteed cell rate */ + /* wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX / requested_minimum_peak_cell_rate */ + if ( qos->txtp.min_pcr == 0 ) + qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX; + else { + tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX / qos->txtp.min_pcr; + if ( tmp == 0 ) + qsb_queue_parameter_table.bit.wfqf = 1; + else if ( tmp > QSB_WFQ_NONUBR_MAX ) + qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX; + else + qsb_queue_parameter_table.bit.wfqf = tmp; + } + break; + default: + case ATM_UBR: + qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_UBR_BYPASS; + } + + /* + * Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 + */ + if ( qos->txtp.traffic_class == ATM_VBR_RT || qos->txtp.traffic_class == ATM_VBR_NRT ) { + if ( qos->txtp.scr == 0 ) { + /* disable shaper */ + qsb_queue_vbr_parameter_table.bit.taus = 0; + qsb_queue_vbr_parameter_table.bit.ts = 0; + } else { + /* Cell Loss Priority (CLP) */ + if ( (vcc->atm_options & ATM_ATMOPT_CLP) ) + /* CLP1 */ + qsb_queue_parameter_table.bit.vbr = 1; + else + /* CLP0 */ + qsb_queue_parameter_table.bit.vbr = 0; + /* Rate Shaper Parameter (TS) and Burst Tolerance Parameter for SCR (tauS) */ + tmp = ((qsb_clk * qsb_tstep) >> 5) / qos->txtp.scr + 1; + qsb_queue_vbr_parameter_table.bit.ts = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp; + tmp = (qos->txtp.mbs - 1) * (qsb_queue_vbr_parameter_table.bit.ts - qsb_queue_parameter_table.bit.tp) / 64; + if ( tmp == 0 ) + qsb_queue_vbr_parameter_table.bit.taus = 1; + else if ( tmp > QSB_TAUS_MAX ) + qsb_queue_vbr_parameter_table.bit.taus = QSB_TAUS_MAX; + else + qsb_queue_vbr_parameter_table.bit.taus = tmp; + } + } else { + qsb_queue_vbr_parameter_table.bit.taus = 0; + qsb_queue_vbr_parameter_table.bit.ts = 0; + } + + /* Queue Parameter Table (QPT) */ + *QSB_RTM = QSB_RTM_DM_SET(QSB_QPT_SET_MASK); + *QSB_RTD = QSB_RTD_TTV_SET(qsb_queue_parameter_table.dword); + *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_QPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid); + /* Queue VBR Paramter Table (QVPT) */ + *QSB_RTM = QSB_RTM_DM_SET(QSB_QVPT_SET_MASK); + *QSB_RTD = QSB_RTD_TTV_SET(qsb_queue_vbr_parameter_table.dword); + *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_VBR) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid); + +} + +static void qsb_global_set(void) +{ + struct clk *fpi_clk = clk_get_fpi(); + unsigned int qsb_clk = clk_get_rate(fpi_clk); + int i; + unsigned int tmp1, tmp2, tmp3; + + *QSB_ICDV = QSB_ICDV_TAU_SET(qsb_tau); + *QSB_SBL = QSB_SBL_SBL_SET(qsb_srvm); + *QSB_CFG = QSB_CFG_TSTEPC_SET(qsb_tstep >> 1); + + /* + * set SCT and SPT per port + */ + for ( i = 0; i < ATM_PORT_NUMBER; i++ ) { + if ( g_atm_priv_data.port[i].tx_max_cell_rate != 0 ) { + tmp1 = ((qsb_clk * qsb_tstep) >> 1) / g_atm_priv_data.port[i].tx_max_cell_rate; + tmp2 = tmp1 >> 6; /* integer value of Tsb */ + tmp3 = (tmp1 & ((1 << 6) - 1)) + 1; /* fractional part of Tsb */ + /* carry over to integer part (?) */ + if ( tmp3 == (1 << 6) ) { + tmp3 = 0; + tmp2++; + } + if ( tmp2 == 0 ) + tmp2 = tmp3 = 1; + /* 1. set mask */ + /* 2. write value to data transfer register */ + /* 3. start the tranfer */ + /* SCT (FracRate) */ + *QSB_RTM = QSB_RTM_DM_SET(QSB_SET_SCT_MASK); + *QSB_RTD = QSB_RTD_TTV_SET(tmp3); + *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | + QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SCT) | + QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | + QSB_RAMAC_TESEL_SET(i & 0x01); + /* SPT (SBV + PN + IntRage) */ + *QSB_RTM = QSB_RTM_DM_SET(QSB_SET_SPT_MASK); + *QSB_RTD = QSB_RTD_TTV_SET(QSB_SPT_SBV_VALID | QSB_SPT_PN_SET(i & 0x01) | QSB_SPT_INTRATE_SET(tmp2)); + *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | + QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SPT) | + QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | + QSB_RAMAC_TESEL_SET(i & 0x01); + } + } +} + +static inline void set_htu_entry(unsigned int vpi, unsigned int vci, unsigned int queue, int aal5, int is_retx) +{ + struct htu_entry htu_entry = { + res1: 0x00, + clp: is_retx ? 0x01 : 0x00, + pid: g_atm_priv_data.conn[queue].port & 0x01, + vpi: vpi, + vci: vci, + pti: 0x00, + vld: 0x01}; + + struct htu_mask htu_mask = { + set: 0x01, + clp: 0x01, + pid_mask: 0x02, + vpi_mask: 0x00, + vci_mask: 0x0000, + pti_mask: 0x03, // 0xx, user data + clear: 0x00}; + + struct htu_result htu_result = { + res1: 0x00, + cellid: queue, + res2: 0x00, + type: aal5 ? 0x00 : 0x01, + ven: 0x01, + res3: 0x00, + qid: queue}; + + *HTU_RESULT(queue + OAM_HTU_ENTRY_NUMBER) = htu_result; + *HTU_MASK(queue + OAM_HTU_ENTRY_NUMBER) = htu_mask; + *HTU_ENTRY(queue + OAM_HTU_ENTRY_NUMBER) = htu_entry; +} + +static inline void clear_htu_entry(unsigned int queue) +{ + HTU_ENTRY(queue + OAM_HTU_ENTRY_NUMBER)->vld = 0; +} + +static void validate_oam_htu_entry(void) +{ + HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 1; + HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 1; + HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 1; +} + +static void invalidate_oam_htu_entry(void) +{ + HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 0; + HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 0; + HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 0; +} + +static inline int find_vpi(unsigned int vpi) +{ + int i; + unsigned int bit; + + for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { + if ( (g_atm_priv_data.conn_table & bit) != 0 + && g_atm_priv_data.conn[i].vcc != NULL + && vpi == g_atm_priv_data.conn[i].vcc->vpi ) + return i; + } + + return -1; +} + +static inline int find_vpivci(unsigned int vpi, unsigned int vci) +{ + int i; + unsigned int bit; + + for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { + if ( (g_atm_priv_data.conn_table & bit) != 0 + && g_atm_priv_data.conn[i].vcc != NULL + && vpi == g_atm_priv_data.conn[i].vcc->vpi + && vci == g_atm_priv_data.conn[i].vcc->vci ) + return i; + } + + return -1; +} + +static inline int find_vcc(struct atm_vcc *vcc) +{ + int i; + unsigned int bit; + + for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { + if ( (g_atm_priv_data.conn_table & bit) != 0 + && g_atm_priv_data.conn[i].vcc == vcc ) + return i; + } + + return -1; +} + +static inline int ifx_atm_version(const struct ltq_atm_ops *ops, char *buf) +{ + int len = 0; + unsigned int major, minor; + + ops->fw_ver(&major, &minor); + + len += sprintf(buf + len, "ATM%d.%d.%d", IFX_ATM_VER_MAJOR, IFX_ATM_VER_MID, IFX_ATM_VER_MINOR); + len += sprintf(buf + len, " ATM (A1) firmware version %d.%d\n", major, minor); + + return len; +} + +static inline void check_parameters(void) +{ + /* Please refer to Amazon spec 15.4 for setting these values. */ + if ( qsb_tau < 1 ) + qsb_tau = 1; + if ( qsb_tstep < 1 ) + qsb_tstep = 1; + else if ( qsb_tstep > 4 ) + qsb_tstep = 4; + else if ( qsb_tstep == 3 ) + qsb_tstep = 2; + + /* There is a delay between PPE write descriptor and descriptor is */ + /* really stored in memory. Host also has this delay when writing */ + /* descriptor. So PPE will use this value to determine if the write */ + /* operation makes effect. */ + if ( write_descriptor_delay < 0 ) + write_descriptor_delay = 0; + + if ( aal5_fill_pattern < 0 ) + aal5_fill_pattern = 0; + else + aal5_fill_pattern &= 0xFF; + + /* Because of the limitation of length field in descriptors, the packet */ + /* size could not be larger than 64K minus overhead size. */ + if ( aal5r_max_packet_size < 0 ) + aal5r_max_packet_size = 0; + else if ( aal5r_max_packet_size >= 65535 - MAX_RX_FRAME_EXTRA_BYTES ) + aal5r_max_packet_size = 65535 - MAX_RX_FRAME_EXTRA_BYTES; + if ( aal5r_min_packet_size < 0 ) + aal5r_min_packet_size = 0; + else if ( aal5r_min_packet_size > aal5r_max_packet_size ) + aal5r_min_packet_size = aal5r_max_packet_size; + if ( aal5s_max_packet_size < 0 ) + aal5s_max_packet_size = 0; + else if ( aal5s_max_packet_size >= 65535 - MAX_TX_FRAME_EXTRA_BYTES ) + aal5s_max_packet_size = 65535 - MAX_TX_FRAME_EXTRA_BYTES; + if ( aal5s_min_packet_size < 0 ) + aal5s_min_packet_size = 0; + else if ( aal5s_min_packet_size > aal5s_max_packet_size ) + aal5s_min_packet_size = aal5s_max_packet_size; + + if ( dma_rx_descriptor_length < 2 ) + dma_rx_descriptor_length = 2; + if ( dma_tx_descriptor_length < 2 ) + dma_tx_descriptor_length = 2; + if ( dma_rx_clp1_descriptor_threshold < 0 ) + dma_rx_clp1_descriptor_threshold = 0; + else if ( dma_rx_clp1_descriptor_threshold > dma_rx_descriptor_length ) + dma_rx_clp1_descriptor_threshold = dma_rx_descriptor_length; + + if ( dma_tx_descriptor_length < 2 ) + dma_tx_descriptor_length = 2; +} + +static inline int init_priv_data(void) +{ + void *p; + int i; + struct rx_descriptor rx_desc = {0}; + struct sk_buff *skb; + volatile struct tx_descriptor *p_tx_desc; + struct sk_buff **ppskb; + + // clear atm private data structure + memset(&g_atm_priv_data, 0, sizeof(g_atm_priv_data)); + + // allocate memory for RX (AAL) descriptors + p = kzalloc(dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); + if ( p == NULL ) + return -1; + dma_cache_wback_inv((unsigned long)p, dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT); + g_atm_priv_data.aal_desc_base = p; + p = (void *)((((unsigned int)p + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); + g_atm_priv_data.aal_desc = (volatile struct rx_descriptor *)p; + + // allocate memory for RX (OAM) descriptors + p = kzalloc(RX_DMA_CH_OAM_DESC_LEN * sizeof(struct rx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); + if ( p == NULL ) + return -1; + dma_cache_wback_inv((unsigned long)p, RX_DMA_CH_OAM_DESC_LEN * sizeof(struct rx_descriptor) + DESC_ALIGNMENT); + g_atm_priv_data.oam_desc_base = p; + p = (void *)((((unsigned int)p + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); + g_atm_priv_data.oam_desc = (volatile struct rx_descriptor *)p; + + // allocate memory for RX (OAM) buffer + p = kzalloc(RX_DMA_CH_OAM_DESC_LEN * RX_DMA_CH_OAM_BUF_SIZE + DATA_BUFFER_ALIGNMENT, GFP_KERNEL); + if ( p == NULL ) + return -1; + dma_cache_wback_inv((unsigned long)p, RX_DMA_CH_OAM_DESC_LEN * RX_DMA_CH_OAM_BUF_SIZE + DATA_BUFFER_ALIGNMENT); + g_atm_priv_data.oam_buf_base = p; + p = (void *)(((unsigned int)p + DATA_BUFFER_ALIGNMENT - 1) & ~(DATA_BUFFER_ALIGNMENT - 1)); + g_atm_priv_data.oam_buf = p; + + // allocate memory for TX descriptors + p = kzalloc(MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); + if ( p == NULL ) + return -1; + dma_cache_wback_inv((unsigned long)p, MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT); + g_atm_priv_data.tx_desc_base = p; + + // allocate memory for TX skb pointers + p = kzalloc(MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4, GFP_KERNEL); + if ( p == NULL ) + return -1; + dma_cache_wback_inv((unsigned long)p, MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4); + g_atm_priv_data.tx_skb_base = p; + + // setup RX (AAL) descriptors + rx_desc.own = 1; + rx_desc.c = 0; + rx_desc.sop = 1; + rx_desc.eop = 1; + rx_desc.byteoff = 0; + rx_desc.id = 0; + rx_desc.err = 0; + rx_desc.datalen = RX_DMA_CH_AAL_BUF_SIZE; + for ( i = 0; i < dma_rx_descriptor_length; i++ ) { + skb = alloc_skb_rx(); + if ( skb == NULL ) + return -1; + rx_desc.dataptr = ((unsigned int)skb->data >> 2) & 0x0FFFFFFF; + g_atm_priv_data.aal_desc[i] = rx_desc; + } + + // setup RX (OAM) descriptors + p = (void *)((unsigned int)g_atm_priv_data.oam_buf | KSEG1); + rx_desc.own = 1; + rx_desc.c = 0; + rx_desc.sop = 1; + rx_desc.eop = 1; + rx_desc.byteoff = 0; + rx_desc.id = 0; + rx_desc.err = 0; + rx_desc.datalen = RX_DMA_CH_OAM_BUF_SIZE; + for ( i = 0; i < RX_DMA_CH_OAM_DESC_LEN; i++ ) { + rx_desc.dataptr = ((unsigned int)p >> 2) & 0x0FFFFFFF; + g_atm_priv_data.oam_desc[i] = rx_desc; + p = (void *)((unsigned int)p + RX_DMA_CH_OAM_BUF_SIZE); + } + + // setup TX descriptors and skb pointers + p_tx_desc = (volatile struct tx_descriptor *)((((unsigned int)g_atm_priv_data.tx_desc_base + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); + ppskb = (struct sk_buff **)(((unsigned int)g_atm_priv_data.tx_skb_base + 3) & ~3); + for ( i = 0; i < MAX_PVC_NUMBER; i++ ) { + g_atm_priv_data.conn[i].tx_desc = &p_tx_desc[i * dma_tx_descriptor_length]; + g_atm_priv_data.conn[i].tx_skb = &ppskb[i * dma_tx_descriptor_length]; + } + + for ( i = 0; i < ATM_PORT_NUMBER; i++ ) + g_atm_priv_data.port[i].tx_max_cell_rate = DEFAULT_TX_LINK_RATE; + + return 0; +} + +static inline void clear_priv_data(void) +{ + int i, j; + struct sk_buff *skb; + + for ( i = 0; i < MAX_PVC_NUMBER; i++ ) { + if ( g_atm_priv_data.conn[i].tx_skb != NULL ) { + for ( j = 0; j < dma_tx_descriptor_length; j++ ) + if ( g_atm_priv_data.conn[i].tx_skb[j] != NULL ) + dev_kfree_skb_any(g_atm_priv_data.conn[i].tx_skb[j]); + } + } + + if ( g_atm_priv_data.tx_skb_base != NULL ) + kfree(g_atm_priv_data.tx_skb_base); + + if ( g_atm_priv_data.tx_desc_base != NULL ) + kfree(g_atm_priv_data.tx_desc_base); + + if ( g_atm_priv_data.oam_buf_base != NULL ) + kfree(g_atm_priv_data.oam_buf_base); + + if ( g_atm_priv_data.oam_desc_base != NULL ) + kfree(g_atm_priv_data.oam_desc_base); + + if ( g_atm_priv_data.aal_desc_base != NULL ) { + for ( i = 0; i < dma_rx_descriptor_length; i++ ) { + if ( g_atm_priv_data.aal_desc[i].sop || g_atm_priv_data.aal_desc[i].eop ) { // descriptor initialized + skb = get_skb_rx_pointer(g_atm_priv_data.aal_desc[i].dataptr); + dev_kfree_skb_any(skb); + } + } + kfree(g_atm_priv_data.aal_desc_base); + } +} + +static inline void init_rx_tables(void) +{ + int i; + struct wrx_queue_config wrx_queue_config = {0}; + struct wrx_dma_channel_config wrx_dma_channel_config = {0}; + struct htu_entry htu_entry = {0}; + struct htu_result htu_result = {0}; + struct htu_mask htu_mask = { + set: 0x01, + clp: 0x01, + pid_mask: 0x00, + vpi_mask: 0x00, + vci_mask: 0x00, + pti_mask: 0x00, + clear: 0x00 + }; + + /* + * General Registers + */ + *CFG_WRX_HTUTS = MAX_PVC_NUMBER + OAM_HTU_ENTRY_NUMBER; +#ifndef CONFIG_AMAZON_SE + *CFG_WRX_QNUM = MAX_QUEUE_NUMBER; +#endif + *CFG_WRX_DCHNUM = RX_DMA_CH_TOTAL; + *WRX_DMACH_ON = (1 << RX_DMA_CH_TOTAL) - 1; + *WRX_HUNT_BITTH = DEFAULT_RX_HUNT_BITTH; + + /* + * WRX Queue Configuration Table + */ + wrx_queue_config.uumask = 0xFF; + wrx_queue_config.cpimask = 0xFF; + wrx_queue_config.uuexp = 0; + wrx_queue_config.cpiexp = 0; + wrx_queue_config.mfs = aal5r_max_packet_size; + wrx_queue_config.oversize = aal5r_max_packet_size; + wrx_queue_config.undersize = aal5r_min_packet_size; + wrx_queue_config.errdp = aal5r_drop_error_packet; + wrx_queue_config.dmach = RX_DMA_CH_AAL; + for ( i = 0; i < MAX_QUEUE_NUMBER; i++ ) + *WRX_QUEUE_CONFIG(i) = wrx_queue_config; + WRX_QUEUE_CONFIG(OAM_RX_QUEUE)->dmach = RX_DMA_CH_OAM; + + /* + * WRX DMA Channel Configuration Table + */ + wrx_dma_channel_config.chrl = 0; + wrx_dma_channel_config.clp1th = dma_rx_clp1_descriptor_threshold; + wrx_dma_channel_config.mode = 0; + wrx_dma_channel_config.rlcfg = 0; + + wrx_dma_channel_config.deslen = RX_DMA_CH_OAM_DESC_LEN; + wrx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.oam_desc >> 2) & 0x0FFFFFFF; + *WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_OAM) = wrx_dma_channel_config; + + wrx_dma_channel_config.deslen = dma_rx_descriptor_length; + wrx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.aal_desc >> 2) & 0x0FFFFFFF; + *WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_AAL) = wrx_dma_channel_config; + + /* + * HTU Tables + */ + for (i = 0; i < MAX_PVC_NUMBER; i++) { + htu_result.qid = (unsigned int)i; + + *HTU_ENTRY(i + OAM_HTU_ENTRY_NUMBER) = htu_entry; + *HTU_MASK(i + OAM_HTU_ENTRY_NUMBER) = htu_mask; + *HTU_RESULT(i + OAM_HTU_ENTRY_NUMBER) = htu_result; + } + + /* OAM HTU Entry */ + htu_entry.vci = 0x03; + htu_mask.pid_mask = 0x03; + htu_mask.vpi_mask = 0xFF; + htu_mask.vci_mask = 0x0000; + htu_mask.pti_mask = 0x07; + htu_result.cellid = OAM_RX_QUEUE; + htu_result.type = 1; + htu_result.ven = 1; + htu_result.qid = OAM_RX_QUEUE; + *HTU_RESULT(OAM_F4_SEG_HTU_ENTRY) = htu_result; + *HTU_MASK(OAM_F4_SEG_HTU_ENTRY) = htu_mask; + *HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY) = htu_entry; + htu_entry.vci = 0x04; + htu_result.cellid = OAM_RX_QUEUE; + htu_result.type = 1; + htu_result.ven = 1; + htu_result.qid = OAM_RX_QUEUE; + *HTU_RESULT(OAM_F4_TOT_HTU_ENTRY) = htu_result; + *HTU_MASK(OAM_F4_TOT_HTU_ENTRY) = htu_mask; + *HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY) = htu_entry; + htu_entry.vci = 0x00; + htu_entry.pti = 0x04; + htu_mask.vci_mask = 0xFFFF; + htu_mask.pti_mask = 0x01; + htu_result.cellid = OAM_RX_QUEUE; + htu_result.type = 1; + htu_result.ven = 1; + htu_result.qid = OAM_RX_QUEUE; + *HTU_RESULT(OAM_F5_HTU_ENTRY) = htu_result; + *HTU_MASK(OAM_F5_HTU_ENTRY) = htu_mask; + *HTU_ENTRY(OAM_F5_HTU_ENTRY) = htu_entry; +} + +static inline void init_tx_tables(void) +{ + int i; + struct wtx_queue_config wtx_queue_config = {0}; + struct wtx_dma_channel_config wtx_dma_channel_config = {0}; + struct wtx_port_config wtx_port_config = { + res1: 0, + qid: 0, + qsben: 1 + }; + + /* + * General Registers + */ + *CFG_WTX_DCHNUM = MAX_TX_DMA_CHANNEL_NUMBER; + *WTX_DMACH_ON = ((1 << MAX_TX_DMA_CHANNEL_NUMBER) - 1) ^ ((1 << FIRST_QSB_QID) - 1); + *CFG_WRDES_DELAY = write_descriptor_delay; + + /* + * WTX Port Configuration Table + */ + for ( i = 0; i < ATM_PORT_NUMBER; i++ ) + *WTX_PORT_CONFIG(i) = wtx_port_config; + + /* + * WTX Queue Configuration Table + */ + wtx_queue_config.qsben = 1; + wtx_queue_config.sbid = 0; + for ( i = 0; i < MAX_TX_DMA_CHANNEL_NUMBER; i++ ) { + wtx_queue_config.qsb_vcid = i; + *WTX_QUEUE_CONFIG(i) = wtx_queue_config; + } + + /* + * WTX DMA Channel Configuration Table + */ + wtx_dma_channel_config.mode = 0; + wtx_dma_channel_config.deslen = 0; + wtx_dma_channel_config.desba = 0; + for ( i = 0; i < FIRST_QSB_QID; i++ ) + *WTX_DMA_CHANNEL_CONFIG(i) = wtx_dma_channel_config; + /* normal connection */ + wtx_dma_channel_config.deslen = dma_tx_descriptor_length; + for ( ; i < MAX_TX_DMA_CHANNEL_NUMBER ; i++ ) { + wtx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.conn[i - FIRST_QSB_QID].tx_desc >> 2) & 0x0FFFFFFF; + *WTX_DMA_CHANNEL_CONFIG(i) = wtx_dma_channel_config; + } +} + +static int atm_showtime_enter(struct port_cell_info *port_cell, void *xdata_addr) +{ + int i, j; + + ASSERT(port_cell != NULL, "port_cell is NULL"); + ASSERT(xdata_addr != NULL, "xdata_addr is NULL"); + + for ( j = 0; j < ATM_PORT_NUMBER && j < port_cell->port_num; j++ ) + if ( port_cell->tx_link_rate[j] > 0 ) + break; + for ( i = 0; i < ATM_PORT_NUMBER && i < port_cell->port_num; i++ ) + g_atm_priv_data.port[i].tx_max_cell_rate = + port_cell->tx_link_rate[i] > 0 ? port_cell->tx_link_rate[i] : port_cell->tx_link_rate[j]; + + qsb_global_set(); + + for ( i = 0; i < MAX_PVC_NUMBER; i++ ) + if ( g_atm_priv_data.conn[i].vcc != NULL ) + set_qsb(g_atm_priv_data.conn[i].vcc, &g_atm_priv_data.conn[i].vcc->qos, i); + + // TODO: ReTX set xdata_addr + g_xdata_addr = xdata_addr; + + g_showtime = 1; + +#if defined(CONFIG_VR9) + IFX_REG_W32(0x0F, UTP_CFG); +#endif + + printk("enter showtime, cell rate: 0 - %d, 1 - %d, xdata addr: 0x%08x\n", + g_atm_priv_data.port[0].tx_max_cell_rate, + g_atm_priv_data.port[1].tx_max_cell_rate, + (unsigned int)g_xdata_addr); + + return 0; +} + +static int atm_showtime_exit(void) +{ + if ( !g_showtime ) + return -1; + +#if defined(CONFIG_VR9) + IFX_REG_W32(0x00, UTP_CFG); +#endif + g_showtime = 0; + g_xdata_addr = NULL; + printk("leave showtime\n"); + return 0; +} + +extern struct ltq_atm_ops ar9_ops; +extern struct ltq_atm_ops vr9_ops; +extern struct ltq_atm_ops danube_ops; +extern struct ltq_atm_ops ase_ops; + +static const struct of_device_id ltq_atm_match[] = { +#ifdef CONFIG_DANUBE + { .compatible = "lantiq,ppe-danube", .data = &danube_ops }, +#elif defined CONFIG_AMAZON_SE + { .compatible = "lantiq,ppe-ase", .data = &ase_ops }, +#elif defined CONFIG_AR9 + { .compatible = "lantiq,ppe-arx100", .data = &ar9_ops }, +#elif defined CONFIG_VR9 + { .compatible = "lantiq,ppe-xrx200", .data = &vr9_ops }, +#endif + {}, +}; +MODULE_DEVICE_TABLE(of, ltq_atm_match); + +static int __devinit ltq_atm_probe(struct platform_device *pdev) +{ + const struct of_device_id *match; + struct ltq_atm_ops *ops = NULL; + int ret; + int port_num; + struct port_cell_info port_cell = {0}; + int i, j; + char ver_str[256]; + + match = of_match_device(ltq_atm_match, &pdev->dev); + if (!match) { + dev_err(&pdev->dev, "failed to find matching device\n"); + return -ENOENT; + } + ops = (struct ltq_atm_ops *) match->data; + + check_parameters(); + + ret = init_priv_data(); + if ( ret != 0 ) { + pr_err("INIT_PRIV_DATA_FAIL\n"); + goto INIT_PRIV_DATA_FAIL; + } + + ops->init(); + init_rx_tables(); + init_tx_tables(); + + /* create devices */ + for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ ) { + g_atm_priv_data.port[port_num].dev = atm_dev_register("ifxmips_atm", NULL, &g_ifx_atm_ops, -1, NULL); + if ( !g_atm_priv_data.port[port_num].dev ) { + pr_err("failed to register atm device %d!\n", port_num); + ret = -EIO; + goto ATM_DEV_REGISTER_FAIL; + } else { + g_atm_priv_data.port[port_num].dev->ci_range.vpi_bits = 8; + g_atm_priv_data.port[port_num].dev->ci_range.vci_bits = 16; + g_atm_priv_data.port[port_num].dev->link_rate = g_atm_priv_data.port[port_num].tx_max_cell_rate; + g_atm_priv_data.port[port_num].dev->dev_data = (void*)port_num; + } + } + + /* register interrupt handler */ + ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "atm_mailbox_isr", &g_atm_priv_data); + if ( ret ) { + if ( ret == -EBUSY ) { + pr_err("IRQ may be occupied by other driver, please reconfig to disable it.\n"); + } else { + pr_err("request_irq fail irq:%d\n", PPE_MAILBOX_IGU1_INT); + } + goto REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL; + } + disable_irq(PPE_MAILBOX_IGU1_INT); + + + ret = ops->start(0); + if ( ret ) { + pr_err("ifx_pp32_start fail!\n"); + goto PP32_START_FAIL; + } + + port_cell.port_num = ATM_PORT_NUMBER; + ifx_mei_atm_showtime_check(&g_showtime, &port_cell, &g_xdata_addr); + if ( g_showtime ) { + for ( i = 0; i < ATM_PORT_NUMBER; i++ ) + if ( port_cell.tx_link_rate[i] != 0 ) + break; + for ( j = 0; j < ATM_PORT_NUMBER; j++ ) + g_atm_priv_data.port[j].tx_max_cell_rate = + port_cell.tx_link_rate[j] != 0 ? port_cell.tx_link_rate[j] : port_cell.tx_link_rate[i]; + } + + qsb_global_set(); + validate_oam_htu_entry(); + + ifx_mei_atm_showtime_enter = atm_showtime_enter; + ifx_mei_atm_showtime_exit = atm_showtime_exit; + + ifx_atm_version(ops, ver_str); + printk(KERN_INFO "%s", ver_str); + platform_set_drvdata(pdev, ops); + printk("ifxmips_atm: ATM init succeed\n"); + + return 0; + +PP32_START_FAIL: + free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); +REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL: +ATM_DEV_REGISTER_FAIL: + while ( port_num-- > 0 ) + atm_dev_deregister(g_atm_priv_data.port[port_num].dev); +INIT_PRIV_DATA_FAIL: + clear_priv_data(); + printk("ifxmips_atm: ATM init failed\n"); + return ret; +} + +static int __devexit ltq_atm_remove(struct platform_device *pdev) +{ + int port_num; + struct ltq_atm_ops *ops = platform_get_drvdata(pdev); + + ifx_mei_atm_showtime_enter = NULL; + ifx_mei_atm_showtime_exit = NULL; + + invalidate_oam_htu_entry(); + + ops->stop(0); + + free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); + + for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ ) + atm_dev_deregister(g_atm_priv_data.port[port_num].dev); + + ops->shutdown(); + + clear_priv_data(); + + return 0; +} + +static struct platform_driver ltq_atm_driver = { + .probe = ltq_atm_probe, + .remove = __devexit_p(ltq_atm_remove), + .driver = { + .name = "atm", + .owner = THIS_MODULE, + .of_match_table = ltq_atm_match, + }, +}; + +module_platform_driver(ltq_atm_driver); + +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/system/ltq-dsl-fw/Makefile b/package/system/ltq-dsl-fw/Makefile deleted file mode 100644 index cbb7e1eb98..0000000000 --- a/package/system/ltq-dsl-fw/Makefile +++ /dev/null @@ -1,53 +0,0 @@ -# -# Copyright (C) 2011 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -include $(TOPDIR)/rules.mk - -PKG_NAME:=ltq-dsl-fw -PKG_VERSION:=0.1 -PKG_RELEASE:=1 - -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 -PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/ -PKG_MD5SUM:=4700a36b66b955b4c5544227267356f4 -PKG_MAINTAINER:=John Crispin <blogic@openwrt.org> - -include $(INCLUDE_DIR)/package.mk - -define Package/kmod-ltq-dsl-firmware-template - TITLE+=Firmware Annex-$(1) $(2) - SECTION:=sys - CATEGORY:=Kernel modules - SUBMENU:=Network Devices - VARIANT:= $(1)-$(2) - URL:=http://www.lantiq.com/ - DEPENDS:=@(TARGET_lantiq_$(2)||TARGET_lantiq_$(3)) kmod-ltq-dsl-$(2) -endef - -Package/kmod-ltq-dsl-firmware-a-danube=$(call Package/kmod-ltq-dsl-firmware-template,a,danube,xway) -Package/kmod-ltq-dsl-firmware-b-danube=$(call Package/kmod-ltq-dsl-firmware-template,b,danube,xway) -Package/kmod-ltq-dsl-firmware-a-ar9=$(call Package/kmod-ltq-dsl-firmware-template,a,ar9,xway) -Package/kmod-ltq-dsl-firmware-b-ar9=$(call Package/kmod-ltq-dsl-firmware-template,b,ar9,xway) -Package/kmod-ltq-dsl-firmware-a-ase=$(call Package/kmod-ltq-dsl-firmware-template,a,ase,ase) -Package/kmod-ltq-dsl-firmware-b-ase=$(call Package/kmod-ltq-dsl-firmware-template,b,ase,ase) - -define Build/Compile - echo -endef - -define Package/kmod-ltq-dsl-firmware-$(BUILD_VARIANT)/install - $(INSTALL_DIR) $(1)/lib/firmware/ - $(CP) $(PKG_BUILD_DIR)/$(FW_NAME)/ltq-dsl-fw-$(BUILD_VARIANT).bin $(1)/lib/firmware/ - ln -s /lib/firmware/$(FW_NAME)/ltq-dsl-fw-$(BUILD_VARIANT).bin $(1)/lib/firmware/ModemHWE.bin -endef - -$(eval $(call BuildPackage,kmod-ltq-dsl-firmware-a-danube)) -$(eval $(call BuildPackage,kmod-ltq-dsl-firmware-b-danube)) -$(eval $(call BuildPackage,kmod-ltq-dsl-firmware-a-ase)) -$(eval $(call BuildPackage,kmod-ltq-dsl-firmware-b-ase)) -$(eval $(call BuildPackage,kmod-ltq-dsl-firmware-a-ar9)) -$(eval $(call BuildPackage,kmod-ltq-dsl-firmware-b-ar9)) diff --git a/package/system/ltq-dsl/patches/100-dsl_compat.patch b/package/system/ltq-dsl/patches/100-dsl_compat.patch deleted file mode 100644 index f892351a65..0000000000 --- a/package/system/ltq-dsl/patches/100-dsl_compat.patch +++ /dev/null @@ -1,125 +0,0 @@ ---- a/src/include/drv_dsl_cpe_device_danube.h -+++ b/src/include/drv_dsl_cpe_device_danube.h -@@ -24,7 +24,7 @@ - #include "drv_dsl_cpe_simulator_danube.h" - #else - /* Include for the low level driver interface header file */ --#include "asm/ifx/ifx_mei_bsp.h" -+#include "mei/ifxmips_mei_interface.h" - #endif /* defined(DSL_CPE_SIMULATOR_DRIVER) && defined(WIN32)*/ - - #define DSL_MAX_LINE_NUMBER 1 ---- a/src/common/drv_dsl_cpe_os_linux.c -+++ b/src/common/drv_dsl_cpe_os_linux.c -@@ -11,6 +11,7 @@ - #ifdef __LINUX__ - - #define DSL_INTERN -+#include <linux/device.h> - - #include "drv_dsl_cpe_api.h" - #include "drv_dsl_cpe_api_ioctl.h" -@@ -34,9 +35,13 @@ - static DSL_ssize_t DSL_DRV_Write(DSL_DRV_file_t *pFile, const DSL_char_t * pBuf, - DSL_DRV_size_t nSize, DSL_DRV_offset_t * pLoff); - -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_inode_t * pINode, DSL_DRV_file_t * pFile, - DSL_uint_t nCommand, unsigned long nArg); -- -+#else -+static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_file_t * pFile, -+ DSL_uint_t nCommand, unsigned long nArg); -+#endif - static int DSL_DRV_Open(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil); - - static int DSL_DRV_Release(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil); -@@ -72,7 +77,11 @@ - open: DSL_DRV_Open, - release: DSL_DRV_Release, - write: DSL_DRV_Write, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - ioctl: DSL_DRV_Ioctls, -+#else -+ unlocked_ioctl: DSL_DRV_Ioctls, -+#endif - poll: DSL_DRV_Poll - }; - #else -@@ -168,10 +177,17 @@ - \return Success or failure. - \ingroup Internal - */ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_inode_t * pINode, - DSL_DRV_file_t * pFile, - DSL_uint_t nCommand, - unsigned long nArg) -+#else -+static DSL_int_t DSL_DRV_Ioctls( -+ DSL_DRV_file_t * pFile, -+ DSL_uint_t nCommand, -+ unsigned long nArg) -+#endif - { - DSL_int_t nErr=0; - DSL_boolean_t bIsInKernel; -@@ -216,16 +232,7 @@ - } - } - } -- -- if (pINode == DSL_NULL) -- { -- bIsInKernel = DSL_TRUE; -- } -- else -- { -- bIsInKernel = DSL_FALSE; -- } -- -+ bIsInKernel = DSL_FALSE; - if ( (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API) || - (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API_G997) || - (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API_PM) || -@@ -1058,6 +1065,7 @@ - /* Entry point of driver */ - int __init DSL_ModuleInit(void) - { -+ struct class *dsl_class; - DSL_int_t i; - - printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF, -@@ -1104,7 +1112,8 @@ - } - - DSL_DRV_DevNodeInit(); -- -+ dsl_class = class_create(THIS_MODULE, "dsl_cpe_api"); -+ device_create(dsl_class, NULL, MKDEV(DRV_DSL_CPE_API_DEV_MAJOR, 0), NULL, "dsl_cpe_api"); - return 0; - } - ---- a/src/include/drv_dsl_cpe_os_linux.h -+++ b/src/include/drv_dsl_cpe_os_linux.h -@@ -17,17 +17,17 @@ - #endif - - #include <asm/ioctl.h> --#include <linux/autoconf.h> -+#include <generated/autoconf.h> - #include <linux/module.h> - #include <linux/kernel.h> - #include <linux/init.h> - #include <linux/ctype.h> - #include <linux/version.h> - #include <linux/spinlock.h> -- -+#include <linux/sched.h> - - #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) -- #include <linux/utsrelease.h> -+ #include <generated/utsrelease.h> - #endif - - #include <linux/types.h> diff --git a/package/system/ltq-dsl/patches/500-portability.patch b/package/system/ltq-dsl/patches/500-portability.patch deleted file mode 100644 index d74314c77d..0000000000 --- a/package/system/ltq-dsl/patches/500-portability.patch +++ /dev/null @@ -1,227 +0,0 @@ ---- a/configure.in -+++ b/configure.in -@@ -310,7 +310,7 @@ - AC_ARG_ENABLE(kernelbuild, - AC_HELP_STRING(--enable-kernel-build=x,Set the target kernel build path), - [ -- if test -e $enableval/include/linux/autoconf.h; then -+ if test -e $enableval/include/linux/autoconf.h -o -e $enableval/include/generated/autoconf.h; then - AC_SUBST([KERNEL_BUILD_PATH],[$enableval]) - else - AC_MSG_ERROR([The kernel build directory is not valid or not configured!]) -@@ -333,12 +333,12 @@ - echo Set the lib_ifxos include path $enableval - AC_SUBST([IFXOS_INCLUDE_PATH],[$enableval]) - else -- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH -+ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH - AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) - fi - ], - [ -- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH -+ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH - AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) - ] - ) -@@ -1702,73 +1702,73 @@ - AC_SUBST([DISTCHECK_CONFIGURE_PARAMS],[$CONFIGURE_OPTIONS]) - - AC_CONFIG_COMMANDS_PRE([ --echo -e "------------------------------------------------------------------------" --echo -e " Configuration for drv_dsl_cpe_api:" --echo -e " Configure model type: $DSL_CONFIG_MODEL_TYPE" --echo -e " Source code location: $srcdir" --echo -e " Compiler: $CC" --echo -e " Compiler c-flags: $CFLAGS" --echo -e " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" --echo -e " Host System Type: $host" --echo -e " Install path: $prefix" --echo -e " Linux kernel include path: $KERNEL_INCL_PATH" --echo -e " Linux kernel build path: $KERNEL_BUILD_PATH" --echo -e " Linux kernel architecture: $KERNEL_ARCH" --echo -e " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" --echo -e " IFXOS include path: $IFXOS_INCLUDE_PATH" --echo -e " Driver Include Path $DSL_DRIVER_INCL_PATH" --echo -e " DSL device: $DSL_DEVICE_NAME" --echo -e " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" --echo -e " Channels per line: $DSL_CHANNELS_PER_LINE" --echo -e " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" --echo -e " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" --echo -e " Disable debug prints: $DSL_DEBUG_DISABLE" --echo -e " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" --echo -e " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" --echo -e " Include deprecated functions: $INCLUDE_DEPRECATED" --echo -e " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" --echo -e " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" --echo -e " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" --echo -e " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" --echo -e " Include ADSL LED: $INCLUDE_ADSL_LED" --echo -e " Include CEOC: $INCLUDE_DSL_CEOC" --echo -e " Include config get support: $INCLUDE_DSL_CONFIG_GET" --echo -e " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" --echo -e " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" --echo -e " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" --echo -e " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" --echo -e " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" --echo -e " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" --echo -e " Include G997 status: $INCLUDE_DSL_G997_STATUS" --echo -e " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" --echo -e " Include DSL Bonding: $INCLUDE_DSL_BONDING" --echo -e " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" --echo -e " Include DELT: $INCLUDE_DSL_DELT" --echo -e " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" --echo -e " Include PM: $INCLUDE_DSL_PM" --echo -e " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" --echo -e " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" --echo -e " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" --echo -e " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" --echo -e " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" --echo -e " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" --echo -e " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" --echo -e " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" --echo -e " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" --echo -e " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" --echo -e " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" --echo -e " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" --echo -e " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" --echo -e " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" --echo -e " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" --echo -e " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" --echo -e " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" --echo -e "----------------------- deprectated ! ----------------------------------" --echo -e " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" --echo -e "" --echo -e " Settings:" --echo -e " Configure options: $CONFIGURE_OPTIONS" --echo -e "------------------------------------------------------------------------" -+echo "------------------------------------------------------------------------" -+echo " Configuration for drv_dsl_cpe_api:" -+echo " Configure model type: $DSL_CONFIG_MODEL_TYPE" -+echo " Source code location: $srcdir" -+echo " Compiler: $CC" -+echo " Compiler c-flags: $CFLAGS" -+echo " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" -+echo " Host System Type: $host" -+echo " Install path: $prefix" -+echo " Linux kernel include path: $KERNEL_INCL_PATH" -+echo " Linux kernel build path: $KERNEL_BUILD_PATH" -+echo " Linux kernel architecture: $KERNEL_ARCH" -+echo " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" -+echo " IFXOS include path: $IFXOS_INCLUDE_PATH" -+echo " Driver Include Path $DSL_DRIVER_INCL_PATH" -+echo " DSL device: $DSL_DEVICE_NAME" -+echo " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" -+echo " Channels per line: $DSL_CHANNELS_PER_LINE" -+echo " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" -+echo " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" -+echo " Disable debug prints: $DSL_DEBUG_DISABLE" -+echo " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" -+echo " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" -+echo " Include deprecated functions: $INCLUDE_DEPRECATED" -+echo " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" -+echo " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" -+echo " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" -+echo " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" -+echo " Include ADSL LED: $INCLUDE_ADSL_LED" -+echo " Include CEOC: $INCLUDE_DSL_CEOC" -+echo " Include config get support: $INCLUDE_DSL_CONFIG_GET" -+echo " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" -+echo " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" -+echo " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" -+echo " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" -+echo " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" -+echo " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" -+echo " Include G997 status: $INCLUDE_DSL_G997_STATUS" -+echo " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" -+echo " Include DSL Bonding: $INCLUDE_DSL_BONDING" -+echo " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" -+echo " Include DELT: $INCLUDE_DSL_DELT" -+echo " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" -+echo " Include PM: $INCLUDE_DSL_PM" -+echo " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" -+echo " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" -+echo " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" -+echo " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" -+echo " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" -+echo " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" -+echo " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" -+echo " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" -+echo " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" -+echo " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" -+echo " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" -+echo " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" -+echo " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" -+echo " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" -+echo " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" -+echo " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" -+echo " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" -+echo "----------------------- deprectated ! ----------------------------------" -+echo " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" -+echo "" -+echo " Settings:" -+echo " Configure options: $CONFIGURE_OPTIONS" -+echo "------------------------------------------------------------------------" - ]) - - AC_CONFIG_FILES([Makefile src/Makefile]) ---- a/src/Makefile.am -+++ b/src/Makefile.am -@@ -303,7 +303,7 @@ - drv_dsl_cpe_api_OBJS = "$(subst .c,.o,$(filter %.c,$(drv_dsl_cpe_api_SOURCES)))" - - drv_dsl_cpe_api.ko: $(drv_dsl_cpe_api_SOURCES) -- @echo -e "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" -+ @echo "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" - if test ! -e common/drv_dsl_cpe_api.c ; then \ - echo "copy source files (as links only!)"; \ - for f in $(filter %.c,$(drv_dsl_cpe_api_SOURCES)); do \ -@@ -311,10 +311,10 @@ - cp -s $(addprefix @abs_srcdir@/,$$f) $(PWD)/`dirname $$f`/ ; \ - done \ - fi -- @echo -e "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild -- @echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild -- @echo -e "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild -- @echo -e "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild -+ @echo "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild -+ @echo "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild -+ @echo "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild -+ @echo "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild - $(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules - - clean-generic: ---- a/src/include/drv_dsl_cpe_os_linux.h -+++ b/src/include/drv_dsl_cpe_os_linux.h -@@ -16,8 +16,6 @@ - extern "C" { - #endif - --#include <asm/ioctl.h> --#include <generated/autoconf.h> - #include <linux/module.h> - #include <linux/kernel.h> - #include <linux/init.h> -@@ -26,8 +24,10 @@ - #include <linux/spinlock.h> - #include <linux/sched.h> - --#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) -- #include <generated/utsrelease.h> -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) -+#include <linux/utsrelease.h> -+#else -+#include <generated/utsrelease.h> - #endif - - #include <linux/types.h> -@@ -39,7 +39,8 @@ - #include <linux/delay.h> - #include <linux/poll.h> - #include <asm/uaccess.h> --#include <linux/smp_lock.h> -+//#include <linux/smp_lock.h> -+#include <asm/ioctl.h> - - #ifdef INCLUDE_DSL_CPE_API_IFXOS_SUPPORT - /** IFXOS includes*/ diff --git a/package/system/ltq-dsl/src/Makefile b/package/system/ltq-dsl/src/Makefile deleted file mode 100644 index 691518a74e..0000000000 --- a/package/system/ltq-dsl/src/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -obj-m = lantiq_mei.o lantiq_atm.o -lantiq_atm-objs := ifxmips_atm_core.o - -CFLAGS_MODULE+=-DSOC_TYPE_XWAY -EXTRA_CFLAGS+=-DSOC_TYPE_XWAY -ifeq ($(BUILD_VARIANT),danube) - CFLAGS_MODULE+=-DCONFIG_DANUBE - EXTRA_CFLAGS+=-DCONFIG_DANUBE - lantiq_atm-objs += ifxmips_atm_danube.o -endif -ifeq ($(BUILD_VARIANT),ase) - CFLAGS_MODULE+=-DCONFIG_AMAZON_SE - EXTRA_CFLAGS+=-DCONFIG_AMAZON_SE - lantiq_atm-objs += ifxmips_atm_amazon_se.o -endif -ifeq ($(BUILD_VARIANT),ar9) - CFLAGS_MODULE+=-DCONFIG_AR9 - EXTRA_CFLAGS+=-DCONFIG_AR9 - lantiq_atm-objs += ifxmips_atm_ar9.o -endif -ifeq ($(BUILD_VARIANT),vr9) - CFLAGS_MODULE+=-DCONFIG_VR9 - EXTRA_CFLAGS+=-DCONFIG_VR9 - lantiq_atm-objs += ifxmips_atm_vr9.o -endif diff --git a/package/system/ltq-dsl/src/ifx_atm.h b/package/system/ltq-dsl/src/ifx_atm.h deleted file mode 100644 index bf045a9754..0000000000 --- a/package/system/ltq-dsl/src/ifx_atm.h +++ /dev/null @@ -1,196 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifx_atm.h -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 17 Jun 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : Global ATM driver header file -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - -#ifndef IFX_ATM_H -#define IFX_ATM_H - - - -/*! - \defgroup IFX_ATM UEIP Project - ATM driver module - \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9. - */ - -/*! - \defgroup IFX_ATM_IOCTL IOCTL Commands - \ingroup IFX_ATM - \brief IOCTL Commands used by user application. - */ - -/*! - \defgroup IFX_ATM_STRUCT Structures - \ingroup IFX_ATM - \brief Structures used by user application. - */ - -/*! - \file ifx_atm.h - \ingroup IFX_ATM - \brief ATM driver header file - */ - - - -/* - * #################################### - * Definition - * #################################### - */ - -/*! - \addtogroup IFX_ATM_STRUCT - */ -/*@{*/ - -/* - * ATM MIB - */ - -/*! - \struct atm_cell_ifEntry_t - \brief Structure used for Cell Level MIB Counters. - - User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL". - */ -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */ - __u32 ifInErrors; /*!< counter of error ingress cells */ - __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */ - __u32 ifOutErrors; /*!< counter of error egress cells */ -} atm_cell_ifEntry_t; - -/*! - \struct atm_aal5_ifEntry_t - \brief Structure used for AAL5 Frame Level MIB Counters. - - User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5". - */ -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */ - __u32 ifInUcastPkts; /*!< counter of ingress packets */ - __u32 ifOutUcastPkts; /*!< counter of egress packets */ - __u32 ifInErrors; /*!< counter of error ingress packets */ - __u32 ifInDiscards; /*!< counter of dropped ingress packets */ - __u32 ifOutErros; /*!< counter of error egress packets */ - __u32 ifOutDiscards; /*!< counter of dropped egress packets */ -} atm_aal5_ifEntry_t; - -/*! - \struct atm_aal5_vcc_t - \brief Structure used for per PVC AAL5 Frame Level MIB Counters. - - This structure is a part of structure "atm_aal5_vcc_x_t". - */ -typedef struct { - __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */ - __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet - __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */ -} atm_aal5_vcc_t; - -/*! - \struct atm_aal5_vcc_x_t - \brief Structure used for per PVC AAL5 Frame Level MIB Counters. - - User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC". - */ -typedef struct { - int vpi; /*!< VPI of the VCC to get MIB counters */ - int vci; /*!< VCI of the VCC to get MIB counters */ - atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */ -} atm_aal5_vcc_x_t; - -/*@}*/ - - - -/* - * #################################### - * IOCTL - * #################################### - */ - -/*! - \addtogroup IFX_ATM_IOCTL - */ -/*@{*/ - -/* - * ioctl Command - */ -/*! - \brief ATM IOCTL Magic Number - */ -#define PPE_ATM_IOC_MAGIC 'o' -/*! - \brief ATM IOCTL Command - Get Cell Level MIB Counters - - This command is obsolete. User can get cell level MIB from DSL API. - This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get AAL5 Level MIB Counters - - Get AAL5 packet counters. - This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get Per PVC MIB Counters - - Get AAL5 packet counters for each PVC. - This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters. - */ -#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t) -/*! - \brief Total Number of ATM IOCTL Commands - */ -#define PPE_ATM_IOC_MAXNR 3 - -/*@}*/ - - - -/* - * #################################### - * API - * #################################### - */ - -#ifdef __KERNEL__ -struct port_cell_info { - unsigned int port_num; - unsigned int tx_link_rate[2]; -}; -#endif - - - -#endif // IFX_ATM_H - diff --git a/package/system/ltq-dsl/src/ifxmips_atm.h b/package/system/ltq-dsl/src/ifxmips_atm.h deleted file mode 100644 index ed90b5d4d7..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm.h +++ /dev/null @@ -1,172 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifx_atm.h -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 17 Jun 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : Global ATM driver header file -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - -#ifndef IFX_ATM_H -#define IFX_ATM_H - - - -/*! - \defgroup IFX_ATM UEIP Project - ATM driver module - \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9. - */ - -/*! - \defgroup IFX_ATM_IOCTL IOCTL Commands - \ingroup IFX_ATM - \brief IOCTL Commands used by user application. - */ - -/*! - \defgroup IFX_ATM_STRUCT Structures - \ingroup IFX_ATM - \brief Structures used by user application. - */ - -/*! - \file ifx_atm.h - \ingroup IFX_ATM - \brief ATM driver header file - */ - - - -/* - * #################################### - * Definition - * #################################### - */ - -/*! - \addtogroup IFX_ATM_STRUCT - */ -/*@{*/ - -/* - * ATM MIB - */ - -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */ - __u32 ifInErrors; /*!< counter of error ingress cells */ - __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */ - __u32 ifOutErrors; /*!< counter of error egress cells */ -} atm_cell_ifEntry_t; - -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */ - __u32 ifInUcastPkts; /*!< counter of ingress packets */ - __u32 ifOutUcastPkts; /*!< counter of egress packets */ - __u32 ifInErrors; /*!< counter of error ingress packets */ - __u32 ifInDiscards; /*!< counter of dropped ingress packets */ - __u32 ifOutErros; /*!< counter of error egress packets */ - __u32 ifOutDiscards; /*!< counter of dropped egress packets */ -} atm_aal5_ifEntry_t; - -typedef struct { - __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */ - __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet - __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */ -} atm_aal5_vcc_t; - -typedef struct { - int vpi; /*!< VPI of the VCC to get MIB counters */ - int vci; /*!< VCI of the VCC to get MIB counters */ - atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */ -} atm_aal5_vcc_x_t; - -/*@}*/ - - - -/* - * #################################### - * IOCTL - * #################################### - */ - -/*! - \addtogroup IFX_ATM_IOCTL - */ -/*@{*/ - -/* - * ioctl Command - */ -/*! - \brief ATM IOCTL Magic Number - */ -#define PPE_ATM_IOC_MAGIC 'o' -/*! - \brief ATM IOCTL Command - Get Cell Level MIB Counters - - This command is obsolete. User can get cell level MIB from DSL API. - This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get AAL5 Level MIB Counters - - Get AAL5 packet counters. - This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get Per PVC MIB Counters - - Get AAL5 packet counters for each PVC. - This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters. - */ -#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t) -/*! - \brief Total Number of ATM IOCTL Commands - */ -#define PPE_ATM_IOC_MAXNR 3 - -/*@}*/ - - - -/* - * #################################### - * API - * #################################### - */ - -#ifdef __KERNEL__ -struct port_cell_info { - unsigned int port_num; - unsigned int tx_link_rate[2]; -}; -#endif - - - -#endif // IFX_ATM_H - diff --git a/package/system/ltq-dsl/src/ifxmips_atm_core.c b/package/system/ltq-dsl/src/ifxmips_atm_core.c deleted file mode 100644 index 92853bb886..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_core.c +++ /dev/null @@ -1,4770 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_core.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Version No. - * #################################### - */ - -#define IFX_ATM_VER_MAJOR 1 -#define IFX_ATM_VER_MID 0 -#define IFX_ATM_VER_MINOR 19 - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/vmalloc.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <linux/atmdev.h> -#include <linux/atm.h> -#include <linux/clk.h> -#include <linux/interrupt.h> - -/* - * Chip Specific Head File - */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" -#define IFX_MEI_BSP 1 -#include "ifxmips_mei_interface.h" -#include "ifxmips_atm_core.h" - - - -/* - * #################################### - * Kernel Version Adaption - * #################################### - */ -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11) - #define MODULE_PARM_ARRAY(a, b) module_param_array(a, int, NULL, 0) - #define MODULE_PARM(a, b) module_param(a, int, 0) -#else - #define MODULE_PARM_ARRAY(a, b) MODULE_PARM(a, b) -#endif - - - -/*! - \addtogroup IFXMIPS_ATM_MODULE_PARAMS - */ -/*@{*/ -/* - * #################################### - * Parameters to Configure PPE - * #################################### - */ -/*! - \brief QSB cell delay variation due to concurrency - */ -static int qsb_tau = 1; /* QSB cell delay variation due to concurrency */ -/*! - \brief QSB scheduler burst length - */ -static int qsb_srvm = 0x0F; /* QSB scheduler burst length */ -/*! - \brief QSB time step, all legal values are 1, 2, 4 - */ -static int qsb_tstep = 4 ; /* QSB time step, all legal values are 1, 2, 4 */ - -/*! - \brief Write descriptor delay - */ -static int write_descriptor_delay = 0x20; /* Write descriptor delay */ - -/*! - \brief AAL5 padding byte ('~') - */ -static int aal5_fill_pattern = 0x007E; /* AAL5 padding byte ('~') */ -/*! - \brief Max frame size for RX - */ -static int aal5r_max_packet_size = 0x0700; /* Max frame size for RX */ -/*! - \brief Min frame size for RX - */ -static int aal5r_min_packet_size = 0x0000; /* Min frame size for RX */ -/*! - \brief Max frame size for TX - */ -static int aal5s_max_packet_size = 0x0700; /* Max frame size for TX */ -/*! - \brief Min frame size for TX - */ -static int aal5s_min_packet_size = 0x0000; /* Min frame size for TX */ -/*! - \brief Drop error packet in RX path - */ -static int aal5r_drop_error_packet = 1; /* Drop error packet in RX path */ - -/*! - \brief Number of descriptors per DMA RX channel - */ -static int dma_rx_descriptor_length = 128; /* Number of descriptors per DMA RX channel */ -/*! - \brief Number of descriptors per DMA TX channel - */ -static int dma_tx_descriptor_length = 64; /* Number of descriptors per DMA TX channel */ -/*! - \brief PPE core clock cycles between descriptor write and effectiveness in external RAM - */ -static int dma_rx_clp1_descriptor_threshold = 38; -/*@}*/ - -MODULE_PARM(qsb_tau, "i"); -MODULE_PARM_DESC(qsb_tau, "Cell delay variation. Value must be > 0"); -MODULE_PARM(qsb_srvm, "i"); -MODULE_PARM_DESC(qsb_srvm, "Maximum burst size"); -MODULE_PARM(qsb_tstep, "i"); -MODULE_PARM_DESC(qsb_tstep, "n*32 cycles per sbs cycles n=1,2,4"); - -MODULE_PARM(write_descriptor_delay, "i"); -MODULE_PARM_DESC(write_descriptor_delay, "PPE core clock cycles between descriptor write and effectiveness in external RAM"); - -MODULE_PARM(aal5_fill_pattern, "i"); -MODULE_PARM_DESC(aal5_fill_pattern, "Filling pattern (PAD) for AAL5 frames"); -MODULE_PARM(aal5r_max_packet_size, "i"); -MODULE_PARM_DESC(aal5r_max_packet_size, "Max packet size in byte for downstream AAL5 frames"); -MODULE_PARM(aal5r_min_packet_size, "i"); -MODULE_PARM_DESC(aal5r_min_packet_size, "Min packet size in byte for downstream AAL5 frames"); -MODULE_PARM(aal5s_max_packet_size, "i"); -MODULE_PARM_DESC(aal5s_max_packet_size, "Max packet size in byte for upstream AAL5 frames"); -MODULE_PARM(aal5s_min_packet_size, "i"); -MODULE_PARM_DESC(aal5s_min_packet_size, "Min packet size in byte for upstream AAL5 frames"); -MODULE_PARM(aal5r_drop_error_packet, "i"); -MODULE_PARM_DESC(aal5r_drop_error_packet, "Non-zero value to drop error packet for downstream"); - -MODULE_PARM(dma_rx_descriptor_length, "i"); -MODULE_PARM_DESC(dma_rx_descriptor_length, "Number of descriptor assigned to DMA RX channel (>16)"); -MODULE_PARM(dma_tx_descriptor_length, "i"); -MODULE_PARM_DESC(dma_tx_descriptor_length, "Number of descriptor assigned to DMA TX channel (>16)"); -MODULE_PARM(dma_rx_clp1_descriptor_threshold, "i"); -MODULE_PARM_DESC(dma_rx_clp1_descriptor_threshold, "Descriptor threshold for cells with cell loss priority 1"); - - - -/* - * #################################### - * Definition - * #################################### - */ - -#define ENABLE_LED_FRAMEWORK 1 - -#define DUMP_SKB_LEN ~0 - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Network Operations - */ -static int ppe_ioctl(struct atm_dev *, unsigned int, void *); -static int ppe_open(struct atm_vcc *); -static void ppe_close(struct atm_vcc *); -static int ppe_send(struct atm_vcc *, struct sk_buff *); -static int ppe_send_oam(struct atm_vcc *, void *, int); -static int ppe_change_qos(struct atm_vcc *, struct atm_qos *, int); - -/* - * ADSL LED - */ -static INLINE void adsl_led_flash(void); - -/* - * 64-bit operation used by MIB calculation - */ -static INLINE void u64_add_u32(ppe_u64_t, unsigned int, ppe_u64_t *); - -/* - * buffer manage functions - */ -static INLINE struct sk_buff* alloc_skb_rx(void); -static INLINE struct sk_buff* alloc_skb_tx(unsigned int); -struct sk_buff* atm_alloc_tx(struct atm_vcc *, unsigned int); -static INLINE void atm_free_tx_skb_vcc(struct sk_buff *, struct atm_vcc *); -static INLINE struct sk_buff *get_skb_rx_pointer(unsigned int); -static INLINE int get_tx_desc(unsigned int); - -/* - * mailbox handler and signal function - */ -static INLINE void mailbox_oam_rx_handler(void); -static INLINE void mailbox_aal_rx_handler(void); -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET - static void do_ppe_tasklet(unsigned long); -#endif -static irqreturn_t mailbox_irq_handler(int, void *); -static INLINE void mailbox_signal(unsigned int, int); - -/* - * QSB & HTU setting functions - */ -static void set_qsb(struct atm_vcc *, struct atm_qos *, unsigned int); -static void qsb_global_set(void); -static INLINE void set_htu_entry(unsigned int, unsigned int, unsigned int, int, int); -static INLINE void clear_htu_entry(unsigned int); -static void validate_oam_htu_entry(void); -static void invalidate_oam_htu_entry(void); - -/* - * look up for connection ID - */ -static INLINE int find_vpi(unsigned int); -static INLINE int find_vpivci(unsigned int, unsigned int); -static INLINE int find_vcc(struct atm_vcc *); - -/* - * ReTX functions - */ -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static void retx_polling_func(unsigned long); - static int init_atm_tc_retrans_param(void); - static void clear_atm_tc_retrans_param(void); -#endif - - -/* - * Debug Functions - */ -#if defined(DEBUG_DUMP_SKB) && DEBUG_DUMP_SKB - static void dump_skb(struct sk_buff *, unsigned int, char *, int, int, int); -#else - #define dump_skb(skb, len, title, port, ch, is_tx) do {} while (0) -#endif -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - static void skb_swap(struct sk_buff *, unsigned int); -#else - #define skb_swap(skb, byteoff) do {} while (0) -#endif - -/* - * Proc File Functions - */ -static INLINE void proc_file_create(void); -static INLINE void proc_file_delete(void); -static int proc_read_version(char *, char **, off_t, int, int *, void *); -static int proc_read_mib(char *, char **, off_t, int, int *, void *); -static int proc_write_mib(struct file *, const char *, unsigned long, void *); -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static int proc_read_retx_mib(char *, char **, off_t, int, int *, void *); - static int proc_write_retx_mib(struct file *, const char *, unsigned long, void *); -#endif -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - static int proc_read_dbg(char *, char **, off_t, int, int *, void *); - static int proc_write_dbg(struct file *, const char *, unsigned long, void *); - static int proc_write_mem(struct file *, const char *, unsigned long, void *); - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) || defined(CONFIG_DANUBE) || defined(CONFIG_AMAZON_SE) - static int proc_read_pp32(char *, char **, off_t, int, int *, void *); - static int proc_write_pp32(struct file *, const char *, unsigned long, void *); - #endif -#endif -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - static int proc_read_htu(char *, char **, off_t, int, int *, void *); - static int proc_read_txq(char *, char **, off_t, int, int *, void *); - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static int proc_read_retx_fw(char *, char **, off_t, int, int *, void *); - static int proc_read_retx_stats(char *, char **, off_t, int, int *, void *); - static int proc_write_retx_stats(struct file *, const char *, unsigned long, void *); - static int proc_read_retx_cfg(char *, char **, off_t, int, int *, void *); - static int proc_write_retx_cfg(struct file *, const char *, unsigned long, void *); - static int proc_read_retx_dsl_param(char *, char **, off_t, int, int *, void *); - #endif -#endif - -/* - * Proc Help Functions - */ -static int stricmp(const char *, const char *); -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - static int strincmp(const char *, const char *, int); - static int get_token(char **, char **, int *, int *); - static unsigned int get_number(char **, int *, int); - static void ignore_space(char **, int *); -#endif -static INLINE int ifx_atm_version(char *); - -/* - * Init & clean-up functions - */ -static INLINE void check_parameters(void); -static INLINE int init_priv_data(void); -static INLINE void clear_priv_data(void); -static INLINE void init_rx_tables(void); -static INLINE void init_tx_tables(void); - -/* - * Exteranl Function - */ -#if defined(CONFIG_IFX_OAM) || defined(CONFIG_IFX_OAM_MODULE) - extern void ifx_push_oam(unsigned char *); -#else - static inline void ifx_push_oam(unsigned char *dummy) {} -#endif -#if defined(CONFIG_IFXMIPS_DSL_CPE_MEI) || defined(CONFIG_IFXMIPS_DSL_CPE_MEI_MODULE) - #if !defined(ENABLE_LED_FRAMEWORK) || !ENABLE_LED_FRAMEWORK - extern int ifx_mei_atm_led_blink(void) __attribute__ ((weak)); - #endif - extern int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr) __attribute__ ((weak)); -#else - #if !defined(ENABLE_LED_FRAMEWORK) || !ENABLE_LED_FRAMEWORK - static inline int ifx_mei_atm_led_blink(void) { return IFX_SUCCESS; } - #endif - static inline int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr) - { - if ( is_showtime != NULL ) - *is_showtime = 0; - return IFX_SUCCESS; - } -#endif - -/* - * External variable - */ -struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL; - - -//extern struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int); -#if defined(CONFIG_IFXMIPS_DSL_CPE_MEI) || defined(CONFIG_IFXMIPS_DSL_CPE_MEI_MODULE) - extern int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) __attribute__ ((weak)); - extern int (*ifx_mei_atm_showtime_exit)(void) __attribute__ ((weak)); -#else - int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL; - EXPORT_SYMBOL(ifx_mei_atm_showtime_enter); - int (*ifx_mei_atm_showtime_exit)(void) = NULL; - EXPORT_SYMBOL(ifx_mei_atm_showtime_exit); -#endif - - - -/* - * #################################### - * Local Variable - * #################################### - */ - -static struct atm_priv_data g_atm_priv_data; - -static struct atmdev_ops g_ifx_atm_ops = { - .open = ppe_open, - .close = ppe_close, - .ioctl = ppe_ioctl, - .send = ppe_send, - .send_oam = ppe_send_oam, - .change_qos = ppe_change_qos, - .owner = THIS_MODULE, -}; - -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET - DECLARE_TASKLET(g_dma_tasklet, do_ppe_tasklet, 0); -#endif - -static int g_showtime = 0; -static void *g_xdata_addr = NULL; - -#if 0 /*--- defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK ---*/ - static void *g_data_led_trigger = NULL; -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static unsigned long g_retx_playout_buffer = 0; - - static volatile int g_retx_htu = 1; - static struct dsl_param g_dsl_param = {0}; - static int g_retx_polling_cnt = HZ; - static struct timeval g_retx_polling_start = {0}, g_retx_polling_end = {0}; - static struct timer_list g_retx_polling_timer; -#endif - -unsigned int ifx_atm_dbg_enable = 0; - -static struct proc_dir_entry* g_atm_dir = NULL; - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static int ppe_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg) -{ - int ret = 0; - atm_cell_ifEntry_t mib_cell; - atm_aal5_ifEntry_t mib_aal5; - atm_aal5_vcc_x_t mib_vcc; - unsigned int value; - int conn; - - if ( _IOC_TYPE(cmd) != PPE_ATM_IOC_MAGIC - || _IOC_NR(cmd) >= PPE_ATM_IOC_MAXNR ) - return -ENOTTY; - - if ( _IOC_DIR(cmd) & _IOC_READ ) - ret = !access_ok(VERIFY_WRITE, arg, _IOC_SIZE(cmd)); - else if ( _IOC_DIR(cmd) & _IOC_WRITE ) - ret = !access_ok(VERIFY_READ, arg, _IOC_SIZE(cmd)); - if ( ret ) - return -EFAULT; - - switch ( cmd ) - { - case PPE_ATM_MIB_CELL: /* cell level MIB */ - /* These MIB should be read at ARC side, now put zero only. */ - mib_cell.ifHCInOctets_h = 0; - mib_cell.ifHCInOctets_l = 0; - mib_cell.ifHCOutOctets_h = 0; - mib_cell.ifHCOutOctets_l = 0; - mib_cell.ifInErrors = 0; - mib_cell.ifInUnknownProtos = WAN_MIB_TABLE->wrx_drophtu_cell; - mib_cell.ifOutErrors = 0; - - ret = sizeof(mib_cell) - copy_to_user(arg, &mib_cell, sizeof(mib_cell)); - break; - - case PPE_ATM_MIB_AAL5: /* AAL5 MIB */ - value = WAN_MIB_TABLE->wrx_total_byte; - u64_add_u32(g_atm_priv_data.wrx_total_byte, value - g_atm_priv_data.prev_wrx_total_byte, &g_atm_priv_data.wrx_total_byte); - g_atm_priv_data.prev_wrx_total_byte = value; - mib_aal5.ifHCInOctets_h = g_atm_priv_data.wrx_total_byte.h; - mib_aal5.ifHCInOctets_l = g_atm_priv_data.wrx_total_byte.l; - - value = WAN_MIB_TABLE->wtx_total_byte; - u64_add_u32(g_atm_priv_data.wtx_total_byte, value - g_atm_priv_data.prev_wtx_total_byte, &g_atm_priv_data.wtx_total_byte); - g_atm_priv_data.prev_wtx_total_byte = value; - mib_aal5.ifHCOutOctets_h = g_atm_priv_data.wtx_total_byte.h; - mib_aal5.ifHCOutOctets_l = g_atm_priv_data.wtx_total_byte.l; - - mib_aal5.ifInUcastPkts = g_atm_priv_data.wrx_pdu; - mib_aal5.ifOutUcastPkts = WAN_MIB_TABLE->wtx_total_pdu; - mib_aal5.ifInErrors = WAN_MIB_TABLE->wrx_err_pdu; - mib_aal5.ifInDiscards = WAN_MIB_TABLE->wrx_dropdes_pdu + g_atm_priv_data.wrx_drop_pdu; - mib_aal5.ifOutErros = g_atm_priv_data.wtx_err_pdu; - mib_aal5.ifOutDiscards = g_atm_priv_data.wtx_drop_pdu; - - ret = sizeof(mib_aal5) - copy_to_user(arg, &mib_aal5, sizeof(mib_aal5)); - break; - - case PPE_ATM_MIB_VCC: /* VCC related MIB */ - copy_from_user(&mib_vcc, arg, sizeof(mib_vcc)); - conn = find_vpivci(mib_vcc.vpi, mib_vcc.vci); - if ( conn >= 0 ) - { - mib_vcc.mib_vcc.aal5VccCrcErrors = g_atm_priv_data.conn[conn].aal5_vcc_crc_err; - mib_vcc.mib_vcc.aal5VccOverSizedSDUs = g_atm_priv_data.conn[conn].aal5_vcc_oversize_sdu; - mib_vcc.mib_vcc.aal5VccSarTimeOuts = 0; /* no timer support */ - ret = sizeof(mib_vcc) - copy_to_user(arg, &mib_vcc, sizeof(mib_vcc)); - } - else - ret = -EINVAL; - break; - - default: - ret = -ENOIOCTLCMD; - } - - return ret; -} - -static int ppe_open(struct atm_vcc *vcc) -{ - int ret; - short vpi = vcc->vpi; - int vci = vcc->vci; - struct port *port = &g_atm_priv_data.port[(int)vcc->dev->dev_data]; - int conn; - int f_enable_irq = 0; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - int sys_flag; -#endif - - if ( vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0 ) - return -EPROTONOSUPPORT; - -#if !defined(DISABLE_QOS_WORKAROUND) || !DISABLE_QOS_WORKAROUND - /* check bandwidth */ - - if (vcc->qos.txtp.traffic_class == ATM_CBR && - vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("CBR set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - if(vcc->qos.txtp.traffic_class == ATM_VBR_RT && - vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("VBR RT set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - - if (vcc->qos.txtp.traffic_class == ATM_VBR_NRT && - vcc->qos.txtp.scr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("VBR NRT set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - - if (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS && - vcc->qos.txtp.min_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("UBR PLUS set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - -#endif - - /* check existing vpi,vci */ - conn = find_vpivci(vpi, vci); - if ( conn >= 0 ) { - ret = -EADDRINUSE; - goto PPE_OPEN_EXIT; - } - - /* check whether it need to enable irq */ - if ( g_atm_priv_data.conn_table == 0 ) - f_enable_irq = 1; - - /* allocate connection */ - for ( conn = 0; conn < MAX_PVC_NUMBER; conn++ ) { - if ( test_and_set_bit(conn, &g_atm_priv_data.conn_table) == 0 ) { - g_atm_priv_data.conn[conn].vcc = vcc; - break; - } - } - if ( conn == MAX_PVC_NUMBER ) - { - printk("max_pvc_number reached\n"); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - - /* reserve bandwidth */ - switch ( vcc->qos.txtp.traffic_class ) { - case ATM_CBR: - case ATM_VBR_RT: - port->tx_current_cell_rate += vcc->qos.txtp.max_pcr; - break; - case ATM_VBR_NRT: - port->tx_current_cell_rate += vcc->qos.txtp.scr; - break; - case ATM_UBR_PLUS: - port->tx_current_cell_rate += vcc->qos.txtp.min_pcr; - break; - } - - /* set qsb */ - set_qsb(vcc, &vcc->qos, conn); - - /* update atm_vcc structure */ - vcc->itf = (int)vcc->dev->dev_data; - vcc->vpi = vpi; - vcc->vci = vci; - set_bit(ATM_VF_READY, &vcc->flags); - - /* enable irq */ - if (f_enable_irq ) { - ifx_atm_alloc_tx = atm_alloc_tx; - - *MBOX_IGU1_ISRC = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); - *MBOX_IGU1_IER = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); - - enable_irq(PPE_MAILBOX_IGU1_INT); - } - - /* set port */ - WTX_QUEUE_CONFIG(conn + FIRST_QSB_QID)->sbid = (int)vcc->dev->dev_data; - - /* set htu entry */ - set_htu_entry(vpi, vci, conn, vcc->qos.aal == ATM_AAL5 ? 1 : 0, 0); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - // ReTX: occupy second QID - local_irq_save(sys_flag); - if ( g_retx_htu && vcc->qos.aal == ATM_AAL5 ) - { - int retx_conn = (conn + 8) % 16; // ReTX queue - - if ( retx_conn < MAX_PVC_NUMBER && test_and_set_bit(retx_conn, &g_atm_priv_data.conn_table) == 0 ) { - g_atm_priv_data.conn[retx_conn].vcc = vcc; - set_htu_entry(vpi, vci, retx_conn, vcc->qos.aal == ATM_AAL5 ? 1 : 0, 1); - } - } - local_irq_restore(sys_flag); -#endif - - ret = 0; - -PPE_OPEN_EXIT: - return ret; -} - -static void ppe_close(struct atm_vcc *vcc) -{ - int conn; - struct port *port; - struct connection *connection; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - int sys_flag; -#endif - - if ( vcc == NULL ) - return; - - /* get connection id */ - conn = find_vcc(vcc); - if ( conn < 0 ) { - err("can't find vcc"); - goto PPE_CLOSE_EXIT; - } - connection = &g_atm_priv_data.conn[conn]; - port = &g_atm_priv_data.port[connection->port]; - - /* clear htu */ - clear_htu_entry(conn); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - // ReTX: release second QID - local_irq_save(sys_flag); - if ( g_retx_htu && vcc->qos.aal == ATM_AAL5 ) - { - int retx_conn = (conn + 8) % 16; // ReTX queue - - if ( retx_conn < MAX_PVC_NUMBER && g_atm_priv_data.conn[retx_conn].vcc == vcc ) { - clear_htu_entry(retx_conn); - g_atm_priv_data.conn[retx_conn].vcc = NULL; - g_atm_priv_data.conn[retx_conn].aal5_vcc_crc_err = 0; - g_atm_priv_data.conn[retx_conn].aal5_vcc_oversize_sdu = 0; - clear_bit(retx_conn, &g_atm_priv_data.conn_table); - } - } - local_irq_restore(sys_flag); -#endif - - /* release connection */ - connection->vcc = NULL; - connection->aal5_vcc_crc_err = 0; - connection->aal5_vcc_oversize_sdu = 0; - clear_bit(conn, &g_atm_priv_data.conn_table); - - /* disable irq */ - if ( g_atm_priv_data.conn_table == 0 ) { - disable_irq(PPE_MAILBOX_IGU1_INT); - ifx_atm_alloc_tx = NULL; - } - - /* release bandwidth */ - switch ( vcc->qos.txtp.traffic_class ) - { - case ATM_CBR: - case ATM_VBR_RT: - port->tx_current_cell_rate -= vcc->qos.txtp.max_pcr; - break; - case ATM_VBR_NRT: - port->tx_current_cell_rate -= vcc->qos.txtp.scr; - break; - case ATM_UBR_PLUS: - port->tx_current_cell_rate -= vcc->qos.txtp.min_pcr; - break; - } - -PPE_CLOSE_EXIT: - return; -} - -static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb) -{ - int ret; - int conn; - int desc_base; - struct tx_descriptor reg_desc = {0}; - - if ( vcc == NULL || skb == NULL ) - return -EINVAL; - - skb_orphan(skb); - skb_get(skb); - atm_free_tx_skb_vcc(skb, vcc); - - conn = find_vcc(vcc); - if ( conn < 0 ) { - ret = -EINVAL; - goto FIND_VCC_FAIL; - } - - if ( !g_showtime ) { - err("not in showtime"); - ret = -EIO; - goto PPE_SEND_FAIL; - } - - if ( vcc->qos.aal == ATM_AAL5 ) { - int byteoff; - int datalen; - struct tx_inband_header *header; - - datalen = skb->len; - byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1); - - if ( skb_headroom(skb) < byteoff + TX_INBAND_HEADER_LENGTH ) { - struct sk_buff *new_skb; - - new_skb = alloc_skb_tx(datalen); - if ( new_skb == NULL ) { - err("ALLOC_SKB_TX_FAIL"); - ret = -ENOMEM; - goto PPE_SEND_FAIL; - } - skb_put(new_skb, datalen); - memcpy(new_skb->data, skb->data, datalen); - dev_kfree_skb_any(skb); - skb = new_skb; - byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1); - } - - skb_push(skb, byteoff + TX_INBAND_HEADER_LENGTH); - - header = (struct tx_inband_header *)skb->data; - - /* setup inband trailer */ - header->uu = 0; - header->cpi = 0; - header->pad = aal5_fill_pattern; - header->res1 = 0; - - /* setup cell header */ - header->clp = (vcc->atm_options & ATM_ATMOPT_CLP) ? 1 : 0; - header->pti = ATM_PTI_US0; - header->vci = vcc->vci; - header->vpi = vcc->vpi; - header->gfc = 0; - - /* setup descriptor */ - reg_desc.dataptr = (unsigned int)skb->data >> 2; - reg_desc.datalen = datalen; - reg_desc.byteoff = byteoff; - reg_desc.iscell = 0; - } - else { - /* if data pointer is not aligned, allocate new sk_buff */ - if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 ) { - struct sk_buff *new_skb; - - err("skb->data not aligned"); - - new_skb = alloc_skb_tx(skb->len); - if ( new_skb == NULL ) { - err("ALLOC_SKB_TX_FAIL"); - ret = -ENOMEM; - goto PPE_SEND_FAIL; - } - skb_put(new_skb, skb->len); - memcpy(new_skb->data, skb->data, skb->len); - dev_kfree_skb_any(skb); - skb = new_skb; - } - - reg_desc.dataptr = (unsigned int)skb->data >> 2; - reg_desc.datalen = skb->len; - reg_desc.byteoff = 0; - reg_desc.iscell = 1; - } - - reg_desc.own = 1; - reg_desc.c = 1; - reg_desc.sop = reg_desc.eop = 1; - - desc_base = get_tx_desc(conn); - if ( desc_base < 0 ) { - err("ALLOC_TX_CONNECTION_FAIL"); - ret = -EIO; - goto PPE_SEND_FAIL; - } - - if ( vcc->stats ) - atomic_inc(&vcc->stats->tx); - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wtx_pdu++; - - /* update descriptor send pointer */ - if ( g_atm_priv_data.conn[conn].tx_skb[desc_base] != NULL ) - dev_kfree_skb_any(g_atm_priv_data.conn[conn].tx_skb[desc_base]); - g_atm_priv_data.conn[conn].tx_skb[desc_base] = skb; - - /* write discriptor to memory and write back cache */ -#ifdef CONFIG_DEBUG_SLAB - /* be sure that "redzone 1" is written back to memory */ - dma_cache_wback((unsigned long)skb->head, 32); -#endif - dma_cache_wback((unsigned long)skb_shinfo(skb), sizeof(struct skb_shared_info)); - dma_cache_wback((unsigned long)skb->data, skb->len); - g_atm_priv_data.conn[conn].tx_desc[desc_base] = reg_desc; - - dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, 0, conn, 1); - - mailbox_signal(conn, 1); - - adsl_led_flash(); - - return 0; - -FIND_VCC_FAIL: - err("FIND_VCC_FAIL"); - g_atm_priv_data.wtx_err_pdu++; - dev_kfree_skb_any(skb); - return ret; - -PPE_SEND_FAIL: - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wtx_drop_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->tx_err); - dev_kfree_skb_any(skb); - return ret; -} - -static int ppe_send_oam(struct atm_vcc *vcc, void *cell, int flags) -{ - int conn; - struct uni_cell_header *uni_cell_header = (struct uni_cell_header *)cell; - int desc_base; - struct sk_buff *skb; - struct tx_descriptor reg_desc = {0}; - - if ( ((uni_cell_header->pti == ATM_PTI_SEGF5 || uni_cell_header->pti == ATM_PTI_E2EF5) - && find_vpivci(uni_cell_header->vpi, uni_cell_header->vci) < 0) - || ((uni_cell_header->vci == 0x03 || uni_cell_header->vci == 0x04) - && find_vpi(uni_cell_header->vpi) < 0) ) - return -EINVAL; - - if ( !g_showtime ) { - err("not in showtime"); - return -EIO; - } - - conn = find_vcc(vcc); - if ( conn < 0 ) { - err("FIND_VCC_FAIL"); - return -EINVAL; - } - - skb = alloc_skb_tx(CELL_SIZE); - if ( skb == NULL ) { - err("ALLOC_SKB_TX_FAIL"); - return -ENOMEM; - } - memcpy(skb->data, cell, CELL_SIZE); - - reg_desc.dataptr = (unsigned int)skb->data >> 2; - reg_desc.datalen = CELL_SIZE; - reg_desc.byteoff = 0; - reg_desc.iscell = 1; - - reg_desc.own = 1; - reg_desc.c = 1; - reg_desc.sop = reg_desc.eop = 1; - - desc_base = get_tx_desc(conn); - if ( desc_base < 0 ) { - dev_kfree_skb_any(skb); - err("ALLOC_TX_CONNECTION_FAIL"); - return -EIO; - } - - if ( vcc->stats ) - atomic_inc(&vcc->stats->tx); - - /* update descriptor send pointer */ - if ( g_atm_priv_data.conn[conn].tx_skb[desc_base] != NULL ) - dev_kfree_skb_any(g_atm_priv_data.conn[conn].tx_skb[desc_base]); - g_atm_priv_data.conn[conn].tx_skb[desc_base] = skb; - - /* write discriptor to memory and write back cache */ - g_atm_priv_data.conn[conn].tx_desc[desc_base] = reg_desc; - dma_cache_wback((unsigned long)skb->data, CELL_SIZE); - - dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, 0, conn, 1); - - if ( vcc->qos.aal == ATM_AAL5 && (ifx_atm_dbg_enable & DBG_ENABLE_MASK_MAC_SWAP) ) { - skb_swap(skb, reg_desc.byteoff); - } - - mailbox_signal(conn, 1); - - adsl_led_flash(); - - return 0; -} - -static int ppe_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags) -{ - int conn; - - if ( vcc == NULL || qos == NULL ) - return -EINVAL; - - conn = find_vcc(vcc); - if ( conn < 0 ) - return -EINVAL; - - set_qsb(vcc, qos, conn); - - return 0; -} - -static INLINE void adsl_led_flash(void) -{ -#if 0 -#if defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK - if ( g_data_led_trigger != NULL ) - ifx_led_trigger_activate(g_data_led_trigger); -#else - if (!IS_ERR(&ifx_mei_atm_led_blink) && &ifx_mei_atm_led_blink ) - ifx_mei_atm_led_blink(); -#endif -#endif -} - -/* - * Description: - * Add a 32-bit value to 64-bit value, and put result in a 64-bit variable. - * Input: - * opt1 --- ppe_u64_t, first operand, a 64-bit unsigned integer value - * opt2 --- unsigned int, second operand, a 32-bit unsigned integer value - * ret --- ppe_u64_t, pointer to a variable to hold result - * Output: - * none - */ -static INLINE void u64_add_u32(ppe_u64_t opt1, unsigned int opt2, ppe_u64_t *ret) -{ - ret->l = opt1.l + opt2; - if ( ret->l < opt1.l || ret->l < opt2 ) - ret->h++; -} - -static INLINE struct sk_buff* alloc_skb_rx(void) -{ - struct sk_buff *skb; - - skb = dev_alloc_skb(RX_DMA_CH_AAL_BUF_SIZE + DATA_BUFFER_ALIGNMENT); - if ( skb != NULL ) { - /* must be burst length alignment */ - if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 ) - skb_reserve(skb, ~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1)); - /* pub skb in reserved area "skb->data - 4" */ - *((struct sk_buff **)skb->data - 1) = skb; - /* write back and invalidate cache */ - dma_cache_wback_inv((unsigned long)skb->data - sizeof(skb), sizeof(skb)); - /* invalidate cache */ - dma_cache_inv((unsigned long)skb->data, (unsigned int)skb->end - (unsigned int)skb->data); - } - - return skb; -} - -static INLINE struct sk_buff* alloc_skb_tx(unsigned int size) -{ - struct sk_buff *skb; - - /* allocate memory including header and padding */ - size += TX_INBAND_HEADER_LENGTH + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES; - size &= ~(DATA_BUFFER_ALIGNMENT - 1); - skb = dev_alloc_skb(size + DATA_BUFFER_ALIGNMENT); - /* must be burst length alignment */ - if ( skb != NULL ) - skb_reserve(skb, (~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1)) + TX_INBAND_HEADER_LENGTH); - return skb; -} - -struct sk_buff* atm_alloc_tx(struct atm_vcc *vcc, unsigned int size) -{ - int conn; - struct sk_buff *skb; - - /* oversize packet */ - if ( size > aal5s_max_packet_size ) { - err("atm_alloc_tx: oversize packet"); - return NULL; - } - /* send buffer overflow */ - if ( atomic_read(&sk_atm(vcc)->sk_wmem_alloc) && !atm_may_send(vcc, size) ) { - err("atm_alloc_tx: send buffer overflow"); - return NULL; - } - conn = find_vcc(vcc); - if ( conn < 0 ) { - err("atm_alloc_tx: unknown VCC"); - return NULL; - } - - skb = dev_alloc_skb(size); - if ( skb == NULL ) { - err("atm_alloc_tx: sk buffer is used up"); - return NULL; - } - - atomic_add(skb->truesize, &sk_atm(vcc)->sk_wmem_alloc); - - return skb; -} - -static INLINE void atm_free_tx_skb_vcc(struct sk_buff *skb, struct atm_vcc *vcc) -{ - if ( vcc->pop != NULL ) - vcc->pop(vcc, skb); - else - dev_kfree_skb_any(skb); -} - -static INLINE struct sk_buff *get_skb_rx_pointer(unsigned int dataptr) -{ - unsigned int skb_dataptr; - struct sk_buff *skb; - - skb_dataptr = ((dataptr - 1) << 2) | KSEG1; - skb = *(struct sk_buff **)skb_dataptr; - - ASSERT((unsigned int)skb >= KSEG0, "invalid skb - skb = %#08x, dataptr = %#08x", (unsigned int)skb, dataptr); - ASSERT(((unsigned int)skb->data | KSEG1) == ((dataptr << 2) | KSEG1), "invalid skb - skb = %#08x, skb->data = %#08x, dataptr = %#08x", (unsigned int)skb, (unsigned int)skb->data, dataptr); - - return skb; -} - -static INLINE int get_tx_desc(unsigned int conn) -{ - int desc_base = -1; - struct connection *p_conn = &g_atm_priv_data.conn[conn]; - - if ( p_conn->tx_desc[p_conn->tx_desc_pos].own == 0 ) { - desc_base = p_conn->tx_desc_pos; - if ( ++(p_conn->tx_desc_pos) == dma_tx_descriptor_length ) - p_conn->tx_desc_pos = 0; - } - - return desc_base; -} - -static INLINE void mailbox_oam_rx_handler(void) -{ - unsigned int vlddes = WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_OAM)->vlddes; - struct rx_descriptor reg_desc; - struct uni_cell_header *header; - int conn; - struct atm_vcc *vcc; - unsigned int i; - - for ( i = 0; i < vlddes; i++ ) { - do { - reg_desc = g_atm_priv_data.oam_desc[g_atm_priv_data.oam_desc_pos]; - } while ( reg_desc.own || !reg_desc.c ); // keep test OWN and C bit until data is ready - - header = (struct uni_cell_header *)&g_atm_priv_data.oam_buf[g_atm_priv_data.oam_desc_pos * RX_DMA_CH_OAM_BUF_SIZE]; - - if ( header->pti == ATM_PTI_SEGF5 || header->pti == ATM_PTI_E2EF5 ) - conn = find_vpivci(header->vpi, header->vci); - else if ( header->vci == 0x03 || header->vci == 0x04 ) - conn = find_vpi(header->vpi); - else - conn = -1; - - if ( conn >= 0 && g_atm_priv_data.conn[conn].vcc != NULL ) { - vcc = g_atm_priv_data.conn[conn].vcc; - - if ( vcc->push_oam != NULL ) - vcc->push_oam(vcc, header); - else - ifx_push_oam((unsigned char *)header); - adsl_led_flash(); - } - - reg_desc.byteoff = 0; - reg_desc.datalen = RX_DMA_CH_OAM_BUF_SIZE; - reg_desc.own = 1; - reg_desc.c = 0; - - g_atm_priv_data.oam_desc[g_atm_priv_data.oam_desc_pos] = reg_desc; - if ( ++g_atm_priv_data.oam_desc_pos == RX_DMA_CH_OAM_DESC_LEN ) - g_atm_priv_data.oam_desc_pos = 0; - - mailbox_signal(RX_DMA_CH_OAM, 0); - } -} - -static INLINE void mailbox_aal_rx_handler(void) -{ - unsigned int vlddes = WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_AAL)->vlddes; - struct rx_descriptor reg_desc; - int conn; - struct atm_vcc *vcc; - struct sk_buff *skb, *new_skb; - struct rx_inband_trailer *trailer; - unsigned int i; - - for ( i = 0; i < vlddes; i++ ) { - do { - reg_desc = g_atm_priv_data.aal_desc[g_atm_priv_data.aal_desc_pos]; - } while ( reg_desc.own || !reg_desc.c ); // keep test OWN and C bit until data is ready - - conn = reg_desc.id; - - if ( g_atm_priv_data.conn[conn].vcc != NULL ) { - vcc = g_atm_priv_data.conn[conn].vcc; - - skb = get_skb_rx_pointer(reg_desc.dataptr); - - if ( reg_desc.err ) { - if ( vcc->qos.aal == ATM_AAL5 ) { - trailer = (struct rx_inband_trailer *)((unsigned int)skb->data + ((reg_desc.byteoff + reg_desc.datalen + MAX_RX_PACKET_PADDING_BYTES) & ~MAX_RX_PACKET_PADDING_BYTES)); - if ( trailer->stw_crc ) - g_atm_priv_data.conn[conn].aal5_vcc_crc_err++; - if ( trailer->stw_ovz ) - g_atm_priv_data.conn[conn].aal5_vcc_oversize_sdu++; - g_atm_priv_data.wrx_drop_pdu++; - } - if ( vcc->stats ) { - atomic_inc(&vcc->stats->rx_drop); - atomic_inc(&vcc->stats->rx_err); - } - } - else if ( atm_charge(vcc, skb->truesize) ) { - new_skb = alloc_skb_rx(); - if ( new_skb != NULL ) { - skb_reserve(skb, reg_desc.byteoff); - skb_put(skb, reg_desc.datalen); - ATM_SKB(skb)->vcc = vcc; - - dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, 0, conn, 0); - - vcc->push(vcc, skb); - - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wrx_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->rx); - adsl_led_flash(); - - reg_desc.dataptr = (unsigned int)new_skb->data >> 2; - } - else { - atm_return(vcc, skb->truesize); - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wrx_drop_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->rx_drop); - } - } - else { - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wrx_drop_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->rx_drop); - } - } - else { - g_atm_priv_data.wrx_drop_pdu++; - } - - reg_desc.byteoff = 0; - reg_desc.datalen = RX_DMA_CH_AAL_BUF_SIZE; - reg_desc.own = 1; - reg_desc.c = 0; - - g_atm_priv_data.aal_desc[g_atm_priv_data.aal_desc_pos] = reg_desc; - if ( ++g_atm_priv_data.aal_desc_pos == dma_rx_descriptor_length ) - g_atm_priv_data.aal_desc_pos = 0; - - mailbox_signal(RX_DMA_CH_AAL, 0); - } -} - -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET -static void do_ppe_tasklet(unsigned long arg) -{ - *MBOX_IGU1_ISRC = *MBOX_IGU1_ISR; - mailbox_oam_rx_handler(); - mailbox_aal_rx_handler(); - if ( (*MBOX_IGU1_ISR & ((1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM))) != 0 ) - tasklet_schedule(&g_dma_tasklet); - else - enable_irq(PPE_MAILBOX_IGU1_INT); -} -#endif - -static irqreturn_t mailbox_irq_handler(int irq, void *dev_id) -{ - if ( !*MBOX_IGU1_ISR ) - return IRQ_HANDLED; - -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET - disable_irq(PPE_MAILBOX_IGU1_INT); - tasklet_schedule(&g_dma_tasklet); -#else - *MBOX_IGU1_ISRC = *MBOX_IGU1_ISR; - mailbox_oam_rx_handler(); - mailbox_aal_rx_handler(); -#endif - - return IRQ_HANDLED; -} - -static INLINE void mailbox_signal(unsigned int queue, int is_tx) -{ - int count = 1000; - - if ( is_tx ) { - while ( MBOX_IGU3_ISR_ISR(queue + FIRST_QSB_QID + 16) && count) - count--; - *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(queue + FIRST_QSB_QID + 16); - } - else { - while ( MBOX_IGU3_ISR_ISR(queue) && count) - count--; - *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(queue); - } - ASSERT(count != 0, "MBOX_IGU3_ISR = 0x%08x", ltq_r32(MBOX_IGU3_ISR)); -} - -static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue) -{ - struct clk *clk = clk_get(0, "fpi"); - unsigned int qsb_clk = clk_get_rate(clk); - unsigned int qsb_qid = queue + FIRST_QSB_QID; - union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}}; - union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}}; - unsigned int tmp; - -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) { - static char *str_traffic_class[9] = { - "ATM_NONE", - "ATM_UBR", - "ATM_CBR", - "ATM_VBR", - "ATM_ABR", - "ATM_ANYCLASS", - "ATM_VBR_RT", - "ATM_UBR_PLUS", - "ATM_MAX_PCR" - }; - printk(KERN_INFO "QoS Parameters:\n"); - printk(KERN_INFO "\tAAL : %d\n", qos->aal); - printk(KERN_INFO "\tTX Traffic Class: %s\n", str_traffic_class[qos->txtp.traffic_class]); - printk(KERN_INFO "\tTX Max PCR : %d\n", qos->txtp.max_pcr); - printk(KERN_INFO "\tTX Min PCR : %d\n", qos->txtp.min_pcr); - printk(KERN_INFO "\tTX PCR : %d\n", qos->txtp.pcr); - printk(KERN_INFO "\tTX Max CDV : %d\n", qos->txtp.max_cdv); - printk(KERN_INFO "\tTX Max SDU : %d\n", qos->txtp.max_sdu); - printk(KERN_INFO "\tTX SCR : %d\n", qos->txtp.scr); - printk(KERN_INFO "\tTX MBS : %d\n", qos->txtp.mbs); - printk(KERN_INFO "\tTX CDV : %d\n", qos->txtp.cdv); - printk(KERN_INFO "\tRX Traffic Class: %s\n", str_traffic_class[qos->rxtp.traffic_class]); - printk(KERN_INFO "\tRX Max PCR : %d\n", qos->rxtp.max_pcr); - printk(KERN_INFO "\tRX Min PCR : %d\n", qos->rxtp.min_pcr); - printk(KERN_INFO "\tRX PCR : %d\n", qos->rxtp.pcr); - printk(KERN_INFO "\tRX Max CDV : %d\n", qos->rxtp.max_cdv); - printk(KERN_INFO "\tRX Max SDU : %d\n", qos->rxtp.max_sdu); - printk(KERN_INFO "\tRX SCR : %d\n", qos->rxtp.scr); - printk(KERN_INFO "\tRX MBS : %d\n", qos->rxtp.mbs); - printk(KERN_INFO "\tRX CDV : %d\n", qos->rxtp.cdv); - } -#endif // defined(DEBUG_QOS) && DEBUG_QOS - - /* - * Peak Cell Rate (PCR) Limiter - */ - if ( qos->txtp.max_pcr == 0 ) - qsb_queue_parameter_table.bit.tp = 0; /* disable PCR limiter */ - else { - /* peak cell rate would be slightly lower than requested [maximum_rate / pcr = (qsb_clock / 8) * (time_step / 4) / pcr] */ - tmp = ((qsb_clk * qsb_tstep) >> 5) / qos->txtp.max_pcr + 1; - /* check if overflow takes place */ - qsb_queue_parameter_table.bit.tp = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp; - } - - // A funny issue. Create two PVCs, one UBR and one UBR with max_pcr. - // Send packets to these two PVCs at same time, it trigger strange behavior. - // In A1, RAM from 0x80000000 to 0x0x8007FFFF was corrupted with fixed pattern 0x00000000 0x40000000. - // In A4, PPE firmware keep emiting unknown cell and do not respond to driver. - // To work around, create UBR always with max_pcr. - // If user want to create UBR without max_pcr, we give a default one larger than line-rate. - if ( qos->txtp.traffic_class == ATM_UBR && qsb_queue_parameter_table.bit.tp == 0 ) { - int port = g_atm_priv_data.conn[queue].port; - unsigned int max_pcr = g_atm_priv_data.port[port].tx_max_cell_rate + 1000; - - tmp = ((qsb_clk * qsb_tstep) >> 5) / max_pcr + 1; - if ( tmp > QSB_TP_TS_MAX ) - tmp = QSB_TP_TS_MAX; - else if ( tmp < 1 ) - tmp = 1; - qsb_queue_parameter_table.bit.tp = tmp; - } - - /* - * Weighted Fair Queueing Factor (WFQF) - */ - switch ( qos->txtp.traffic_class ) { - case ATM_CBR: - case ATM_VBR_RT: - /* real time queue gets weighted fair queueing bypass */ - qsb_queue_parameter_table.bit.wfqf = 0; - break; - case ATM_VBR_NRT: - case ATM_UBR_PLUS: - /* WFQF calculation here is based on virtual cell rates, to reduce granularity for high rates */ - /* WFQF is maximum cell rate / garenteed cell rate */ - /* wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX / requested_minimum_peak_cell_rate */ - if ( qos->txtp.min_pcr == 0 ) - qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX; - else - { - tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX / qos->txtp.min_pcr; - if ( tmp == 0 ) - qsb_queue_parameter_table.bit.wfqf = 1; - else if ( tmp > QSB_WFQ_NONUBR_MAX ) - qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX; - else - qsb_queue_parameter_table.bit.wfqf = tmp; - } - break; - default: - case ATM_UBR: - qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_UBR_BYPASS; - } - - /* - * Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 - */ - if ( qos->txtp.traffic_class == ATM_VBR_RT || qos->txtp.traffic_class == ATM_VBR_NRT ) { - if ( qos->txtp.scr == 0 ) { - /* disable shaper */ - qsb_queue_vbr_parameter_table.bit.taus = 0; - qsb_queue_vbr_parameter_table.bit.ts = 0; - } - else { - /* Cell Loss Priority (CLP) */ - if ( (vcc->atm_options & ATM_ATMOPT_CLP) ) - /* CLP1 */ - qsb_queue_parameter_table.bit.vbr = 1; - else - /* CLP0 */ - qsb_queue_parameter_table.bit.vbr = 0; - /* Rate Shaper Parameter (TS) and Burst Tolerance Parameter for SCR (tauS) */ - tmp = ((qsb_clk * qsb_tstep) >> 5) / qos->txtp.scr + 1; - qsb_queue_vbr_parameter_table.bit.ts = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp; - tmp = (qos->txtp.mbs - 1) * (qsb_queue_vbr_parameter_table.bit.ts - qsb_queue_parameter_table.bit.tp) / 64; - if ( tmp == 0 ) - qsb_queue_vbr_parameter_table.bit.taus = 1; - else if ( tmp > QSB_TAUS_MAX ) - qsb_queue_vbr_parameter_table.bit.taus = QSB_TAUS_MAX; - else - qsb_queue_vbr_parameter_table.bit.taus = tmp; - } - } - else { - qsb_queue_vbr_parameter_table.bit.taus = 0; - qsb_queue_vbr_parameter_table.bit.ts = 0; - } - - /* Queue Parameter Table (QPT) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_QPT_SET_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(qsb_queue_parameter_table.dword); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_QPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("QPT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - /* Queue VBR Paramter Table (QVPT) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_QVPT_SET_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(qsb_queue_vbr_parameter_table.dword); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_VBR) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("QVPT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) { - printk("set_qsb\n"); - printk(" qsb_clk = %lu\n", (unsigned long)qsb_clk); - printk(" qsb_queue_parameter_table.bit.tp = %d\n", (int)qsb_queue_parameter_table.bit.tp); - printk(" qsb_queue_parameter_table.bit.wfqf = %d (0x%08X)\n", (int)qsb_queue_parameter_table.bit.wfqf, (int)qsb_queue_parameter_table.bit.wfqf); - printk(" qsb_queue_parameter_table.bit.vbr = %d\n", (int)qsb_queue_parameter_table.bit.vbr); - printk(" qsb_queue_parameter_table.dword = 0x%08X\n", (int)qsb_queue_parameter_table.dword); - printk(" qsb_queue_vbr_parameter_table.bit.ts = %d\n", (int)qsb_queue_vbr_parameter_table.bit.ts); - printk(" qsb_queue_vbr_parameter_table.bit.taus = %d\n", (int)qsb_queue_vbr_parameter_table.bit.taus); - printk(" qsb_queue_vbr_parameter_table.dword = 0x%08X\n", (int)qsb_queue_vbr_parameter_table.dword); - } -#endif -} - -static void qsb_global_set(void) -{ - struct clk *clk = clk_get(0, "fpi"); - unsigned int qsb_clk = clk_get_rate(clk); - int i; - unsigned int tmp1, tmp2, tmp3; - - *QSB_ICDV = QSB_ICDV_TAU_SET(qsb_tau); - *QSB_SBL = QSB_SBL_SBL_SET(qsb_srvm); - *QSB_CFG = QSB_CFG_TSTEPC_SET(qsb_tstep >> 1); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) { - printk("qsb_clk = %u\n", qsb_clk); - printk("QSB_ICDV (%08X) = %d (%d), QSB_SBL (%08X) = %d (%d), QSB_CFG (%08X) = %d (%d)\n", (unsigned int)QSB_ICDV, *QSB_ICDV, QSB_ICDV_TAU_SET(qsb_tau), (unsigned int)QSB_SBL, *QSB_SBL, QSB_SBL_SBL_SET(qsb_srvm), (unsigned int)QSB_CFG, *QSB_CFG, QSB_CFG_TSTEPC_SET(qsb_tstep >> 1)); - } -#endif - - /* - * set SCT and SPT per port - */ - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) { - if ( g_atm_priv_data.port[i].tx_max_cell_rate != 0 ) { - tmp1 = ((qsb_clk * qsb_tstep) >> 1) / g_atm_priv_data.port[i].tx_max_cell_rate; - tmp2 = tmp1 >> 6; /* integer value of Tsb */ - tmp3 = (tmp1 & ((1 << 6) - 1)) + 1; /* fractional part of Tsb */ - /* carry over to integer part (?) */ - if ( tmp3 == (1 << 6) ) - { - tmp3 = 0; - tmp2++; - } - if ( tmp2 == 0 ) - tmp2 = tmp3 = 1; - /* 1. set mask */ - /* 2. write value to data transfer register */ - /* 3. start the tranfer */ - /* SCT (FracRate) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_SET_SCT_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(tmp3); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SCT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("SCT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - /* SPT (SBV + PN + IntRage) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_SET_SPT_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(QSB_SPT_SBV_VALID | QSB_SPT_PN_SET(i & 0x01) | QSB_SPT_INTRATE_SET(tmp2)); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("SPT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - } - } -} - -static INLINE void set_htu_entry(unsigned int vpi, unsigned int vci, unsigned int queue, int aal5, int is_retx) -{ - struct htu_entry htu_entry = { res1: 0x00, - clp: is_retx ? 0x01 : 0x00, - pid: g_atm_priv_data.conn[queue].port & 0x01, - vpi: vpi, - vci: vci, - pti: 0x00, - vld: 0x01}; - - struct htu_mask htu_mask = { set: 0x01, -#if !defined(ENABLE_ATM_RETX) || !ENABLE_ATM_RETX - clp: 0x01, - pid_mask: 0x02, -#else - clp: g_retx_htu ? 0x00 : 0x01, - pid_mask: RETX_MODE_CFG->retx_en ? 0x03 : 0x02, -#endif - vpi_mask: 0x00, -#if !defined(ENABLE_ATM_RETX) || !ENABLE_ATM_RETX - vci_mask: 0x0000, -#else - vci_mask: RETX_MODE_CFG->retx_en ? 0xFF00 : 0x0000, -#endif - pti_mask: 0x03, // 0xx, user data - clear: 0x00}; - - struct htu_result htu_result = {res1: 0x00, - cellid: queue, - res2: 0x00, - type: aal5 ? 0x00 : 0x01, - ven: 0x01, - res3: 0x00, - qid: queue}; - - *HTU_RESULT(queue + OAM_HTU_ENTRY_NUMBER) = htu_result; - *HTU_MASK(queue + OAM_HTU_ENTRY_NUMBER) = htu_mask; - *HTU_ENTRY(queue + OAM_HTU_ENTRY_NUMBER) = htu_entry; -} - -static INLINE void clear_htu_entry(unsigned int queue) -{ - HTU_ENTRY(queue + OAM_HTU_ENTRY_NUMBER)->vld = 0; -} - -static void validate_oam_htu_entry(void) -{ - HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 1; - HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 1; - HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 1; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - HTU_ENTRY(OAM_ARQ_HTU_ENTRY)->vld = 1; -#endif -} - -static void invalidate_oam_htu_entry(void) -{ - HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 0; - HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 0; - HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 0; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - HTU_ENTRY(OAM_ARQ_HTU_ENTRY)->vld = 0; -#endif -} - -static INLINE int find_vpi(unsigned int vpi) -{ - int i; - unsigned int bit; - - for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { - if ( (g_atm_priv_data.conn_table & bit) != 0 - && g_atm_priv_data.conn[i].vcc != NULL - && vpi == g_atm_priv_data.conn[i].vcc->vpi ) - return i; - } - - return -1; -} - -static INLINE int find_vpivci(unsigned int vpi, unsigned int vci) -{ - int i; - unsigned int bit; - - for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { - if ( (g_atm_priv_data.conn_table & bit) != 0 - && g_atm_priv_data.conn[i].vcc != NULL - && vpi == g_atm_priv_data.conn[i].vcc->vpi - && vci == g_atm_priv_data.conn[i].vcc->vci ) - return i; - } - - return -1; -} - -static INLINE int find_vcc(struct atm_vcc *vcc) -{ - int i; - unsigned int bit; - - for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { - if ( (g_atm_priv_data.conn_table & bit) != 0 - && g_atm_priv_data.conn[i].vcc == vcc ) - return i; - } - - return -1; -} - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - -static void retx_polling_func(unsigned long arg) -{ - int sys_flag; - volatile struct dsl_param *p_dsl_param; - int new_retx_htu; - int retx_en; - int i, max_htu; - - local_irq_save(sys_flag); - if ( g_retx_playout_buffer == 0 && g_xdata_addr != NULL && (((volatile struct dsl_param *)g_xdata_addr)->RetxEnable || ((volatile struct dsl_param *)g_xdata_addr)->ServiceSpecificReTx) ) { - local_irq_restore(sys_flag); - g_retx_playout_buffer = __get_free_pages(GFP_KERNEL, RETX_PLAYOUT_BUFFER_ORDER); - if ( g_retx_playout_buffer == 0 ) - panic("no memory for g_retx_playout_buffer\n"); - memset((void *)g_retx_playout_buffer, 0, RETX_PLAYOUT_BUFFER_SIZE); - dma_cache_inv(g_retx_playout_buffer, RETX_PLAYOUT_BUFFER_SIZE); - } - else - local_irq_restore(sys_flag); - - - local_irq_save(sys_flag); - if ( g_xdata_addr != NULL ) { - p_dsl_param = (volatile struct dsl_param *)g_xdata_addr; - g_retx_polling_cnt += RETX_POLLING_INTERVAL; - - if ( p_dsl_param->update_flag ) { - do_gettimeofday(&g_retx_polling_start); - - g_dsl_param = *p_dsl_param; - - // we always enable retx (just for test purpose) - //g_dsl_param.RetxEnable = 1; - //RETX_TSYNC_CFG->fw_alpha = 0; - - if ( g_dsl_param.RetxEnable || g_dsl_param.ServiceSpecificReTx ) { - // ReTX enabled - // MIB counter updated for each polling - p_dsl_param->RxDtuCorruptedCNT = *RxDTUCorruptedCNT; - p_dsl_param->RxRetxDtuUnCorrectedCNT = *RxRetxDTUUncorrectedCNT; - p_dsl_param->RxLastEFB = *RxLastEFBCNT; - p_dsl_param->RxDtuCorrectedCNT = *RxDTUCorrectedCNT; - - // for RETX paramters, we check only once for every second - if ( g_retx_polling_cnt < HZ ) - goto _clear_update_flag; - - g_retx_polling_cnt -= HZ; - - if ( g_dsl_param.ServiceSpecificReTx && g_dsl_param.ReTxPVC == 0 ) - new_retx_htu = 1; - else - new_retx_htu = 0; - - // default fw_alpha equals to default hardware alpha - RETX_TSYNC_CFG->fw_alpha = 0; - - RETX_TD_CFG->td_max = g_dsl_param.MaxDelayrt; - RETX_TD_CFG->td_min = g_dsl_param.MinDelayrt; - - *RETX_PLAYOUT_BUFFER_BASE = ((((unsigned int)g_retx_playout_buffer | KSEG1) + 15) & 0xFFFFFFF0) >> 2; - - if ( g_dsl_param.ServiceSpecificReTx ) { - *RETX_SERVICE_HEADER_CFG= g_dsl_param.ReTxPVC << 4; - if ( g_dsl_param.ReTxPVC == 0 ) - *RETX_MASK_HEADER_CFG = 1; - else - *RETX_MASK_HEADER_CFG = 0; - } - else { - *RETX_SERVICE_HEADER_CFG= 0; - *RETX_MASK_HEADER_CFG = 0; - } - - retx_en = 1; - } - else { - // ReTX disabled - - new_retx_htu = 0; - - RETX_TSYNC_CFG->fw_alpha = 7; - - *RETX_SERVICE_HEADER_CFG = 0; - *RETX_MASK_HEADER_CFG = 0; - - retx_en = 0; - } - - - if ( retx_en != RETX_MODE_CFG->retx_en ) { - unsigned int pid_mask, vci_mask; - - if ( retx_en ) { - pid_mask = 0x03; - vci_mask = 0xFF00; - } - else { - pid_mask = 0x02; - vci_mask = 0x0000; - } - - max_htu = *CFG_WRX_HTUTS; - for ( i = OAM_HTU_ENTRY_NUMBER; i < max_htu; i++ ) - if ( HTU_ENTRY(i)->vld ) { - HTU_MASK(i)->pid_mask = pid_mask; - HTU_MASK(i)->vci_mask = vci_mask; - } - } - - if ( new_retx_htu != g_retx_htu ) { - int conn, retx_conn; - - g_retx_htu = new_retx_htu; - - if ( g_retx_htu ) { - max_htu = *CFG_WRX_HTUTS; - for ( i = OAM_HTU_ENTRY_NUMBER; i < max_htu; i++ ) - if ( HTU_ENTRY(i)->vld ) - HTU_MASK(i)->clp = 0; - - for ( conn = 0; conn < MAX_PVC_NUMBER; conn++ ) - if ( g_atm_priv_data.conn[conn].vcc && g_atm_priv_data.conn[conn].vcc->qos.aal == ATM_AAL5 && !HTU_ENTRY(conn + OAM_HTU_ENTRY_NUMBER)->clp ) { - retx_conn = (conn + 8) % 16; // ReTX queue - - if ( retx_conn < MAX_PVC_NUMBER && test_and_set_bit(retx_conn, &g_atm_priv_data.conn_table) == 0 ) { - g_atm_priv_data.conn[retx_conn].vcc = g_atm_priv_data.conn[conn].vcc; - set_htu_entry(g_atm_priv_data.conn[conn].vcc->vpi, g_atm_priv_data.conn[conn].vcc->vci, retx_conn, g_atm_priv_data.conn[conn].vcc->qos.aal == ATM_AAL5 ? 1 : 0, 1); - } - else { - err("Queue number %d for ReTX queue of PVC(%d.%d) is not available!", retx_conn, g_atm_priv_data.conn[conn].vcc->vpi, g_atm_priv_data.conn[conn].vcc->vci); - } - } - } - else - { - for ( retx_conn = 0; retx_conn < MAX_PVC_NUMBER; retx_conn++ ) - if ( g_atm_priv_data.conn[retx_conn].vcc && HTU_ENTRY(retx_conn + OAM_HTU_ENTRY_NUMBER)->clp ) { - clear_htu_entry(retx_conn); - g_atm_priv_data.conn[retx_conn].vcc = NULL; - g_atm_priv_data.conn[retx_conn].aal5_vcc_crc_err = 0; - g_atm_priv_data.conn[retx_conn].aal5_vcc_oversize_sdu = 0; - clear_bit(retx_conn, &g_atm_priv_data.conn_table); - } - - max_htu = *CFG_WRX_HTUTS; - for ( i = OAM_HTU_ENTRY_NUMBER; i < max_htu; i++ ) - if ( HTU_ENTRY(i)->vld ) - HTU_MASK(i)->clp = 1; - } - } - - RETX_MODE_CFG->retx_en = retx_en; - -_clear_update_flag: - p_dsl_param->update_flag = 0; - - do_gettimeofday(&g_retx_polling_end); - } - - g_retx_polling_timer.expires = jiffies + RETX_POLLING_INTERVAL; - add_timer(&g_retx_polling_timer); - } - local_irq_restore(sys_flag); -} - -static int init_atm_tc_retrans_param(void) -{ - int i = 0; - struct DTU_stat_info reset_val; - - RETX_MODE_CFG->invld_range = 128; - RETX_MODE_CFG->buff_size = RETX_PLAYOUT_FW_BUFF_SIZE > 4096/32 ? 4096/32 : RETX_PLAYOUT_FW_BUFF_SIZE ; - RETX_MODE_CFG->retx_en = 1; - - // default fw_alpha equals to default hardware alpha - RETX_TSYNC_CFG->fw_alpha = 7; - RETX_TSYNC_CFG->sync_inp = 0; - - RETX_TD_CFG->td_max = 0; - RETX_TD_CFG->td_min = 0; - - // *RETX_PLAYOUT_BUFFER_BASE = KSEG1ADDR(g_retx_playout_buffer); // need " >> 2 " ? - *RETX_PLAYOUT_BUFFER_BASE = ((((unsigned int)g_retx_playout_buffer | KSEG1) + 15) & 0xFFFFFFF0) >> 2; - - *RETX_SERVICE_HEADER_CFG = 0; - *RETX_MASK_HEADER_CFG = 0; - - // 20us - RETX_MIB_TIMER_CFG->tick_cycle = 4800; - RETX_MIB_TIMER_CFG->ticks_per_sec = 50000; - - *LAST_DTU_SID_IN = 255; - *RFBI_FIRST_CW = 1; - // init DTU_STAT_INFO - - memset(&reset_val, 0, sizeof(reset_val)); - reset_val.dtu_rd_ptr = reset_val.dtu_wr_ptr = 0xffff; - - for(i = 0 ; i < 256; i ++) { - DTU_STAT_INFO[i] = reset_val; - } - return 0; -} - -static void clear_atm_tc_retrans_param(void) -{ - if ( g_retx_playout_buffer ) { - free_pages(g_retx_playout_buffer, RETX_PLAYOUT_BUFFER_ORDER); - g_retx_playout_buffer = 0; - } -} - -#endif - -#if defined(DEBUG_DUMP_SKB) && DEBUG_DUMP_SKB -static void dump_skb(struct sk_buff *skb, unsigned int len, char *title, int port, int ch, int is_tx) -{ - int i; - - if ( !(ifx_atm_dbg_enable & (is_tx ? DBG_ENABLE_MASK_DUMP_SKB_TX : DBG_ENABLE_MASK_DUMP_SKB_RX)) ) - return; - - if ( skb->len < len ) - len = skb->len; - - if ( len > RX_DMA_CH_AAL_BUF_SIZE ) { - printk("too big data length: skb = %08x, skb->data = %08x, skb->len = %d\n", (unsigned int)skb, (unsigned int)skb->data, skb->len); - return; - } - - if ( ch >= 0 ) - printk("%s (port %d, ch %d)\n", title, port, ch); - else - printk("%s\n", title); - printk(" skb->data = %08X, skb->tail = %08X, skb->len = %d\n", (unsigned int)skb->data, (unsigned int)skb->tail, (int)skb->len); - for ( i = 1; i <= len; i++ ) { - if ( i % 16 == 1 ) - printk(" %4d:", i - 1); - printk(" %02X", (int)(*((char*)skb->data + i - 1) & 0xFF)); - if ( i % 16 == 0 ) - printk("\n"); - } - if ( (i - 1) % 16 != 0 ) - printk("\n"); -} -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC -static void skb_swap(struct sk_buff *skb, unsigned int byteoff) -{ - unsigned int mac_offset = ~0; - unsigned int ip_offset = ~0; - unsigned char tmp[8]; - unsigned char *p = NULL; - - skb_pull(skb, byteoff + TX_INBAND_HEADER_LENGTH); - - if ( skb->data[0] == 0xAA && skb->data[1] == 0xAA && skb->data[2] == 0x03 ) { - // LLC - if ( skb->data[3] == 0x00 && skb->data[4] == 0x80 && skb->data[5] == 0xC2 ) { - // EoA - if ( skb->data[22] == 0x08 && skb->data[23] == 0x00 ) { - // IPv4 - mac_offset = 10; - ip_offset = 24; - } - else if ( skb->data[31] == 0x21 ) { - // PPPoE IPv4 - mac_offset = 10; - ip_offset = 32; - } - } - else { - // IPoA - if ( skb->data[6] == 0x08 && skb->data[7] == 0x00 ) { - // IPv4 - ip_offset = 8; - } - } - } - else if ( skb->data[0] == 0xFE && skb->data[1] == 0xFE && skb->data[2] == 0x03 ) { - // LLC PPPoA - if ( skb->data[4] == 0x00 && skb->data[5] == 0x21 ) { - // IPv4 - ip_offset = 6; - } - } - else { - // VC-mux - if ( skb->data[0] == 0x00 && skb->data[1] == 0x21 ) { - // PPPoA IPv4 - ip_offset = 2; - } - else if ( skb->data[0] == 0x00 && skb->data[1] == 0x00 ) { - // EoA - if ( skb->data[14] == 0x08 && skb->data[15] ==0x00 ) { - // IPv4 - mac_offset = 2; - ip_offset = 16; - } - else if ( skb->data[23] == 0x21 ) { - // PPPoE IPv4 - mac_offset = 2; - ip_offset = 26; - } - } - else { - // IPoA - ip_offset = 0; - } - } - - if ( mac_offset != ~0 && !(skb->data[mac_offset] & 0x01) ) { - p = skb->data + mac_offset; - // swap MAC - memcpy(tmp, p, 6); - memcpy(p, p + 6, 6); - memcpy(p + 6, tmp, 6); - p += 12; - } - - if ( ip_offset != ~0 ) { - p = skb->data + ip_offset + 12; - // swap IP - memcpy(tmp, p, 4); - memcpy(p, p + 4, 4); - memcpy(p + 4, tmp, 4); - p += 8; - } - - if ( p != NULL ) { - dma_cache_wback((unsigned long)skb->data, (unsigned long)p - (unsigned long)skb->data); - } - - skb_push(skb, byteoff + TX_INBAND_HEADER_LENGTH); -} -#endif - -static INLINE void proc_file_create(void) -{ - struct proc_dir_entry *res; - - g_atm_dir = proc_mkdir("driver/ifx_atm", NULL); - - create_proc_read_entry("version", - 0, - g_atm_dir, - proc_read_version, - NULL); - - res = create_proc_entry("mib", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_mib; - res->write_proc = proc_write_mib; - } - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - res = create_proc_entry("retx_mib", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_retx_mib; - res->write_proc = proc_write_retx_mib; - } -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - res = create_proc_entry("dbg", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_dbg; - res->write_proc = proc_write_dbg; - } - - res = create_proc_entry("mem", - 0, - g_atm_dir); - if ( res != NULL ) - res->write_proc = proc_write_mem; - - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) || defined(CONFIG_DANUBE) || defined(CONFIG_AMAZON_SE) - res = create_proc_entry("pp32", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_pp32; - res->write_proc = proc_write_pp32; - } - #endif -#endif - -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - create_proc_read_entry("htu", - 0, - g_atm_dir, - proc_read_htu, - NULL); - - create_proc_read_entry("txq", - 0, - g_atm_dir, - proc_read_txq, - NULL); - - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - create_proc_read_entry("retx_fw", - 0, - g_atm_dir, - proc_read_retx_fw, - NULL); - - res = create_proc_entry("retx_stats", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_retx_stats; - res->write_proc = proc_write_retx_stats; - } - - res = create_proc_entry("retx_cfg", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_retx_cfg; - res->write_proc = proc_write_retx_cfg; - } - - create_proc_read_entry("retx_dsl_param", - 0, - g_atm_dir, - proc_read_retx_dsl_param, - NULL); - #endif -#endif -} - -static INLINE void proc_file_delete(void) -{ -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - remove_proc_entry("retx_dsl_param", g_atm_dir); - - remove_proc_entry("retx_cfg", g_atm_dir); - - remove_proc_entry("retx_stats", g_atm_dir); - - remove_proc_entry("retx_fw", g_atm_dir); - #endif - - remove_proc_entry("txq", g_atm_dir); - - remove_proc_entry("htu", g_atm_dir); -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) || defined(CONFIG_DANUBE) || defined(CONFIG_AMAZON_SE) - remove_proc_entry("pp32", g_atm_dir); - #endif - - remove_proc_entry("mem", g_atm_dir); - - remove_proc_entry("dbg", g_atm_dir); -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - remove_proc_entry("retx_mib", g_atm_dir); -#endif - - remove_proc_entry("mib", g_atm_dir); - - remove_proc_entry("version", g_atm_dir); - - remove_proc_entry("driver/ifx_atm", NULL); -} - -static int proc_read_version(char *buf, char **start, off_t offset, int count, int *eof, void *data) -{ - int len = 0; - - len += ifx_atm_version(buf + len); - - if ( offset >= len ) { - *start = buf; - *eof = 1; - return 0; - } - *start = buf + offset; - if ( (len -= offset) > count ) - return count; - *eof = 1; - return len; -} - -static int proc_read_mib(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "Firmware\n"); - len += sprintf(page + off + len, " wrx_drophtu_cell = %u\n", WAN_MIB_TABLE->wrx_drophtu_cell); - len += sprintf(page + off + len, " wrx_dropdes_pdu = %u\n", WAN_MIB_TABLE->wrx_dropdes_pdu); - len += sprintf(page + off + len, " wrx_correct_pdu = %u\n", WAN_MIB_TABLE->wrx_correct_pdu); - len += sprintf(page + off + len, " wrx_err_pdu = %u\n", WAN_MIB_TABLE->wrx_err_pdu); - len += sprintf(page + off + len, " wrx_dropdes_cell = %u\n", WAN_MIB_TABLE->wrx_dropdes_cell); - len += sprintf(page + off + len, " wrx_correct_cell = %u\n", WAN_MIB_TABLE->wrx_correct_cell); - len += sprintf(page + off + len, " wrx_err_cell = %u\n", WAN_MIB_TABLE->wrx_err_cell); - len += sprintf(page + off + len, " wrx_total_byte = %u\n", WAN_MIB_TABLE->wrx_total_byte); - len += sprintf(page + off + len, " wtx_total_pdu = %u\n", WAN_MIB_TABLE->wtx_total_pdu); - len += sprintf(page + off + len, " wtx_total_cell = %u\n", WAN_MIB_TABLE->wtx_total_cell); - len += sprintf(page + off + len, " wtx_total_byte = %u\n", WAN_MIB_TABLE->wtx_total_byte); - len += sprintf(page + off + len, "Driver\n"); - len += sprintf(page + off + len, " wrx_pdu = %u\n", g_atm_priv_data.wrx_pdu); - len += sprintf(page + off + len, " wrx_drop_pdu = %u\n", g_atm_priv_data.wrx_drop_pdu); - len += sprintf(page + off + len, " wtx_pdu = %u\n", g_atm_priv_data.wtx_pdu); - len += sprintf(page + off + len, " wtx_err_pdu = %u\n", g_atm_priv_data.wtx_err_pdu); - len += sprintf(page + off + len, " wtx_drop_pdu = %u\n", g_atm_priv_data.wtx_drop_pdu); - - *eof = 1; - - return len; -} - -static int proc_write_mib(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[1024]; - char *p; - int len, rlen; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(p, "clear") == 0 || stricmp(p, "clear all") == 0 - || stricmp(p, "clean") == 0 || stricmp(p, "clean all") == 0 ) { - memset(WAN_MIB_TABLE, 0, sizeof(*WAN_MIB_TABLE)); - g_atm_priv_data.wrx_pdu = 0; - g_atm_priv_data.wrx_drop_pdu = 0; - g_atm_priv_data.wtx_pdu = 0; - g_atm_priv_data.wtx_err_pdu = 0; - g_atm_priv_data.wtx_drop_pdu = 0; - } - - return count; -} - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - -static int proc_read_retx_mib(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - printk("Retx FW DTU MIB :\n"); - printk(" rx_total_dtu = %u\n", *URETX_RX_TOTAL_DTU); - printk(" rx_bad_dtu = %u\n", *URETX_RX_BAD_DTU); - printk(" rx_good_dtu = %u\n", *URETX_RX_GOOD_DTU); - printk(" rx_corrected_dtu = %u\n", *URETX_RX_CORRECTED_DTU); - printk(" rx_outofdate_dtu = %u\n", *URETX_RX_OUTOFDATE_DTU); - printk(" rx_duplicate_dtu = %u\n", *URETX_RX_DUPLICATE_DTU); - printk(" rx_timeout_dtu = %u\n", *URETX_RX_TIMEOUT_DTU); - printk(" RxDTURetransmittedCNT = %u\n", *RxDTURetransmittedCNT); - printk("\n"); - - printk("Retx Standard DTU MIB:\n"); - printk(" RxLastEFB = %u\n", *RxLastEFBCNT); - printk(" RxDTUCorrectedCNT = %u\n", *RxDTUCorrectedCNT); - printk(" RxDTUCorruptedCNT = %u\n", *RxDTUCorruptedCNT); - printk(" RxRetxDTUUncorrectedCNT = %u\n", *RxRetxDTUUncorrectedCNT); - printk("\n"); - - printk("Retx FW Cell MIB :\n"); - printk(" bc0_total_cell = %u\n", *WRX_BC0_CELL_NUM); - printk(" bc0_drop_cell = %u\n", *WRX_BC0_DROP_CELL_NUM); - printk(" bc0_nonretx_cell = %u\n", *WRX_BC0_NONRETX_CELL_NUM); - printk(" bc0_retx_cell = %u\n", *WRX_BC0_RETX_CELL_NUM); - printk(" bc0_outofdate_cell = %u\n", *WRX_BC0_OUTOFDATE_CELL_NUM); - printk(" bc0_directup_cell = %u\n", *WRX_BC0_DIRECTUP_NUM); - printk(" bc0_to_pb_total_cell = %u\n", *WRX_BC0_PBW_TOTAL_NUM); - printk(" bc0_to_pb_succ_cell = %u\n", *WRX_BC0_PBW_SUCC_NUM); - printk(" bc0_to_pb_fail_cell = %u\n", *WRX_BC0_PBW_FAIL_NUM); - printk(" bc1_total_cell = %u\n", *WRX_BC1_CELL_NUM); - - printk("\n"); - - printk("ATM Rx AAL5/OAM MIB:\n"); - printk(" wrx_drophtu_cell = %u\n", WAN_MIB_TABLE->wrx_drophtu_cell); - printk(" wrx_dropdes_pdu = %u\n", WAN_MIB_TABLE->wrx_dropdes_pdu); - - printk(" wrx_correct_pdu = %-10u ", WAN_MIB_TABLE->wrx_correct_pdu); - if ( WAN_MIB_TABLE->wrx_correct_pdu == 0 ) - printk("\n"); - else { - int i = 0; - - printk("[ "); - for ( i = 0; i < 16; ++i ) { - if ( WRX_PER_PVC_CORRECT_PDU_BASE[i] ) - printk("q%-2d = %-10u , ", i, WRX_PER_PVC_CORRECT_PDU_BASE[i]); - } - printk("]\n"); - } - - printk(" wrx_err_pdu = %-10u ", WAN_MIB_TABLE->wrx_err_pdu); - if ( WAN_MIB_TABLE->wrx_err_pdu == 0 ) - printk("\n"); - else { - int i = 0; - - printk("[ "); - for ( i = 0; i < 16; ++i ) { - if ( WRX_PER_PVC_ERROR_PDU_BASE[i] ) - printk("q%-2d = %-10u , ", i, WRX_PER_PVC_ERROR_PDU_BASE[i] ); - } - printk("]\n"); - } - - printk(" wrx_dropdes_cell = %u\n", WAN_MIB_TABLE->wrx_dropdes_cell); - printk(" wrx_correct_cell = %u\n", WAN_MIB_TABLE->wrx_correct_cell); - printk(" wrx_err_cell = %u\n", WAN_MIB_TABLE->wrx_err_cell); - printk(" wrx_total_byte = %u\n", WAN_MIB_TABLE->wrx_total_byte); - printk("\n"); - - printk("ATM Tx MIB:\n"); - printk(" wtx_total_pdu = %u\n", WAN_MIB_TABLE->wtx_total_pdu); - printk(" wtx_total_cell = %u\n", WAN_MIB_TABLE->wtx_total_cell); - printk(" wtx_total_byte = %u\n", WAN_MIB_TABLE->wtx_total_byte); - printk("\n"); - - printk("Debugging Info:\n"); - printk(" Firmware version = %d.%d.%d.%d.%d.%d\n", - (int)FW_VER_ID->family, (int)FW_VER_ID->fwtype, (int)FW_VER_ID->interface, - (int)FW_VER_ID->fwmode, (int)FW_VER_ID->major, (int)FW_VER_ID->minor); - - printk(" retx_alpha_switch_to_hunt_times = %u\n", *URETX_ALPHA_SWITCH_TO_HUNT_TIMES); - - printk("\n"); - - *eof = 1; - - return len; -} - -static int proc_write_retx_mib(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[2048]; - char *p; - int len, rlen; - int i; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(p, "clean") == 0 || stricmp(p, "clear") == 0 || stricmp(p, "clear_all") == 0) { - *URETX_RX_TOTAL_DTU = 0; - *URETX_RX_BAD_DTU = 0; - *URETX_RX_GOOD_DTU = 0; - *URETX_RX_CORRECTED_DTU = 0; - *URETX_RX_OUTOFDATE_DTU = 0; - *URETX_RX_DUPLICATE_DTU = 0; - *URETX_RX_TIMEOUT_DTU = 0; - *RxDTURetransmittedCNT = 0; - - *WRX_BC0_CELL_NUM = 0; - *WRX_BC0_DROP_CELL_NUM = 0; - *WRX_BC0_NONRETX_CELL_NUM = 0; - *WRX_BC0_RETX_CELL_NUM = 0; - *WRX_BC0_OUTOFDATE_CELL_NUM = 0; - *WRX_BC0_DIRECTUP_NUM = 0; - *WRX_BC0_PBW_TOTAL_NUM = 0; - *WRX_BC0_PBW_SUCC_NUM = 0; - *WRX_BC0_PBW_FAIL_NUM = 0; - *WRX_BC1_CELL_NUM = 0; - - for ( i = 0; i < 16; ++i ) { - WRX_PER_PVC_CORRECT_PDU_BASE[i] = 0; - WRX_PER_PVC_ERROR_PDU_BASE[i] = 0; - } - - WAN_MIB_TABLE->wrx_drophtu_cell = 0; - WAN_MIB_TABLE->wrx_dropdes_pdu = 0; - WAN_MIB_TABLE->wrx_correct_pdu = 0; - WAN_MIB_TABLE->wrx_err_pdu = 0; - WAN_MIB_TABLE->wrx_dropdes_cell = 0; - WAN_MIB_TABLE->wrx_correct_cell = 0; - WAN_MIB_TABLE->wrx_err_cell = 0; - WAN_MIB_TABLE->wrx_total_byte = 0; - - WAN_MIB_TABLE->wtx_total_pdu = 0; - WAN_MIB_TABLE->wtx_total_cell = 0; - WAN_MIB_TABLE->wtx_total_byte = 0; - - *URETX_ALPHA_SWITCH_TO_HUNT_TIMES = 0; - - if (stricmp(p, "clear_all") == 0) { - *RxLastEFBCNT = 0; - *RxDTUCorrectedCNT = 0; - *RxDTUCorruptedCNT = 0; - *RxRetxDTUUncorrectedCNT = 0; - } - } - - return count; -} - -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - -static int proc_read_dbg(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "error print - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ERR) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "debug print - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DEBUG_PRINT) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "assert - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "dump rx skb - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_SKB_RX) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "dump tx skb - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_SKB_TX) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "qos - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "dump init - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_INIT) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "mac swap - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_MAC_SWAP) ? "enabled" : "disabled"); - - *eof = 1; - - return len; -} - -static int proc_write_dbg(struct file *file, const char *buf, unsigned long count, void *data) -{ - static const char *dbg_enable_mask_str[] = { - " error print", - " err", - " debug print", - " dbg", - " assert", - " assert", - " dump rx skb", - " rx", - " dump tx skb", - " tx", - " dump qos", - " qos", - " dump init", - " init", - " mac swap", - " swap", - " all" - }; - static const int dbg_enable_mask_str_len[] = { - 12, 4, - 12, 4, - 7, 7, - 12, 3, - 12, 3, - 9, 4, - 10, 5, - 9, 5, - 4 - }; - unsigned int dbg_enable_mask[] = { - DBG_ENABLE_MASK_ERR, - DBG_ENABLE_MASK_DEBUG_PRINT, - DBG_ENABLE_MASK_ASSERT, - DBG_ENABLE_MASK_DUMP_SKB_RX, - DBG_ENABLE_MASK_DUMP_SKB_TX, - DBG_ENABLE_MASK_DUMP_QOS, - DBG_ENABLE_MASK_DUMP_INIT, - DBG_ENABLE_MASK_MAC_SWAP, - DBG_ENABLE_MASK_ALL - }; - - char *str; - int str_buff_len = 1024; - char *p; - - int len, rlen; - - int f_enable = 0; - int i; - - str = vmalloc(str_buff_len); - if(!str){ - return 0; - } - - len = count < str_buff_len ? count : str_buff_len - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ){ - vfree(str); - return 0; - } - - if ( strincmp(p, "enable", 6) == 0 ) { - p += 6; - f_enable = 1; - } - else if ( strincmp(p, "disable", 7) == 0 ) { - p += 7; - f_enable = -1; - } - else if ( strincmp(p, "help", 4) == 0 || *p == '?' ) { - printk("echo <enable/disable> [err/dbg/assert/rx/tx/init/all] > /proc/eth/dbg\n"); - } - - if ( f_enable ) { - if ( *p == 0 ) { - if ( f_enable > 0 ) - ifx_atm_dbg_enable |= DBG_ENABLE_MASK_ALL & ~DBG_ENABLE_MASK_MAC_SWAP; - else - ifx_atm_dbg_enable &= ~DBG_ENABLE_MASK_ALL | DBG_ENABLE_MASK_MAC_SWAP; - } - else { - do { - for ( i = 0; i < NUM_ENTITY(dbg_enable_mask_str); i++ ) - if ( strincmp(p, dbg_enable_mask_str[i], dbg_enable_mask_str_len[i]) == 0 ) { - if ( f_enable > 0 ) - ifx_atm_dbg_enable |= dbg_enable_mask[i >> 1]; - else - ifx_atm_dbg_enable &= ~dbg_enable_mask[i >> 1]; - p += dbg_enable_mask_str_len[i]; - break; - } - } while ( i < NUM_ENTITY(dbg_enable_mask_str) ); - } - } - - vfree(str); - return count; -} - -static inline unsigned long sb_addr_to_fpi_addr_convert(unsigned long sb_addr) -{ - #define PP32_SB_ADDR_END 0xFFFF - - if ( sb_addr < PP32_SB_ADDR_END ) - return (unsigned long)SB_BUFFER(sb_addr); - else - return sb_addr; -} - -static int proc_write_mem(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *p1, *p2; - int len; - int colon; - unsigned long *p; - int i, n, l; - int local_buf_size = 1024; - char *local_buf = NULL; - - local_buf = vmalloc(local_buf_size); - if ( !local_buf ){ - return 0; - } - - len = local_buf_size < count ? local_buf_size - 1 : count; - len = len - copy_from_user(local_buf, buf, len); - local_buf[len] = 0; - - p1 = local_buf; - colon = 1; - while ( get_token(&p1, &p2, &len, &colon) ) { - if ( stricmp(p1, "w") == 0 || stricmp(p1, "write") == 0 || stricmp(p1, "r") == 0 || stricmp(p1, "read") == 0 ) - break; - - p1 = p2; - colon = 1; - } - - if ( *p1 == 'w' ) { - ignore_space(&p2, &len); - p = (unsigned long *)get_number(&p2, &len, 1); - p = (unsigned long *)sb_addr_to_fpi_addr_convert((unsigned long)p); - - if ( (unsigned int)p >= KSEG0 ) - while ( 1 ) { - ignore_space(&p2, &len); - if ( !len || !((*p2 >= '0' && *p2 <= '9') || (*p2 >= 'a' && *p2 <= 'f') || (*p2 >= 'A' && *p2 <= 'F')) ) - break; - - *p++ = (unsigned int)get_number(&p2, &len, 1); - } - } - else if ( *p1 == 'r' ) { - ignore_space(&p2, &len); - p = (unsigned long *)get_number(&p2, &len, 1); - p = (unsigned long *)sb_addr_to_fpi_addr_convert((unsigned long)p); - - if ( (unsigned int)p >= KSEG0 ) { - ignore_space(&p2, &len); - n = (int)get_number(&p2, &len, 0); - if ( n ) { - char str[32] = {0}; - char *pch = str; - int k; - unsigned int data; - char c; - - n += (l = ((int)p >> 2) & 0x03); - p = (unsigned long *)((unsigned int)p & ~0x0F); - for ( i = 0; i < n; i++ ) { - if ( (i & 0x03) == 0 ) { - printk("%08X:", (unsigned int)p); - pch = str; - } - if ( i < l ) { - printk(" "); - sprintf(pch, " "); - } - else { - data = (unsigned int)*p; - printk(" %08X", data); - for ( k = 0; k < 4; k++ ) { - c = ((char*)&data)[k]; - pch[k] = c < ' ' ? '.' : c; - } - } - p++; - pch += 4; - if ( (i & 0x03) == 0x03 ) { - pch[0] = 0; - printk(" ; %s\n", str); - } - } - if ( (n & 0x03) != 0x00 ) { - for ( k = 4 - (n & 0x03); k > 0; k-- ) - printk(" "); - pch[0] = 0; - printk(" ; %s\n", str); - } - } - } - } - - vfree(local_buf); - return count; -} - - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) - -static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - static const char *stron = " on"; - static const char *stroff = "off"; - - int len = 0; - int cur_context; - int f_stopped; - char str[256]; - char strlength; - int i, j; - - int pp32; - - for ( pp32 = 0; pp32 < NUM_OF_PP32; pp32++ ) { - f_stopped = 0; - - len += sprintf(page + off + len, "===== pp32 core %d =====\n", pp32); - - #ifdef CONFIG_VR9 - if ( (*PP32_FREEZE & (1 << (pp32 << 4))) != 0 ) { - sprintf(str, "freezed"); - f_stopped = 1; - } - #else - if ( 0 ) { - } - #endif - else if ( PP32_CPU_USER_STOPPED(pp32) || PP32_CPU_USER_BREAKIN_RCV(pp32) || PP32_CPU_USER_BREAKPOINT_MET(pp32) ) { - strlength = 0; - if ( PP32_CPU_USER_STOPPED(pp32) ) - strlength += sprintf(str + strlength, "stopped"); - if ( PP32_CPU_USER_BREAKPOINT_MET(pp32) ) - strlength += sprintf(str + strlength, strlength ? " | breakpoint" : "breakpoint"); - if ( PP32_CPU_USER_BREAKIN_RCV(pp32) ) - strlength += sprintf(str + strlength, strlength ? " | breakin" : "breakin"); - f_stopped = 1; - } - #if 0 - else if ( PP32_CPU_CUR_PC(pp32) == PP32_CPU_CUR_PC(pp32) ) { - sprintf(str, "hang"); - f_stopped = 1; - } - #endif - else - sprintf(str, "running"); - cur_context = PP32_BRK_CUR_CONTEXT(pp32); - len += sprintf(page + off + len, "Context: %d, PC: 0x%04x, %s\n", cur_context, PP32_CPU_CUR_PC(pp32), str); - - if ( PP32_CPU_USER_BREAKPOINT_MET(pp32) ) { - strlength = 0; - if ( PP32_BRK_PC_MET(pp32, 0) ) - strlength += sprintf(str + strlength, "pc0"); - if ( PP32_BRK_PC_MET(pp32, 1) ) - strlength += sprintf(str + strlength, strlength ? " | pc1" : "pc1"); - if ( PP32_BRK_DATA_ADDR_MET(pp32, 0) ) - strlength += sprintf(str + strlength, strlength ? " | daddr0" : "daddr0"); - if ( PP32_BRK_DATA_ADDR_MET(pp32, 1) ) - strlength += sprintf(str + strlength, strlength ? " | daddr1" : "daddr1"); - if ( PP32_BRK_DATA_VALUE_RD_MET(pp32, 0) ) { - strlength += sprintf(str + strlength, strlength ? " | rdval0" : "rdval0"); - if ( PP32_BRK_DATA_VALUE_RD_LO_EQ(pp32, 0) ) { - if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " >="); - } - if ( PP32_BRK_DATA_VALUE_RD_MET(pp32, 1) ) { - strlength += sprintf(str + strlength, strlength ? " | rdval1" : "rdval1"); - if ( PP32_BRK_DATA_VALUE_RD_LO_EQ(pp32, 1) ) { - if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " >="); - } - if ( PP32_BRK_DATA_VALUE_WR_MET(pp32, 0) ) { - strlength += sprintf(str + strlength, strlength ? " | wtval0" : "wtval0"); - if ( PP32_BRK_DATA_VALUE_WR_LO_EQ(pp32, 0) ) { - if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " >="); - } - if ( PP32_BRK_DATA_VALUE_WR_MET(pp32, 1) ) { - strlength += sprintf(str + strlength, strlength ? " | wtval1" : "wtval1"); - if ( PP32_BRK_DATA_VALUE_WR_LO_EQ(pp32, 1) ) { - if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " >="); - } - len += sprintf(page + off + len, "break reason: %s\n", str); - } - - if ( f_stopped ) - { - len += sprintf(page + off + len, "General Purpose Register (Context %d):\n", cur_context); - for ( i = 0; i < 4; i++ ) { - for ( j = 0; j < 4; j++ ) - len += sprintf(page + off + len, " %2d: %08x", i + j * 4, *PP32_GP_CONTEXTi_REGn(pp32, cur_context, i + j * 4)); - len += sprintf(page + off + len, "\n"); - } - } - - len += sprintf(page + off + len, "break out on: break in - %s, stop - %s\n", - PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(pp32) ? stron : stroff, - PP32_CTRL_OPT_BREAKOUT_ON_STOP(pp32) ? stron : stroff); - len += sprintf(page + off + len, " stop on: break in - %s, break point - %s\n", - PP32_CTRL_OPT_STOP_ON_BREAKIN(pp32) ? stron : stroff, - PP32_CTRL_OPT_STOP_ON_BREAKPOINT(pp32) ? stron : stroff); - len += sprintf(page + off + len, "breakpoint:\n"); - len += sprintf(page + off + len, " pc0: 0x%08x, %s\n", *PP32_BRK_PC(pp32, 0), PP32_BRK_GRPi_PCn(pp32, 0, 0) ? "group 0" : "off"); - len += sprintf(page + off + len, " pc1: 0x%08x, %s\n", *PP32_BRK_PC(pp32, 1), PP32_BRK_GRPi_PCn(pp32, 1, 1) ? "group 1" : "off"); - len += sprintf(page + off + len, " daddr0: 0x%08x, %s\n", *PP32_BRK_DATA_ADDR(pp32, 0), PP32_BRK_GRPi_DATA_ADDRn(pp32, 0, 0) ? "group 0" : "off"); - len += sprintf(page + off + len, " daddr1: 0x%08x, %s\n", *PP32_BRK_DATA_ADDR(pp32, 1), PP32_BRK_GRPi_DATA_ADDRn(pp32, 1, 1) ? "group 1" : "off"); - len += sprintf(page + off + len, " rdval0: 0x%08x\n", *PP32_BRK_DATA_VALUE_RD(pp32, 0)); - len += sprintf(page + off + len, " rdval1: 0x%08x\n", *PP32_BRK_DATA_VALUE_RD(pp32, 1)); - len += sprintf(page + off + len, " wrval0: 0x%08x\n", *PP32_BRK_DATA_VALUE_WR(pp32, 0)); - len += sprintf(page + off + len, " wrval1: 0x%08x\n", *PP32_BRK_DATA_VALUE_WR(pp32, 1)); - } - - *eof = 1; - - return len; -} - -static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *str = NULL; - char *p; - unsigned int addr; - int str_buff_len = 1024; - - int len, rlen; - - int pp32 = 0; - - str = vmalloc(str_buff_len); - if (!str) { - return 0; - } - - len = count < str_buff_len ? count : str_buff_len - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ){ - vfree(str); - return 0; - } - - if ( strincmp(p, "pp32 ", 5) == 0 ) { - p += 5; - rlen -= 5; - - while ( rlen > 0 && *p >= '0' && *p <= '9' ) { - pp32 += *p - '0'; - p++; - rlen--; - } - while ( rlen > 0 && *p && *p <= ' ' ) { - p++; - rlen--; - } - - if ( pp32 >= NUM_OF_PP32 ) { - err("incorrect pp32 index - %d", pp32); - vfree(str); - return count; - } - } - - if ( stricmp(p, "start") == 0 ) - *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_RESTART; - else if ( stricmp(p, "stop") == 0 ) - *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_STOP; - else if ( stricmp(p, "step") == 0 ) - *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_STEP; - #ifdef CONFIG_VR9 - else if ( stricmp(p, "restart") == 0 ) - *PP32_FREEZE &= ~(1 << (pp32 << 4)); - else if ( stricmp(p, "freeze") == 0 ) - *PP32_FREEZE |= 1 << (pp32 << 4); - #endif - else if ( strincmp(p, "pc0 ", 4) == 0 ) { - p += 4; - rlen -= 4; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_OFF(0, 0); - *PP32_BRK_PC_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_PC(pp32, 0) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_PC(pp32, 0) = addr; - *PP32_BRK_PC_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_ON(0, 0); - } - } - else if ( strincmp(p, "pc1 ", 4) == 0 ) { - p += 4; - rlen -= 4; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_OFF(1, 1); - *PP32_BRK_PC_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_PC(pp32, 1) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_PC(pp32, 1) = addr; - *PP32_BRK_PC_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_ON(1, 1); - } - } - else if ( strincmp(p, "daddr0 ", 7) == 0 ) { - p += 7; - rlen -= 7; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_OFF(0, 0); - *PP32_BRK_DATA_ADDR_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_DATA_ADDR(pp32, 0) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_DATA_ADDR(pp32, 0) = addr; - *PP32_BRK_DATA_ADDR_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_ON(0, 0); - } - } - else if ( strincmp(p, "daddr1 ", 7) == 0 ) { - p += 7; - rlen -= 7; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_OFF(1, 1); - *PP32_BRK_DATA_ADDR_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_DATA_ADDR(pp32, 1) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_DATA_ADDR(pp32, 1) = addr; - *PP32_BRK_DATA_ADDR_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_ON(1, 1); - } - } - else { - - printk("echo \"<command>\" > /proc/driver/ifx_ptm/pp32\n"); - printk(" command:\n"); - printk(" start - run pp32\n"); - printk(" stop - stop pp32\n"); - printk(" step - run pp32 with one step only\n"); - printk(" pc0 - pc0 <addr>/off, set break point PC0\n"); - printk(" pc1 - pc1 <addr>/off, set break point PC1\n"); - printk(" daddr0 - daddr0 <addr>/off, set break point data address 0\n"); - printk(" daddr0 - daddr1 <addr>/off, set break point data address 1\n"); - printk(" help - print this screen\n"); - } - - if ( *PP32_BRK_TRIG(pp32) ) - *PP32_CTRL_OPT(pp32) = PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON; - else - *PP32_CTRL_OPT(pp32) = PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF; - vfree(str); - return count; -} - -#elif defined(CONFIG_DANUBE) - -static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - static const char *halt_stat[] = { - "reset", - "break in line", - "stop", - "step", - "code", - "data0", - "data1" - }; - static const char *brk_src_data[] = { - "off", - "read", - "write", - "read/write", - "write_equal", - "N/A", - "N/A", - "N/A" - }; - static const char *brk_src_code[] = { - "off", - "on" - }; - - int len = 0; - int i; - int k; - unsigned long bit; - int tsk; - - tsk = *PP32_DBG_TASK_NO & 0x03; - len += sprintf(page + off + len, "Task No %d, PC %04x\n", tsk, *PP32_DBG_CUR_PC & 0xFFFF); - - if ( !(*PP32_HALT_STAT & 0x01) ) - len += sprintf(page + off + len, " Halt State: Running\n"); - else { - len += sprintf(page + off + len, " Halt State: Stopped"); - k = 0; - for ( bit = 2, i = 0; bit <= (1 << 7); bit <<= 1, i++ ) - if ( (*PP32_HALT_STAT & bit) ) { - if ( !k ) { - len += sprintf(page + off + len, ", "); - k++; - } - else - len += sprintf(page + off + len, " | "); - len += sprintf(page + off + len, halt_stat[i]); - } - - len += sprintf(page + off + len, "\n"); - - len += sprintf(page + off + len, " Regs (Task %d):\n", tsk); - for ( i = 0; i < 8; i++ ) - len += sprintf(page + off + len, " %2d. %08x %2d. %08x\n", i, *PP32_DBG_REG_BASE(tsk, i), i + 8, *PP32_DBG_REG_BASE(tsk, i + 8)); - } - - len += sprintf(page + off + len, " Break Src: data1 - %s, data0 - %s, pc3 - %s, pc2 - %s, pc1 - %s, pc0 - %s\n", - brk_src_data[(*PP32_BRK_SRC >> 11) & 0x07], - brk_src_data[(*PP32_BRK_SRC >> 8) & 0x07], - brk_src_code[(*PP32_BRK_SRC >> 3) & 0x01], - brk_src_code[(*PP32_BRK_SRC >> 2) & 0x01], - brk_src_code[(*PP32_BRK_SRC >> 1) & 0x01], - brk_src_code[*PP32_BRK_SRC & 0x01]); - - for ( i = 0; i < 4; i++ ) - len += sprintf(page + off + len, " pc%d: %04x - %04x\n", i, *PP32_DBG_PC_MIN(i), *PP32_DBG_PC_MAX(i)); - - for ( i = 0; i < 2; i++ ) - len += sprintf(page + off + len, " data%d: %04x - %04x (%08x)\n", i, *PP32_DBG_DATA_MIN(i), *PP32_DBG_DATA_MAX(i), *PP32_DBG_DATA_VAL(i)); - - *eof = 1; - - return len; -} - -static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *str; - char *p; - - int len, rlen; - int str_buff_len = 2048; - str = vmalloc(str_buff_len); - if (!str){ - return 0; - } - len = count < str_buff_len ? count : str_buff_len - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - vfree(str); - return 0; - - if ( stricmp(p, "start") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_START_SET(1); - else if ( stricmp(p, "stop") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_STOP_SET(1); - else if ( stricmp(p, "step") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_STEP_SET(1); - else if ( strincmp(p, "pc", 2) == 0 && p[2] >= '0' && p[2] <= '3' && p[3] <= ' ' ) { - int n = p[2] - '0'; - int on_off_flag = -1; - int addr_min, addr_max; - - p += 4; - rlen -= 4; - ignore_space(&p, &rlen); - - if ( strincmp(p, "off", 3) == 0 && p[3] <= ' ' ) { - p += 3; - rlen -= 3; - on_off_flag = 0; - } - else if ( strincmp(p, "on", 2) == 0 && p[2] <= ' ' ) { - p += 2; - rlen -= 2; - on_off_flag = 1; - } - ignore_space(&p, &rlen); - - if ( rlen ) { - addr_min = get_number(&p, &rlen, 1); - ignore_space(&p, &rlen); - if ( rlen ) - addr_max = get_number(&p, &rlen, 1); - else - addr_max = addr_min; - - *PP32_DBG_PC_MIN(n) = addr_min; - *PP32_DBG_PC_MAX(n) = addr_max; - } - - if ( on_off_flag == 0 ) - *PP32_BRK_SRC &= ~(1 << n); - else if ( on_off_flag > 0 ) - *PP32_BRK_SRC |= 1 << n; - } - else if ( strincmp(p, "data", 4) == 0 && p[4] >= '0' && p[4] <= '1' && p[5] <= ' ' ) { - const static char *data_cmd_str[] = {"r", "w", "rw", "w=", "off", "min", "min addr", "max", "max addr", "val", "value"}; - const static int data_cmd_len[] = {1, 1, 2, 2, 3, 3, 8, 3, 8, 3, 5}; - const static int data_cmd_idx[] = {1, 2, 3, 4, 0, 5, 5, 6, 6, 7, 7}; - int n = p[4] - '0'; - int on_off_flag = -1, on_off_mask = 0; - int addr_min = -1, addr_max = -1; - int value = 0, f_got_value = 0; - int stat = 0; - int i; - int tmp; - - p += 6; - rlen -= 6; - - while ( 1 ) { - ignore_space(&p, &rlen); - if ( rlen <= 0 ) - break; - for ( i = 0; i < NUM_ENTITY(data_cmd_str); i++ ) - if ( strincmp(p, data_cmd_str[i], data_cmd_len[i]) == 0 && p[data_cmd_len[i]] <= ' ' ) { - p += data_cmd_len[i]; - rlen -= data_cmd_len[i]; - stat = data_cmd_idx[i]; - if ( stat <= 4 ) { - on_off_mask = 7; - on_off_flag = stat; - } - break; - } - if ( i == NUM_ENTITY(data_cmd_str) ) { - if ( (*p >= '0' && *p <= '9') || (*p >= 'a' && *p <= 'f') || (*p >= 'A' && *p <= 'F') ) { - tmp = get_number(&p, &rlen, 1); - if ( stat <= 5 ) { - addr_min = tmp; - stat = 6; - } - else if ( stat >= 7 ) { - value = tmp; - f_got_value = 1; - } - else { - addr_max = tmp; - stat = 7; - } - } - else - for ( ; rlen && *p > ' '; rlen--, p++ ); - } - } - - if ( addr_min >= 0 ) - *PP32_DBG_DATA_MIN(n) = *PP32_DBG_DATA_MAX(n) = addr_min; - if ( addr_max >= 0 ) - *PP32_DBG_DATA_MAX(n) = addr_max; - if ( f_got_value ) - *PP32_DBG_DATA_VAL(n) = value; - if ( on_off_mask && on_off_flag >= 0 ) { - on_off_flag <<= n ? 11 : 8; - on_off_mask <<= n ? 11 : 8; - *PP32_BRK_SRC = (*PP32_BRK_SRC & ~on_off_mask) | on_off_flag; - } - } - else { - printk("echo \"<command>\" > /proc/eth/etop\n"); - printk(" command:\n"); - printk(" start - run pp32\n"); - printk(" stop - stop pp32\n"); - printk(" step - run pp32 with one step only\n"); - printk(" pc - pc? [on/off] [min addr] [max addr], set PC break point\n"); - printk(" data - data? [r/w/rw/w=/off] [min <addr>] [max <addr>] [val <value>], set data break point\n"); - printk(" help - print this screen\n"); - } - - vfree(str); - return count; -} - - #elif defined(CONFIG_AMAZON_SE) - -static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - static const char *halt_stat[] = { - "reset", - "break in line", - "stop", - "step", - "code", - "data0", - "data1" - }; - static const char *brk_src_data[] = { - "off", - "read", - "write", - "read/write", - "write_equal", - "N/A", - "N/A", - "N/A" - }; - static const char *brk_src_code[] = { - "off", - "on" - }; - - int len = 0; - int i; - int k; - unsigned long bit; - - len += sprintf(page + off + len, "Task No %d, PC %04x\n", *PP32_DBG_TASK_NO & 0x03, *PP32_DBG_CUR_PC & 0xFFFF); - - if ( !(*PP32_HALT_STAT & 0x01) ) - len += sprintf(page + off + len, " Halt State: Running\n"); - else - { - len += sprintf(page + off + len, " Halt State: Stopped"); - k = 0; - for ( bit = 2, i = 0; bit <= (1 << 7); bit <<= 1, i++ ) - if ( (*PP32_HALT_STAT & bit) ) - { - if ( !k ) - { - len += sprintf(page + off + len, ", "); - k++; - } - else - len += sprintf(page + off + len, " | "); - len += sprintf(page + off + len, halt_stat[i]); - } - - len += sprintf(page + off + len, "\n"); - } - - len += sprintf(page + off + len, " Break Src: data1 - %s, data0 - %s, pc3 - %s, pc2 - %s, pc1 - %s, pc0 - %s\n", - brk_src_data[(*PP32_BRK_SRC >> 11) & 0x07], brk_src_data[(*PP32_BRK_SRC >> 8) & 0x07], brk_src_code[(*PP32_BRK_SRC >> 3) & 0x01], brk_src_code[(*PP32_BRK_SRC >> 2) & 0x01], brk_src_code[(*PP32_BRK_SRC >> 1) & 0x01], brk_src_code[*PP32_BRK_SRC & 0x01]); - -// for ( i = 0; i < 4; i++ ) -// len += sprintf(page + off + len, " pc%d: %04x - %04x\n", i, *PP32_DBG_PC_MIN(i), *PP32_DBG_PC_MAX(i)); - -// for ( i = 0; i < 2; i++ ) -// len += sprintf(page + off + len, " data%d: %04x - %04x (%08x)\n", i, *PP32_DBG_DATA_MIN(i), *PP32_DBG_DATA_MAX(i), *PP32_DBG_DATA_VAL(i)); - - *eof = 1; - - return len; -} - -static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[2048]; - char *p; - - int len, rlen; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(str, "start") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_RESTART; - else if ( stricmp(str, "stop") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_STOP; -// else if ( stricmp(str, "step") == 0 ) -// *PP32_DBG_CTRL = DBG_CTRL_STEP_SET(1); - else - { - printk("echo \"<command>\" > /proc/eth/etop\n"); - printk(" command:\n"); - printk(" start - run pp32\n"); - printk(" stop - stop pp32\n"); -// printk(" step - run pp32 with one step only\n"); - printk(" help - print this screen\n"); - } - - return count; -} - - #endif - -#endif - -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - -static INLINE int print_htu(char *buf, int i) -{ - int len = 0; - - if ( HTU_ENTRY(i)->vld ) { - len += sprintf(buf + len, "%2d. valid\n", i); - len += sprintf(buf + len, " entry 0x%08x - pid %01x vpi %02x vci %04x pti %01x\n", *(unsigned int*)HTU_ENTRY(i), HTU_ENTRY(i)->pid, HTU_ENTRY(i)->vpi, HTU_ENTRY(i)->vci, HTU_ENTRY(i)->pti); - len += sprintf(buf + len, " mask 0x%08x - pid %01x vpi %02x vci %04x pti %01x\n", *(unsigned int*)HTU_MASK(i), HTU_MASK(i)->pid_mask, HTU_MASK(i)->vpi_mask, HTU_MASK(i)->vci_mask, HTU_MASK(i)->pti_mask); - len += sprintf(buf + len, " result 0x%08x - type: %s, qid: %d", *(unsigned int*)HTU_RESULT(i), HTU_RESULT(i)->type ? "cell" : "AAL5", HTU_RESULT(i)->qid); - if ( HTU_RESULT(i)->type ) - len += sprintf(buf + len, ", cell id: %d, verification: %s", HTU_RESULT(i)->cellid, HTU_RESULT(i)->ven ? "on" : "off"); - len += sprintf(buf + len, "\n"); - } - else - len += sprintf(buf + len, "%2d. invalid\n", i); - - return len; -} - -static int proc_read_htu(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - int len_max = off + count; - char *pstr; - int llen; - char *str; - int htuts = *CFG_WRX_HTUTS; - int i; - - str = vmalloc (1024); - if (!str) - return 0; - - pstr = *start = page; - - llen = sprintf(pstr, "HTU Table (Max %d):\n", htuts); - pstr += llen; - len += llen; - - for ( i = 0; i < htuts; i++ ) { - llen = print_htu(str, i); - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_HTU_OVERRUN_END; - } - - *eof = 1; - vfree(str); - return len - off; - -PROC_READ_HTU_OVERRUN_END: - - return len - llen - off; -} - -static INLINE int print_tx_queue(char *buf, int i) -{ - int len = 0; - - if ( (*WTX_DMACH_ON & (1 << i)) ) { - len += sprintf(buf + len, "%2d. valid\n", i); - len += sprintf(buf + len, " queue 0x%08x - sbid %u, qsb vcid %u, qsb %s\n", (unsigned int)WTX_QUEUE_CONFIG(i), (unsigned int)WTX_QUEUE_CONFIG(i)->sbid, (unsigned int)WTX_QUEUE_CONFIG(i)->qsb_vcid, WTX_QUEUE_CONFIG(i)->qsben ? "enable" : "disable"); - len += sprintf(buf + len, " dma 0x%08x - base %08x, len %u, vlddes %u\n", (unsigned int)WTX_DMA_CHANNEL_CONFIG(i), WTX_DMA_CHANNEL_CONFIG(i)->desba, WTX_DMA_CHANNEL_CONFIG(i)->deslen, WTX_DMA_CHANNEL_CONFIG(i)->vlddes); - } - else - len += sprintf(buf + len, "%2d. invalid\n", i); - - return len; -} - -static int proc_read_txq(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - int len_max = off + count; - char *pstr; - int llen; - int str_buff_len = 1024; - char *str; - - int i; - - str = vmalloc(str_buff_len); - if (!str){ - return 0; - } - pstr = *start = page; - - llen = sprintf(pstr, "TX Queue Config (Max %d):\n", *CFG_WTX_DCHNUM); - pstr += llen; - len += llen; - - for ( i = 0; i < 16; i++ ) { - llen = print_tx_queue(str, i); - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_HTU_OVERRUN_END; - } - - - *eof = 1; - - vfree(str); - return len - off; - -PROC_READ_HTU_OVERRUN_END: - - return len - llen - off; -} - - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - -static int proc_read_retx_fw(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - unsigned int next_dtu_sid_out, last_dtu_sid_in, next_cell_sid_out, isr_cell_id; - unsigned int curr_time, sec_counter, curr_efb; - struct Retx_adsl_ppe_intf adsl_ppe_intf; - - adsl_ppe_intf = *RETX_ADSL_PPE_INTF; - next_dtu_sid_out = *NEXT_DTU_SID_OUT; - last_dtu_sid_in = *LAST_DTU_SID_IN; - next_cell_sid_out = *NEXT_CELL_SID_OUT; - isr_cell_id = *ISR_CELL_ID; - - curr_time = *URetx_curr_time; - sec_counter = *URetx_sec_counter; - curr_efb = *RxCURR_EFB; - - - len += sprintf(page + off + len, "Adsl-PPE Interface:\n"); - len += sprintf(page + off + len, " dtu_sid = 0x%02x [%3u]\n", adsl_ppe_intf.dtu_sid, adsl_ppe_intf.dtu_sid); - len += sprintf(page + off + len, " dtu_timestamp = 0x%02x\n", adsl_ppe_intf.dtu_timestamp); - len += sprintf(page + off + len, " local_time = 0x%02x\n", adsl_ppe_intf.local_time); - len += sprintf(page + off + len, " is_last_cw = %u\n", adsl_ppe_intf.is_last_cw); - len += sprintf(page + off + len, " reinit_flag = %u\n", adsl_ppe_intf.reinit_flag); - len += sprintf(page + off + len, " is_bad_cw = %u\n", adsl_ppe_intf.is_bad_cw); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "Retx Firmware Context:\n"); - len += sprintf(page + off + len, " next_dtu_sid_out (0x%08x) = 0x%02x [%3u]\n", (unsigned int )NEXT_DTU_SID_OUT, next_dtu_sid_out, next_dtu_sid_out); - len += sprintf(page + off + len, " last_dtu_sid_in (0x%08x) = 0x%02x [%3u]\n", (unsigned int )LAST_DTU_SID_IN, last_dtu_sid_in, last_dtu_sid_in); - len += sprintf(page + off + len, " next_cell_sid_out (0x%08x) = %u\n", (unsigned int )NEXT_CELL_SID_OUT, next_cell_sid_out); - len += sprintf(page + off + len, " isr_cell_id (0x%08x) = %u\n", (unsigned int )ISR_CELL_ID, isr_cell_id); - len += sprintf(page + off + len, " pb_cell_search_idx (0x%08x) = %u\n", (unsigned int )PB_CELL_SEARCH_IDX, *PB_CELL_SEARCH_IDX); - len += sprintf(page + off + len, " pb_read_pend_flag (0x%08x) = %u\n", (unsigned int )PB_READ_PEND_FLAG, *PB_READ_PEND_FLAG); - len += sprintf(page + off + len, " rfbi_first_cw (0x%08x) = %u\n", (unsigned int )RFBI_FIRST_CW, *RFBI_FIRST_CW); - len += sprintf(page + off + len, " rfbi_bad_cw (0x%08x) = %u\n", (unsigned int )RFBI_BAD_CW, *RFBI_BAD_CW); - len += sprintf(page + off + len, " rfbi_invalid_cw (0x%08x) = %u\n", (unsigned int )RFBI_INVALID_CW, *RFBI_INVALID_CW); - len += sprintf(page + off + len, " rfbi_retx_cw (0x%08x) = %u\n", (unsigned int )RFBI_RETX_CW, *RFBI_RETX_CW); - len += sprintf(page + off + len, " rfbi_chk_dtu_status (0x%08x) = %u\n", (unsigned int )RFBI_CHK_DTU_STATUS,*RFBI_CHK_DTU_STATUS); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "SFSM Status: bc0 bc1 \n\n"); - len += sprintf(page + off + len, " state = %-22s , %s\n", - (*__WRXCTXT_PortState(0) & 3) == 0 ? "Hunt" : - (*__WRXCTXT_PortState(0) & 3) == 1 ? "Pre_sync" : - (*__WRXCTXT_PortState(0) & 3) == 2 ? "Sync" : - "Unknown(error)", - (*__WRXCTXT_PortState(1) & 3) == 0 ? "Hunt" : - (*__WRXCTXT_PortState(1) & 3) == 1 ? "Pre_sync" : - (*__WRXCTXT_PortState(1) & 3) == 2 ? "Sync" : - "Unknown(error)" ); - len += sprintf(page + off + len, " dbase = 0x%04x ( 0x%08x ) , 0x%04x ( 0x%08x )\n", - SFSM_DBA(0)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_DBA(0)->dbase + 0x2000), - SFSM_DBA(1)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_DBA(1)->dbase + 0x2000)); - len += sprintf(page + off + len, " cbase = 0x%04x ( 0x%08x ) , 0x%04x ( 0x%08x )\n", - SFSM_CBA(0)->cbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_CBA(0)->cbase + 0x2000), - SFSM_CBA(1)->cbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_CBA(1)->cbase + 0x2000)); - len += sprintf(page + off + len, " sen = %-22d , %d\n", SFSM_CFG(0)->sen, SFSM_CFG(1)->sen ); - len += sprintf(page + off + len, " idlekeep = %-22d , %d\n", SFSM_CFG(0)->idlekeep, SFSM_CFG(1)->idlekeep ); - len += sprintf(page + off + len, " pnum = %-22d , %d\n", SFSM_CFG(0)->pnum, SFSM_CFG(1)->pnum ); - len += sprintf(page + off + len, " pptr = %-22d , %d\n", SFSM_PGCNT(0)->pptr, SFSM_PGCNT(1)->pptr); - len += sprintf(page + off + len, " upage = %-22d , %d\n", SFSM_PGCNT(0)->upage, SFSM_PGCNT(1)->upage); - len += sprintf(page + off + len, " l2_rdptr = %-22d , %d\n", *__WRXCTXT_L2_RdPtr(0), *__WRXCTXT_L2_RdPtr(1) ); - len += sprintf(page + off + len, " l2_page = %-22d , %d\n", *__WRXCTXT_L2Pages(0), *__WRXCTXT_L2Pages(1) ); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "FFSM Status: bc0 bc1 \n\n"); - len += sprintf(page + off + len, " dbase = 0x%04x ( 0x%08x ) , 0x%04x ( 0x%08x )\n", - FFSM_DBA(0)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(FFSM_DBA(0)->dbase + 0x2000), - FFSM_DBA(1)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(FFSM_DBA(1)->dbase + 0x2000)); - len += sprintf(page + off + len, " pnum = %-22d , %d\n", FFSM_CFG(0)->pnum, FFSM_CFG(1)->pnum); - len += sprintf(page + off + len, " vpage = %-22d , %d\n", FFSM_PGCNT(0)->vpage, FFSM_PGCNT(1)->vpage); - len += sprintf(page + off + len, " ival = %-22d , %d\n", FFSM_PGCNT(0)->ival, FFSM_PGCNT(1)->ival); - len += sprintf(page + off + len, " tc_wrptr = %-22d , %d\n", *__WTXCTXT_TC_WRPTR(0), *__WTXCTXT_TC_WRPTR(1)); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "Misc: \n\n"); - len += sprintf(page + off + len, " curr_time = %08x\n", curr_time ); - len += sprintf(page + off + len, " sec_counter = %d\n", sec_counter ); - len += sprintf(page + off + len, " curr_efb = %d\n", curr_efb ); - len += sprintf(page + off + len, "\n"); - - *eof = 1; - - return len; -} - -static inline int is_valid(unsigned int * dtu_vld_stat, int dtu_sid) -{ - int dw_idx = (dtu_sid / 32) & 7; - int bit_pos = dtu_sid % 32; - - return dtu_vld_stat[dw_idx] & (0x80000000 >> bit_pos); -} - -static int proc_read_retx_stats(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int i; - int len = 0; - int len_max = off + count; - char *pstr; - char str[2048]; - int llen = 0; - - unsigned int next_dtu_sid_out, last_dtu_sid_in, next_cell_sid_out; - unsigned int dtu_vld_stat[8]; - struct DTU_stat_info dtu_stat_info[256]; - struct Retx_adsl_ppe_intf adsl_ppe_intf; - - pstr = *start = page; - - __sync(); - - // capture a snapshot of internal status - next_dtu_sid_out = *NEXT_DTU_SID_OUT; - last_dtu_sid_in = *LAST_DTU_SID_IN; - next_cell_sid_out = *NEXT_CELL_SID_OUT; - adsl_ppe_intf = *RETX_ADSL_PPE_INTF; - - memcpy(&dtu_vld_stat, (void *)DTU_VLD_STAT, sizeof(dtu_vld_stat)); - memcpy(&dtu_stat_info, (void *)DTU_STAT_INFO, sizeof(dtu_stat_info)); - - - llen += sprintf(str + llen, "Adsl-PPE Interface:\n"); - llen += sprintf(str + llen, " dtu_sid = 0x%02x [%3u]\n", adsl_ppe_intf.dtu_sid, adsl_ppe_intf.dtu_sid); - llen += sprintf(str + llen, " dtu_timestamp = 0x%02x\n", adsl_ppe_intf.dtu_timestamp); - llen += sprintf(str + llen, " local_time = 0x%02x\n", adsl_ppe_intf.local_time); - llen += sprintf(str + llen, " is_last_cw = %u\n", adsl_ppe_intf.is_last_cw); - llen += sprintf(str + llen, " reinit_flag = %u\n", adsl_ppe_intf.reinit_flag); - llen += sprintf(str + llen, " is_bad_cw = %u\n", adsl_ppe_intf.is_bad_cw); - llen += sprintf(str + llen, "\n"); - - llen += sprintf(str + llen, "Retx Internal State:\n"); - llen += sprintf(str + llen, " next_dtu_sid_out (0x%08x) = 0x%02x [%3u]\n", (unsigned int )NEXT_DTU_SID_OUT, next_dtu_sid_out, next_dtu_sid_out); - llen += sprintf(str + llen, " last_dtu_sid_in (0x%08x) = 0x%02x [%3u]\n", (unsigned int )LAST_DTU_SID_IN, last_dtu_sid_in, last_dtu_sid_in); - llen += sprintf(str + llen, " next_cell_sid_out (0x%08x) = %u\n", (unsigned int )NEXT_CELL_SID_OUT, next_cell_sid_out); - llen += sprintf(str + llen, " dtu_valid_stat (0x%08x)\n", (unsigned int )DTU_VLD_STAT); - llen += sprintf(str + llen, " dtu_stat_info (0x%08x)\n", (unsigned int )DTU_STAT_INFO); - llen += sprintf(str + llen, " pb_buffer_usage (0x%08x)\n", (unsigned int )PB_BUFFER_USAGE); - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - - - llen += sprintf(str + llen, "\n"); - llen += sprintf(str + llen, "DTU_VALID_STAT: [0x%08x]:\n", (unsigned int)DTU_VLD_STAT); - llen += sprintf(str + llen, "%08X: %08X %08X %08X %08X %08X %08X %08X %08X\n", - (unsigned int)DTU_VLD_STAT, - dtu_vld_stat[0], dtu_vld_stat[1], dtu_vld_stat[2], dtu_vld_stat[3], - dtu_vld_stat[4], dtu_vld_stat[5], dtu_vld_stat[6], dtu_vld_stat[7]); - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - - - llen += sprintf(str + llen, "\n"); - llen += sprintf(str + llen, "DTU_STAT_INFO: [0x%08x]:\n", (unsigned int)DTU_STAT_INFO); - llen += sprintf(str + llen, "dtu_id ts complete bad cell_cnt dtu_rd_ptr dtu_wr_ptr\n"); - llen += sprintf(str + llen, "---------------------------------------------------------------------\n"); - for ( i = 0; i < 256; i++ ) { - if ( !is_valid(dtu_vld_stat, i) ) - continue; - - llen += sprintf(str + llen, "0x%02x [%3u] 0x%02x %d %d %3d %5d %5d\n", - i, i, - DTU_STAT_INFO[i].time_stamp, - DTU_STAT_INFO[i].complete, - DTU_STAT_INFO[i].bad, - DTU_STAT_INFO[i].cell_cnt, - DTU_STAT_INFO[i].dtu_rd_ptr, - DTU_STAT_INFO[i].dtu_wr_ptr ); - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) - { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - } - - - llen += sprintf(str + llen, "\n"); - llen += sprintf(str + llen, "Playout buffer status --- valid status [0x%08x]:\n", (unsigned int)PB_BUFFER_USAGE); - for( i = 0; i < RETX_MODE_CFG->buff_size; i += 8 ) { - llen += sprintf(str + llen, "%08X: %08X %08X %08X %08X %08X %08X %08X %08X\n", - (unsigned int)PB_BUFFER_USAGE + i * sizeof(unsigned int), - PB_BUFFER_USAGE[i], PB_BUFFER_USAGE[i+1], PB_BUFFER_USAGE[i+2], PB_BUFFER_USAGE[i+3], - PB_BUFFER_USAGE[i+4], PB_BUFFER_USAGE[i+5], PB_BUFFER_USAGE[i+6], PB_BUFFER_USAGE[i+7]); - } - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - - - *eof = 1; - - return len - off; - -PROC_READ_RETX_STATS_OVERRUN_END: - return len - llen - off; -} - -static int proc_write_retx_stats(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[2048]; - char *p; - - int len, rlen; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(p, "help") == 0 ) { - printk("echo clear_pb > /proc/driver/ifx_atm/retx_stats \n"); - printk(" :clear context in playout buffer\n\n"); - printk("echo read_pb <pb_index> <cell_num> > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read playout buffer contents\n\n"); - printk("echo read_[r|t]x_cb > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read cell buffer\n\n"); - printk("echo clear_[r|t]x_cb > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : clear cell buffer\n\n"); - printk("echo read_bad_dtu_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read bad dtu intrface information record\n\n"); - printk("echo clear_bad_dtu_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : clear bad dtu interface information record\n\n"); - printk("echo read_wrx_context [i] > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : clear bad dtu interface information record\n\n"); - printk("echo read_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read interface info record buffer\n\n"); - printk("echo reinit_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : reinit intf record, must be called before showtime\n\n"); - } - else if ( stricmp(p, "reinit_intf_rec") == 0 ) { - int i = 0; - struct Retx_adsl_ppe_intf_rec rec[16]; - - *DBG_DTU_INTF_WRPTR = 0; - *DBG_INTF_FCW_DUP_CNT = 0; - *DBG_INTF_SID_CHANGE_IN_DTU_CNT = 0; - *DBG_INTF_LCW_DUP_CNT = 0; - - *DBG_RFBI_DONE_INT_CNT = 0; - *DBG_RFBI_INTV0 = 0; - *DBG_RFBI_INTV1 = 0; - *DBG_RFBI_BC0_INVALID_CNT = 0; - *DBG_RFBI_LAST_T = 0; - *DBG_DREG_BEG_END = 0; - - memset((void *) DBG_INTF_INFO(0), 0, sizeof(rec)); - for( i = 0; i < 16; i++ ) - DBG_INTF_INFO(i)->res1_1 = 1; - DBG_INTF_INFO(15)->dtu_sid = 255; - } - else if ( stricmp(p, "read_intf_rec") == 0 ) { - int i, cnt; - unsigned int dtu_intf_wrptr, fcw_dup_cnt, sid_change_in_dtu_cnt, lcw_dup_cnt ; - unsigned int rfbi_done_int_cnt, rfbi_intv0, rfbi_intv1, rfbi_bc0_invalid_cnt, dreg_beg_end; - struct Retx_adsl_ppe_intf_rec rec[16]; - - memcpy((void *) rec, (void *) DBG_INTF_INFO(0), sizeof(rec)); - - dtu_intf_wrptr = *DBG_DTU_INTF_WRPTR; - fcw_dup_cnt = *DBG_INTF_FCW_DUP_CNT; - sid_change_in_dtu_cnt = *DBG_INTF_SID_CHANGE_IN_DTU_CNT; - lcw_dup_cnt = *DBG_INTF_LCW_DUP_CNT; - - rfbi_done_int_cnt = *DBG_RFBI_DONE_INT_CNT; - rfbi_intv0 = *DBG_RFBI_INTV0; - rfbi_intv1 = *DBG_RFBI_INTV1; - rfbi_bc0_invalid_cnt = *DBG_RFBI_BC0_INVALID_CNT; - dreg_beg_end = *DBG_DREG_BEG_END; - - printk("PPE-Adsl Interface recrod [addr 0x23F0]:\n\n"); - - printk(" rfbi_done_int_cnt = %d [0x%x] \n", rfbi_done_int_cnt, rfbi_done_int_cnt); - printk(" rfbi_intv = 0x%08x 0x%08x [%d, %d, %d, %d, %d, %d, %d, %d]\n", - rfbi_intv0, rfbi_intv1, - rfbi_intv0 >> 24, (rfbi_intv0>>16) & 0xff, (rfbi_intv0>>8) & 0xff, rfbi_intv0 & 0xff, - rfbi_intv1 >> 24, (rfbi_intv1>>16) & 0xff, (rfbi_intv1>>8) & 0xff, rfbi_intv1 & 0xff - ); - printk(" rfbi_bc0_invld_cnt = %d\n", rfbi_bc0_invalid_cnt); - printk(" dreg_beg_end = %d, %d\n\n", dreg_beg_end >> 16, dreg_beg_end & 0xffff); - - printk(" wrptr = %d [0x%x] \n", dtu_intf_wrptr, dtu_intf_wrptr); - printk(" fcw_dup_cnt = %d\n", fcw_dup_cnt); - printk(" sid_chg_cnt = %d\n", sid_change_in_dtu_cnt); - printk(" lcw_dup_cnt = %d\n\n", lcw_dup_cnt); - - - printk(" idx itf_dw0 itf_dw1 dtu_sid timestamp local_time res1 last_cw bad_flag reinit\n"); - printk(" -------------------------------------------------------------------------------------\n"); - for ( i = (dtu_intf_wrptr + 1) % 16, cnt = 0; cnt < 16; cnt ++, i = (i + 1) % 16 ) { - if(cnt < 15) - printk(" "); - else - printk(" *"); - printk("%3d %04x %04x %3d[%02x] %3d[%02x] %3d[%02x] 0x%02x %d %d %d\n", - i, - (*(unsigned int *)&rec[i]) & 0xffff, - (*(unsigned int *)&rec[i]) >> 16, - rec[i].dtu_sid, rec[i].dtu_sid, - rec[i].dtu_timestamp, rec[i].dtu_timestamp, - rec[i].local_time, rec[i].local_time, - rec[i].res1_1, - rec[i].is_last_cw, - rec[i].is_bad_cw, - rec[i].reinit_flag ); - } - } - else if ( stricmp(p, "read_wrx_context") == 0 ) { - int i = 0; - int flag = 0; - for( i = 0; i < 8; ++i ) { - if ( !WRX_QUEUE_CONTEXT(i)->curr_des0 || !WRX_QUEUE_CONTEXT(i)->curr_des1 ) - continue; - - flag = 1; - printk("WRX queue context [ %d ]: \n", i); - printk(" curr_len = %4d, mfs = %d, ec = %d, clp1 = %d, aal5dp = %d\n", - WRX_QUEUE_CONTEXT(i)->curr_len, WRX_QUEUE_CONTEXT(i)->mfs, - WRX_QUEUE_CONTEXT(i)->ec, WRX_QUEUE_CONTEXT(i)->clp1, - WRX_QUEUE_CONTEXT(i)->aal5dp); - printk(" initcrc = %08x\n", WRX_QUEUE_CONTEXT(i)->intcrc); - printk(" currdes = %08x %08x\n", - WRX_QUEUE_CONTEXT(i)->curr_des0, WRX_QUEUE_CONTEXT(i)->curr_des1); - printk(" last_dw = %08x\n\n", WRX_QUEUE_CONTEXT(i)->last_dword); - if( WRX_QUEUE_CONTEXT(i)->curr_len ) { - int j = 0; - unsigned char *p_char; - struct rx_descriptor *desc = (struct rx_descriptor *)&(WRX_QUEUE_CONTEXT(i)->curr_des0); - p_char = (unsigned char *)(((unsigned int)desc->dataptr << 2) | KSEG1); - printk(" Data in SDRAM:\n "); - - for ( j = 0 ; j < WRX_QUEUE_CONTEXT(i)->curr_len; ++j ) { - printk ("%02x", p_char[j]); - if ( j % 16 == 15 ) - printk("\n "); - else if ( j % 4 == 3 ) - printk (" "); - } - printk("\n\n"); - } - } - if ( !flag ) { - printk("No active wrx queue context\n"); - } - } - else if ( stricmp(p, "clear_pb") == 0 ) { - if ( g_retx_playout_buffer ) - memset((void *)g_retx_playout_buffer, 0, RETX_PLAYOUT_BUFFER_SIZE); - } - else if ( stricmp(p, "read_bad_dtu_intf_rec") == 0 ) { - struct Retx_adsl_ppe_intf first_dtu_intf, last_dtu_intf; - first_dtu_intf = *FIRST_BAD_REC_RETX_ADSL_PPE_INTF; - last_dtu_intf = *BAD_REC_RETX_ADSL_PPE_INTF; - - printk("\nAdsl-PPE Interface for first and last DTU of recent noise:\n\n"); - printk(" dtu_sid = 0x%02x [%3u], 0x%02x [%3u]\n", - first_dtu_intf.dtu_sid, first_dtu_intf.dtu_sid, - last_dtu_intf.dtu_sid, last_dtu_intf.dtu_sid); - printk(" dtu_timestamp = 0x%02x , 0x%02x\n", - first_dtu_intf.dtu_timestamp, last_dtu_intf.dtu_timestamp); - printk(" local_time = 0x%02x , 0x%02x\n", - first_dtu_intf.local_time, last_dtu_intf.local_time); - printk(" is_last_cw = %u , %u\n", - first_dtu_intf.is_last_cw, last_dtu_intf.is_last_cw); - printk(" reinit_flag = %u , %u\n", - first_dtu_intf.reinit_flag, last_dtu_intf.reinit_flag); - printk(" is_bad_cw = %u , %u\n\n", - first_dtu_intf.is_bad_cw, last_dtu_intf.is_bad_cw); - } - else if ( stricmp(p, "clear_bad_dtu_intf_rec") == 0 ) { - memset((void *)BAD_REC_RETX_ADSL_PPE_INTF, 0, sizeof(struct Retx_adsl_ppe_intf)); - memset((void *)FIRST_BAD_REC_RETX_ADSL_PPE_INTF, 0, sizeof(struct Retx_adsl_ppe_intf)); - } - else if ( stricmp(p, "clear_tx_cb") == 0 ) { - unsigned int *dbase0; - unsigned int pnum0; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( FFSM_DBA(0)->dbase + 0x2000); - pnum0 = FFSM_CFG(0)->pnum; - memset(dbase0, 0, 14 * sizeof(unsigned int ) * pnum0); - } - else if ( stricmp(p, "clear_rx_cb") == 0 ) { - unsigned int *dbase0, *cbase0, *dbase1, *cbase1; - unsigned int pnum0; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(0)->dbase + 0x2000); - cbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(0)->cbase + 0x2000); - - dbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(1)->dbase + 0x2000); - cbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(1)->cbase + 0x2000); - - pnum0 = SFSM_CFG(0)->pnum; - - memset(dbase0, 0, 14 * sizeof(unsigned int ) * pnum0); - memset(cbase0, 0, sizeof(unsigned int ) * pnum0); - - memset(dbase1, 0, 14 * sizeof(unsigned int )); - memset(cbase1, 0, sizeof(unsigned int )); - } - else if ( strnicmp(p, "read_tx_cb", 10) == 0 ) { - unsigned int *dbase0; - unsigned int pnum0, i; - unsigned int * cell; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( FFSM_DBA(0)->dbase + 0x2000); - pnum0 = FFSM_CFG(0)->pnum; - - printk("ATM TX BC 0 CELL data/ctrl buffer:\n\n"); - for(i = 0; i < pnum0 ; ++ i) { - cell = dbase0 + i * 14; - printk("cell %2d: %08x %08x\n", i, cell[0], cell[1]); - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - } - else if ( strnicmp(p, "read_rx_cb", 10) == 0 ) { - unsigned int *dbase0, *cbase0, *dbase1, *cbase1; - unsigned int pnum0, i; - unsigned int * cell; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(0)->dbase + 0x2000); - cbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(0)->cbase + 0x2000); - - dbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(1)->dbase + 0x2000); - cbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(1)->cbase + 0x2000); - - pnum0 = SFSM_CFG(0)->pnum; - - printk("ATM RX BC 0 CELL data/ctrl buffer:\n\n"); - for(i = 0; i < pnum0 ; ++ i) { - struct Retx_ctrl_field * p_ctrl; - - cell = dbase0 + i * 14; - p_ctrl = (struct Retx_ctrl_field *) ( &cbase0[i]); - printk("cell %2d: %08x %08x -- [%08x]:", i, cell[0], cell[1], cbase0[i]); - - printk("l2_drop: %d, retx: %d", p_ctrl->l2_drop, p_ctrl->retx); - if ( p_ctrl->retx ) { - printk(", dtu_sid = %u, cell_sid = %u", p_ctrl->dtu_sid, p_ctrl->cell_sid); - } - - printk("\n"); - - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - - printk("\n"); - printk("ATM RX BC 1 CELL data/ctrl buffer:\n\n"); - cell = dbase1; - printk("cell %2d: %08x %08x -- [%08x]: dtu_sid:%3d, cell_sid:%3d, next_ptr: %4d\n", - 0, cell[0], cell[1], cbase0[i], ( cell[1] >> 16) & 0xff, (cell[1] >> 24) & 0xff, cell[1] & 0xffff ); - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - else if ( strnicmp(p, "read_pb ", 8) == 0 ) - { - int start_cell_idx = 0; - int cell_num = 0; - unsigned int *cell; - unsigned int pb_buff_size = RETX_MODE_CFG->buff_size * 32; - - p += 8; - rlen -= 8; - ignore_space(&p, &rlen); - - start_cell_idx = get_number(&p, &rlen, 0); - ignore_space(&p, &rlen); - cell_num = get_number(&p, &rlen, 0); - - if ( start_cell_idx >= pb_buff_size ) { - printk(" Invalid cell index\n"); - } - else { - int i; - if ( cell_num < 0 ) - cell_num = 1; - - if ( cell_num + start_cell_idx > pb_buff_size ) - cell_num = pb_buff_size - start_cell_idx; - - for ( i = 0; i < cell_num ; ++i ) { - cell = (unsigned int *)((unsigned int *)g_retx_playout_buffer + (14 * (start_cell_idx + i))); - printk("cell %4d: %08x %08x [next_ptr = %4u, dtu_sid = %3u, cell_sid = %3u]\n", - start_cell_idx + i, cell[0], cell[1], cell[1] & 0xffff, (cell[1] >> 16) & 0xff, (cell[1] >> 24) & 0xff); - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - } - } - - return count; -} - -static int proc_read_retx_cfg(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "ReTX FW Config:\n"); - len += sprintf(page + off + len, " RETX_MODE_CFG = 0x%08x, invld_range=%u, buff_size=%u, retx=%u\n", *(volatile unsigned int *)RETX_MODE_CFG, (unsigned int)RETX_MODE_CFG->invld_range, (unsigned int)RETX_MODE_CFG->buff_size * 32, (unsigned int)RETX_MODE_CFG->retx_en); - len += sprintf(page + off + len, " RETX_TSYNC_CFG = 0x%08x, fw_alpha=%u, sync_inp=%u\n", *(volatile unsigned int *)RETX_TSYNC_CFG, (unsigned int)RETX_TSYNC_CFG->fw_alpha, (unsigned int)RETX_TSYNC_CFG->sync_inp); - len += sprintf(page + off + len, " RETX_TD_CFG = 0x%08x, td_max=%u, td_min=%u\n", *(volatile unsigned int *)RETX_TD_CFG, (unsigned int)RETX_TD_CFG->td_max, (unsigned int)RETX_TD_CFG->td_min); - len += sprintf(page + off + len, " RETX_PLAYOUT_BUFFER_BASE = 0x%08x\n", *RETX_PLAYOUT_BUFFER_BASE); - len += sprintf(page + off + len, " RETX_SERVICE_HEADER_CFG = 0x%08x\n", *RETX_SERVICE_HEADER_CFG); - len += sprintf(page + off + len, " RETX_MASK_HEADER_CFG = 0x%08x\n", *RETX_MASK_HEADER_CFG); - len += sprintf(page + off + len, " RETX_MIB_TIMER_CFG = 0x%08x, tick_cycle = %d, ticks_per_sec = %d\n", - *(unsigned int *)RETX_MIB_TIMER_CFG, RETX_MIB_TIMER_CFG->tick_cycle, RETX_MIB_TIMER_CFG->ticks_per_sec); - - *eof = 1; - - return len; -} - -static int proc_write_retx_cfg(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *p1, *p2; - int len; - int colon; - char local_buf[1024]; - char *tokens[4] = {0}; - unsigned int token_num = 0; - - len = sizeof(local_buf) < count ? sizeof(local_buf) - 1 : count; - len = len - copy_from_user(local_buf, buf, len); - local_buf[len] = 0; - - p1 = local_buf; - colon = 0; - while ( token_num < NUM_ENTITY(tokens) && get_token(&p1, &p2, &len, &colon) ) { - tokens[token_num++] = p1; - - p1 = p2; - } - - if ( token_num > 0 ) { - if ( stricmp(tokens[0], "help") == 0 ) { - printk("echo help > /proc/driver/ifx_atm/retx_cfg ==> \n\tprint this help message\n\n"); - - printk("echo set retx <enable|disable|0|1|on|off> > /proc/driver/ifx_atm/retx_cfg\n"); - printk("\t:enable or disable retx feature\n\n"); - - printk("echo set <td_max|td_min|fw_alpha|sync_inp|invld_range|buff_size> <number> > /proc/driver/ifx_atm/retx_cfg\n"); - printk("\t: set td_max, td_min, fw_alpha, sync_inp, invalid_range, buff_size\n\n"); - - printk("echo set <service_header|service_mask> <hex_number> /proc/driver/ifx_atm/retx_cfg \n"); - printk("\t: set service_header, service_mask\n\n"); - } - else if ( stricmp(tokens[0], "set") == 0 && token_num >= 3 ) { - - if ( stricmp(tokens[1], "retx") == 0 ) { - if ( stricmp(tokens[2], "enable") == 0 || - stricmp(tokens[2], "on") == 0 || - stricmp(tokens[2], "1") == 0 ) - RETX_MODE_CFG->retx_en = 1; - else if ( stricmp(tokens[2], "disable") == 0 || - stricmp(tokens[2], "off") == 0 || - stricmp(tokens[2], "0") == 0 ) - RETX_MODE_CFG->retx_en = 0; - printk("RETX_MODE_CFG->retx_en - %d\n", RETX_MODE_CFG->retx_en); - } - else { - unsigned int dec_val, hex_val; - - p1 = tokens[2]; - dec_val = (unsigned int)get_number(&p1, NULL, 0); - p2 = tokens[2]; - hex_val = (unsigned int)get_number(&p2, NULL, 1); - - if ( *p2 == 0 ) { - if ( stricmp(tokens[1], "service_header") == 0 ) { - *RETX_SERVICE_HEADER_CFG = hex_val; - printk("RETX_SERVICE_HEADER_CFG - 0x%08x\n", *RETX_SERVICE_HEADER_CFG); - } - else if ( stricmp(tokens[1], "service_mask") == 0 ) { - *RETX_MASK_HEADER_CFG = hex_val; - printk("RETX_MASK_HEADER_CFG - 0x%08x\n", *RETX_MASK_HEADER_CFG); - } - } - if ( *p1 == 0 ) { - if ( stricmp(tokens[1], "td_max") == 0 ) { - (unsigned int)RETX_TD_CFG->td_max = (dec_val >= 0xff ? 0Xff : dec_val); - printk("RETX_TD_CFG->td_max - %d\n", RETX_TD_CFG->td_max); - } - else if ( stricmp(tokens[1], "td_min") == 0 ) { - (unsigned int)RETX_TD_CFG->td_min = (dec_val >= 0xff ? 0Xff : dec_val); - printk("RETX_TD_CFG->td_min - %d\n", RETX_TD_CFG->td_min); - } - else if ( stricmp(tokens[1], "fw_alpha") == 0 ) { - RETX_TSYNC_CFG->fw_alpha = dec_val >= 0x7FFE ? 0X7EEE : dec_val; - printk("RETX_TSYNC_CFG->fw_alpha - %d\n", RETX_TSYNC_CFG->fw_alpha); - } - else if ( stricmp(tokens[1], "sync_inp") == 0 ) { - RETX_TSYNC_CFG->sync_inp = dec_val >= 0x7FFE ? 0X7EEE : dec_val; - printk("RETX_TSYNC_CFG->sync_inp - %d\n", RETX_TSYNC_CFG->sync_inp); - } - else if ( stricmp(tokens[1], "invld_range") == 0 ) { - RETX_MODE_CFG->invld_range = dec_val >= 250 ? 250 : dec_val; - printk("RETX_MODE_CFG->invld_range - %d\n", RETX_MODE_CFG->invld_range); - } - else if ( stricmp(tokens[1], "buff_size") == 0 ) { - dec_val = (dec_val + 31) / 32; - RETX_MODE_CFG->buff_size = dec_val >= 4096 / 32 ? 4096 / 32 : dec_val; - printk("RETX_MODE_CFG->buff_size - %d\n", RETX_MODE_CFG->buff_size); - } - } - } - - } - } - - return count; -} - -static int proc_read_retx_dsl_param(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "DSL Param [timestamp %ld.%ld]:\n", g_retx_polling_start.tv_sec, g_retx_polling_start.tv_usec); - - if ( g_xdata_addr == NULL ) - len += sprintf(page + off + len, " DSL parameters not available !\n"); - else { - volatile struct dsl_param *p_dsl_param = (volatile struct dsl_param *)g_xdata_addr; - - len += sprintf(page + off + len, " update_flag = %u\n", p_dsl_param->update_flag); - len += sprintf(page + off + len, " MinDelayrt = %u\n", p_dsl_param->MinDelayrt); - len += sprintf(page + off + len, " MaxDelayrt = %u\n", p_dsl_param->MaxDelayrt); - len += sprintf(page + off + len, " RetxEnable = %u\n", p_dsl_param->RetxEnable); - len += sprintf(page + off + len, " ServiceSpecificReTx = %u\n", p_dsl_param->ServiceSpecificReTx); - len += sprintf(page + off + len, " ReTxPVC = 0x%08x\n", p_dsl_param->ReTxPVC); - len += sprintf(page + off + len, " RxDtuCorruptedCNT = %u\n", p_dsl_param->RxDtuCorruptedCNT); - len += sprintf(page + off + len, " RxRetxDtuUnCorrectedCNT = %u\n", p_dsl_param->RxRetxDtuUnCorrectedCNT); - len += sprintf(page + off + len, " RxLastEFB = %u\n", p_dsl_param->RxLastEFB); - len += sprintf(page + off + len, " RxDtuCorrectedCNT = %u\n", p_dsl_param->RxDtuCorrectedCNT); - } - if ( g_retx_polling_end.tv_sec != 0 || g_retx_polling_end.tv_usec != 0 ) { - unsigned long polling_time_usec; - - polling_time_usec = (g_retx_polling_end.tv_sec - g_retx_polling_start.tv_sec) * 1000000 + (g_retx_polling_end.tv_usec - g_retx_polling_start.tv_usec); - len += sprintf(page + off + len, "DSL Param Update Time: %lu.%03lums\n", polling_time_usec / 1000, polling_time_usec % 1000); - } - - return len; -} - - #endif - -#endif - -static int stricmp(const char *p1, const char *p2) -{ - int c1, c2; - - while ( *p1 && *p2 ) { - c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1; - c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2; - if ( (c1 -= c2) ) - return c1; - p1++; - p2++; - } - - return *p1 - *p2; -} - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - -static int strincmp(const char *p1, const char *p2, int n) -{ - int c1 = 0, c2; - - while ( n && *p1 && *p2 ) { - c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1; - c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2; - if ( (c1 -= c2) ) - return c1; - p1++; - p2++; - n--; - } - - return n ? *p1 - *p2 : c1; -} - -static int get_token(char **p1, char **p2, int *len, int *colon) -{ - int tlen = 0; - - while ( *len && !((**p1 >= 'A' && **p1 <= 'Z') || (**p1 >= 'a' && **p1<= 'z') || (**p1 >= '0' && **p1<= '9')) ) - { - (*p1)++; - (*len)--; - } - if ( !*len ) - return 0; - - if ( *colon ) - { - *colon = 0; - *p2 = *p1; - while ( *len && **p2 > ' ' && **p2 != ',' ) - { - if ( **p2 == ':' ) - { - *colon = 1; - break; - } - (*p2)++; - (*len)--; - tlen++; - } - **p2 = 0; - } - else - { - *p2 = *p1; - while ( *len && **p2 > ' ' && **p2 != ',' ) - { - (*p2)++; - (*len)--; - tlen++; - } - **p2 = 0; - } - - return tlen; -} - -static unsigned int get_number(char **p, int *len, int is_hex) -{ - unsigned int ret = 0; - unsigned int n = 0; - - if ( (*p)[0] == '0' && (*p)[1] == 'x' ) - { - is_hex = 1; - (*p) += 2; - if ( len ) - (*len) -= 2; - } - - if ( is_hex ) - { - while ( (!len || *len) && ((**p >= '0' && **p <= '9') || (**p >= 'a' && **p <= 'f') || (**p >= 'A' && **p <= 'F')) ) - { - if ( **p >= '0' && **p <= '9' ) - n = **p - '0'; - else if ( **p >= 'a' && **p <= 'f' ) - n = **p - 'a' + 10; - else if ( **p >= 'A' && **p <= 'F' ) - n = **p - 'A' + 10; - ret = (ret << 4) | n; - (*p)++; - if ( len ) - (*len)--; - } - } - else - { - while ( (!len || *len) && **p >= '0' && **p <= '9' ) - { - n = **p - '0'; - ret = ret * 10 + n; - (*p)++; - if ( len ) - (*len)--; - } - } - - return ret; -} - -static void ignore_space(char **p, int *len) -{ - while ( *len && (**p <= ' ' || **p == ':' || **p == '.' || **p == ',') ) - { - (*p)++; - (*len)--; - } -} - -#endif - -static INLINE int ifx_atm_version(char *buf) -{ - int len = 0; - unsigned int major, minor; - - ifx_atm_get_fw_ver(&major, &minor); - - len += sprintf(buf + len, " ATM (A1) firmware version %d.%d.%d\n", IFX_ATM_VER_MAJOR, IFX_ATM_VER_MID,IFX_ATM_VER_MINOR); - - return len; -} - -static INLINE void check_parameters(void) -{ - /* Please refer to Amazon spec 15.4 for setting these values. */ - if ( qsb_tau < 1 ) - qsb_tau = 1; - if ( qsb_tstep < 1 ) - qsb_tstep = 1; - else if ( qsb_tstep > 4 ) - qsb_tstep = 4; - else if ( qsb_tstep == 3 ) - qsb_tstep = 2; - - /* There is a delay between PPE write descriptor and descriptor is */ - /* really stored in memory. Host also has this delay when writing */ - /* descriptor. So PPE will use this value to determine if the write */ - /* operation makes effect. */ - if ( write_descriptor_delay < 0 ) - write_descriptor_delay = 0; - - if ( aal5_fill_pattern < 0 ) - aal5_fill_pattern = 0; - else - aal5_fill_pattern &= 0xFF; - - /* Because of the limitation of length field in descriptors, the packet */ - /* size could not be larger than 64K minus overhead size. */ - if ( aal5r_max_packet_size < 0 ) - aal5r_max_packet_size = 0; - else if ( aal5r_max_packet_size >= 65535 - MAX_RX_FRAME_EXTRA_BYTES ) - aal5r_max_packet_size = 65535 - MAX_RX_FRAME_EXTRA_BYTES; - if ( aal5r_min_packet_size < 0 ) - aal5r_min_packet_size = 0; - else if ( aal5r_min_packet_size > aal5r_max_packet_size ) - aal5r_min_packet_size = aal5r_max_packet_size; - if ( aal5s_max_packet_size < 0 ) - aal5s_max_packet_size = 0; - else if ( aal5s_max_packet_size >= 65535 - MAX_TX_FRAME_EXTRA_BYTES ) - aal5s_max_packet_size = 65535 - MAX_TX_FRAME_EXTRA_BYTES; - if ( aal5s_min_packet_size < 0 ) - aal5s_min_packet_size = 0; - else if ( aal5s_min_packet_size > aal5s_max_packet_size ) - aal5s_min_packet_size = aal5s_max_packet_size; - - if ( dma_rx_descriptor_length < 2 ) - dma_rx_descriptor_length = 2; - if ( dma_tx_descriptor_length < 2 ) - dma_tx_descriptor_length = 2; - if ( dma_rx_clp1_descriptor_threshold < 0 ) - dma_rx_clp1_descriptor_threshold = 0; - else if ( dma_rx_clp1_descriptor_threshold > dma_rx_descriptor_length ) - dma_rx_clp1_descriptor_threshold = dma_rx_descriptor_length; - - if ( dma_tx_descriptor_length < 2 ) - dma_tx_descriptor_length = 2; -} - -static INLINE int init_priv_data(void) -{ - void *p; - int i; - struct rx_descriptor rx_desc = {0}; - struct sk_buff *skb; - volatile struct tx_descriptor *p_tx_desc; - struct sk_buff **ppskb; - - // clear atm private data structure - memset(&g_atm_priv_data, 0, sizeof(g_atm_priv_data)); - - // allocate memory for RX (AAL) descriptors - p = kzalloc(dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT); - g_atm_priv_data.aal_desc_base = p; - p = (void *)((((unsigned int)p + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); - g_atm_priv_data.aal_desc = (volatile struct rx_descriptor *)p; - - // allocate memory for RX (OAM) descriptors - p = kzalloc(RX_DMA_CH_OAM_DESC_LEN * sizeof(struct rx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, RX_DMA_CH_OAM_DESC_LEN * sizeof(struct rx_descriptor) + DESC_ALIGNMENT); - g_atm_priv_data.oam_desc_base = p; - p = (void *)((((unsigned int)p + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); - g_atm_priv_data.oam_desc = (volatile struct rx_descriptor *)p; - - // allocate memory for RX (OAM) buffer - p = kzalloc(RX_DMA_CH_OAM_DESC_LEN * RX_DMA_CH_OAM_BUF_SIZE + DATA_BUFFER_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, RX_DMA_CH_OAM_DESC_LEN * RX_DMA_CH_OAM_BUF_SIZE + DATA_BUFFER_ALIGNMENT); - g_atm_priv_data.oam_buf_base = p; - p = (void *)(((unsigned int)p + DATA_BUFFER_ALIGNMENT - 1) & ~(DATA_BUFFER_ALIGNMENT - 1)); - g_atm_priv_data.oam_buf = p; - - // allocate memory for TX descriptors - p = kzalloc(MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT); - g_atm_priv_data.tx_desc_base = p; - - // allocate memory for TX skb pointers - p = kzalloc(MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4); - g_atm_priv_data.tx_skb_base = p; - - // setup RX (AAL) descriptors - rx_desc.own = 1; - rx_desc.c = 0; - rx_desc.sop = 1; - rx_desc.eop = 1; - rx_desc.byteoff = 0; - rx_desc.id = 0; - rx_desc.err = 0; - rx_desc.datalen = RX_DMA_CH_AAL_BUF_SIZE; - for ( i = 0; i < dma_rx_descriptor_length; i++ ) { - skb = alloc_skb_rx(); - if ( skb == NULL ) - return IFX_ERROR; - rx_desc.dataptr = ((unsigned int)skb->data >> 2) & 0x0FFFFFFF; - g_atm_priv_data.aal_desc[i] = rx_desc; - } - - // setup RX (OAM) descriptors - p = (void *)((unsigned int)g_atm_priv_data.oam_buf | KSEG1); - rx_desc.own = 1; - rx_desc.c = 0; - rx_desc.sop = 1; - rx_desc.eop = 1; - rx_desc.byteoff = 0; - rx_desc.id = 0; - rx_desc.err = 0; - rx_desc.datalen = RX_DMA_CH_OAM_BUF_SIZE; - for ( i = 0; i < RX_DMA_CH_OAM_DESC_LEN; i++ ) { - rx_desc.dataptr = ((unsigned int)p >> 2) & 0x0FFFFFFF; - g_atm_priv_data.oam_desc[i] = rx_desc; - p = (void *)((unsigned int)p + RX_DMA_CH_OAM_BUF_SIZE); - } - - // setup TX descriptors and skb pointers - p_tx_desc = (volatile struct tx_descriptor *)((((unsigned int)g_atm_priv_data.tx_desc_base + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); - ppskb = (struct sk_buff **)(((unsigned int)g_atm_priv_data.tx_skb_base + 3) & ~3); - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) { - g_atm_priv_data.conn[i].tx_desc = &p_tx_desc[i * dma_tx_descriptor_length]; - g_atm_priv_data.conn[i].tx_skb = &ppskb[i * dma_tx_descriptor_length]; - } - - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) - g_atm_priv_data.port[i].tx_max_cell_rate = DEFAULT_TX_LINK_RATE; - - return IFX_SUCCESS; -} - -static INLINE void clear_priv_data(void) -{ - int i, j; - struct sk_buff *skb; - - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) { - if ( g_atm_priv_data.conn[i].tx_skb != NULL ) { - for ( j = 0; j < dma_tx_descriptor_length; j++ ) - if ( g_atm_priv_data.conn[i].tx_skb[j] != NULL ) - dev_kfree_skb_any(g_atm_priv_data.conn[i].tx_skb[j]); - } - } - - if ( g_atm_priv_data.tx_skb_base != NULL ) - kfree(g_atm_priv_data.tx_skb_base); - - if ( g_atm_priv_data.tx_desc_base != NULL ) - kfree(g_atm_priv_data.tx_desc_base); - - if ( g_atm_priv_data.oam_buf_base != NULL ) - kfree(g_atm_priv_data.oam_buf_base); - - if ( g_atm_priv_data.oam_desc_base != NULL ) - kfree(g_atm_priv_data.oam_desc_base); - - if ( g_atm_priv_data.aal_desc_base != NULL ) { - for ( i = 0; i < dma_rx_descriptor_length; i++ ) { - if ( g_atm_priv_data.aal_desc[i].sop || g_atm_priv_data.aal_desc[i].eop ) { // descriptor initialized - skb = get_skb_rx_pointer(g_atm_priv_data.aal_desc[i].dataptr); - dev_kfree_skb_any(skb); - } - } - kfree(g_atm_priv_data.aal_desc_base); - } -} - -static INLINE void init_rx_tables(void) -{ - int i; - struct wrx_queue_config wrx_queue_config = {0}; - struct wrx_dma_channel_config wrx_dma_channel_config = {0}; - struct htu_entry htu_entry = {0}; - struct htu_result htu_result = {0}; - struct htu_mask htu_mask = { set: 0x01, - clp: 0x01, - pid_mask: 0x00, - vpi_mask: 0x00, - vci_mask: 0x00, - pti_mask: 0x00, - clear: 0x00}; - - /* - * General Registers - */ - *CFG_WRX_HTUTS = MAX_PVC_NUMBER + OAM_HTU_ENTRY_NUMBER; -#ifndef CONFIG_AMAZON_SE - *CFG_WRX_QNUM = MAX_QUEUE_NUMBER; -#endif - *CFG_WRX_DCHNUM = RX_DMA_CH_TOTAL; - *WRX_DMACH_ON = (1 << RX_DMA_CH_TOTAL) - 1; - *WRX_HUNT_BITTH = DEFAULT_RX_HUNT_BITTH; - - /* - * WRX Queue Configuration Table - */ - wrx_queue_config.uumask = 0; - wrx_queue_config.cpimask = 0; - wrx_queue_config.uuexp = 0; - wrx_queue_config.cpiexp = 0; - wrx_queue_config.mfs = aal5r_max_packet_size; - wrx_queue_config.oversize = aal5r_max_packet_size; - wrx_queue_config.undersize = aal5r_min_packet_size; - wrx_queue_config.errdp = aal5r_drop_error_packet; - wrx_queue_config.dmach = RX_DMA_CH_AAL; - for ( i = 0; i < MAX_QUEUE_NUMBER; i++ ) - *WRX_QUEUE_CONFIG(i) = wrx_queue_config; - WRX_QUEUE_CONFIG(OAM_RX_QUEUE)->dmach = RX_DMA_CH_OAM; - - /* - * WRX DMA Channel Configuration Table - */ - wrx_dma_channel_config.chrl = 0; - wrx_dma_channel_config.clp1th = dma_rx_clp1_descriptor_threshold; - wrx_dma_channel_config.mode = 0; - wrx_dma_channel_config.rlcfg = 0; - - wrx_dma_channel_config.deslen = RX_DMA_CH_OAM_DESC_LEN; - wrx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.oam_desc >> 2) & 0x0FFFFFFF; - *WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_OAM) = wrx_dma_channel_config; - - wrx_dma_channel_config.deslen = dma_rx_descriptor_length; - wrx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.aal_desc >> 2) & 0x0FFFFFFF; - *WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_AAL) = wrx_dma_channel_config; - - /* - * HTU Tables - */ - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) - { - htu_result.qid = (unsigned int)i; - - *HTU_ENTRY(i + OAM_HTU_ENTRY_NUMBER) = htu_entry; - *HTU_MASK(i + OAM_HTU_ENTRY_NUMBER) = htu_mask; - *HTU_RESULT(i + OAM_HTU_ENTRY_NUMBER) = htu_result; - } - /* OAM HTU Entry */ - htu_entry.vci = 0x03; - htu_mask.pid_mask = 0x03; - htu_mask.vpi_mask = 0xFF; - htu_mask.vci_mask = 0x0000; - htu_mask.pti_mask = 0x07; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_F4_SEG_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_F4_SEG_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY) = htu_entry; - htu_entry.vci = 0x04; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_F4_TOT_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_F4_TOT_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY) = htu_entry; - htu_entry.vci = 0x00; - htu_entry.pti = 0x04; - htu_mask.vci_mask = 0xFFFF; - htu_mask.pti_mask = 0x01; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_F5_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_F5_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_F5_HTU_ENTRY) = htu_entry; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - htu_entry.pid = 0x0; - htu_entry.vpi = 0x01; - htu_entry.vci = 0x0001; - htu_entry.pti = 0x00; - htu_mask.pid_mask = 0x0; - htu_mask.vpi_mask = 0x00; - htu_mask.vci_mask = 0x0000; - htu_mask.pti_mask = 0x3; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_ARQ_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_ARQ_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_ARQ_HTU_ENTRY) = htu_entry; -#endif -} - -static INLINE void init_tx_tables(void) -{ - int i; - struct wtx_queue_config wtx_queue_config = {0}; - struct wtx_dma_channel_config wtx_dma_channel_config = {0}; - struct wtx_port_config wtx_port_config = { res1: 0, - qid: 0, - qsben: 1}; - - /* - * General Registers - */ - *CFG_WTX_DCHNUM = MAX_TX_DMA_CHANNEL_NUMBER; - *WTX_DMACH_ON = ((1 << MAX_TX_DMA_CHANNEL_NUMBER) - 1) ^ ((1 << FIRST_QSB_QID) - 1); - *CFG_WRDES_DELAY = write_descriptor_delay; - - /* - * WTX Port Configuration Table - */ - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) - *WTX_PORT_CONFIG(i) = wtx_port_config; - - /* - * WTX Queue Configuration Table - */ - wtx_queue_config.qsben = 1; - wtx_queue_config.sbid = 0; - for ( i = 0; i < MAX_TX_DMA_CHANNEL_NUMBER; i++ ) { - wtx_queue_config.qsb_vcid = i; - *WTX_QUEUE_CONFIG(i) = wtx_queue_config; - } - - /* - * WTX DMA Channel Configuration Table - */ - wtx_dma_channel_config.mode = 0; - wtx_dma_channel_config.deslen = 0; - wtx_dma_channel_config.desba = 0; - for ( i = 0; i < FIRST_QSB_QID; i++ ) - *WTX_DMA_CHANNEL_CONFIG(i) = wtx_dma_channel_config; - /* normal connection */ - wtx_dma_channel_config.deslen = dma_tx_descriptor_length; - for ( ; i < MAX_TX_DMA_CHANNEL_NUMBER ; i++ ) { - wtx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.conn[i - FIRST_QSB_QID].tx_desc >> 2) & 0x0FFFFFFF; - *WTX_DMA_CHANNEL_CONFIG(i) = wtx_dma_channel_config; - } -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -static int atm_showtime_enter(struct port_cell_info *port_cell, void *xdata_addr) -{ - int i, j; - - ASSERT(port_cell != NULL, "port_cell is NULL"); - ASSERT(xdata_addr != NULL, "xdata_addr is NULL"); - - for ( j = 0; j < ATM_PORT_NUMBER && j < port_cell->port_num; j++ ) - if ( port_cell->tx_link_rate[j] > 0 ) - break; - for ( i = 0; i < ATM_PORT_NUMBER && i < port_cell->port_num; i++ ) - g_atm_priv_data.port[i].tx_max_cell_rate = port_cell->tx_link_rate[i] > 0 ? port_cell->tx_link_rate[i] : port_cell->tx_link_rate[j]; - - qsb_global_set(); - - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) - if ( g_atm_priv_data.conn[i].vcc != NULL ) - set_qsb(g_atm_priv_data.conn[i].vcc, &g_atm_priv_data.conn[i].vcc->qos, i); - - // TODO: ReTX set xdata_addr - g_xdata_addr = xdata_addr; - - g_showtime = 1; - -#if defined(CONFIG_VR9) - IFX_REG_W32(0x0F, UTP_CFG); -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - if ( !timer_pending(&g_retx_polling_timer) ) { - g_retx_polling_cnt = HZ; - g_retx_polling_timer.expires = jiffies + RETX_POLLING_INTERVAL; - add_timer(&g_retx_polling_timer); - } -#endif - - //printk("enter showtime, cell rate: 0 - %d, 1 - %d, xdata addr: 0x%08x\n", g_atm_priv_data.port[0].tx_max_cell_rate, g_atm_priv_data.port[1].tx_max_cell_rate, (unsigned int)g_xdata_addr); - - return IFX_SUCCESS; -} - -static int atm_showtime_exit(void) -{ - if ( !g_showtime ) - return IFX_ERROR; - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - RETX_MODE_CFG->retx_en = 0; // disable ReTX - del_timer(&g_retx_polling_timer); -#endif - -#if defined(CONFIG_VR9) - IFX_REG_W32(0x00, UTP_CFG); -#endif - - g_showtime = 0; - - // TODO: ReTX clean state - g_xdata_addr = NULL; - - printk("leave showtime\n"); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Init/Cleanup API - * #################################### - */ - -/* - * Description: - * Initialize global variables, PP32, comunication structures, register IRQ - * and register device. - * Input: - * none - * Output: - * 0 --- successful - * else --- failure, usually it is negative value of error code - */ -static int __devinit ifx_atm_init(void) -{ - int ret; - int port_num; - struct port_cell_info port_cell = {0}; - int i, j; - char ver_str[256]; - - check_parameters(); - - ret = init_priv_data(); - if ( ret != IFX_SUCCESS ) { - err("INIT_PRIV_DATA_FAIL"); - goto INIT_PRIV_DATA_FAIL; - } - - ifx_atm_init_chip(); - init_rx_tables(); - init_tx_tables(); - - /* create devices */ - for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ ) { -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) - g_atm_priv_data.port[port_num].dev = atm_dev_register("ifxmips_atm", &g_ifx_atm_ops, -1, NULL); -#else - g_atm_priv_data.port[port_num].dev = atm_dev_register("ifxmips_atm", NULL, &g_ifx_atm_ops, -1, NULL); -#endif - - if ( !g_atm_priv_data.port[port_num].dev ) { - err("failed to register atm device %d!", port_num); - ret = -EIO; - goto ATM_DEV_REGISTER_FAIL; - } - else { - g_atm_priv_data.port[port_num].dev->ci_range.vpi_bits = 8; - g_atm_priv_data.port[port_num].dev->ci_range.vci_bits = 16; - g_atm_priv_data.port[port_num].dev->link_rate = g_atm_priv_data.port[port_num].tx_max_cell_rate; - g_atm_priv_data.port[port_num].dev->dev_data = (void*)port_num; - } - } - - /* register interrupt handler */ - ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "atm_mailbox_isr", &g_atm_priv_data); - if ( ret ) { - if ( ret == -EBUSY ) { - err("IRQ may be occupied by other driver, please reconfig to disable it."); - } - else { - err("request_irq fail"); - } - goto REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL; - } - disable_irq(PPE_MAILBOX_IGU1_INT); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - init_atm_tc_retrans_param(); - - init_timer(&g_retx_polling_timer); - g_retx_polling_timer.function = retx_polling_func; -#endif - - ret = ifx_pp32_start(0); - if ( ret ) { - err("ifx_pp32_start fail!"); - goto PP32_START_FAIL; - } - - port_cell.port_num = ATM_PORT_NUMBER; - if( !IS_ERR(&ifx_mei_atm_showtime_check) && &ifx_mei_atm_showtime_check) - ifx_mei_atm_showtime_check(&g_showtime, &port_cell, &g_xdata_addr); - if ( g_showtime ) { - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) - if ( port_cell.tx_link_rate[i] != 0 ) - break; - for ( j = 0; j < ATM_PORT_NUMBER; j++ ) - g_atm_priv_data.port[j].tx_max_cell_rate = port_cell.tx_link_rate[j] != 0 ? port_cell.tx_link_rate[j] : port_cell.tx_link_rate[i]; - } - - qsb_global_set(); - validate_oam_htu_entry(); - -#if 0 /*defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK*/ - ifx_led_trigger_register("dsl_data", &g_data_led_trigger); -#endif - - /* create proc file */ - proc_file_create(); - - if( !IS_ERR(&ifx_mei_atm_showtime_enter) && &ifx_mei_atm_showtime_enter ) - ifx_mei_atm_showtime_enter = atm_showtime_enter; - - if( !IS_ERR(&ifx_mei_atm_showtime_exit) && !ifx_mei_atm_showtime_exit ) - ifx_mei_atm_showtime_exit = atm_showtime_exit; - - ifx_atm_version(ver_str); - printk(KERN_INFO "%s", ver_str); - - printk("ifxmips_atm: ATM init succeed\n"); - - return IFX_SUCCESS; - -PP32_START_FAIL: - free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); -REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL: -ATM_DEV_REGISTER_FAIL: - while ( port_num-- > 0 ) - atm_dev_deregister(g_atm_priv_data.port[port_num].dev); -INIT_PRIV_DATA_FAIL: - clear_priv_data(); - printk("ifxmips_atm: ATM init failed\n"); - return ret; -} - -/* - * Description: - * Release memory, free IRQ, and deregister device. - * Input: - * none - * Output: - * none - */ -static void __exit ifx_atm_exit(void) -{ - int port_num; - - if( !IS_ERR(&ifx_mei_atm_showtime_enter) && &ifx_mei_atm_showtime_enter ) - ifx_mei_atm_showtime_enter = NULL; - if( !IS_ERR(&ifx_mei_atm_showtime_exit) && !ifx_mei_atm_showtime_exit ) - ifx_mei_atm_showtime_exit = NULL; - - proc_file_delete(); - -#if 0 /*defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK*/ - ifx_led_trigger_deregister(g_data_led_trigger); - g_data_led_trigger = NULL; -#endif - - invalidate_oam_htu_entry(); - - ifx_pp32_stop(0); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - del_timer(&g_retx_polling_timer); - clear_atm_tc_retrans_param(); -#endif - - free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); - - for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ ) - atm_dev_deregister(g_atm_priv_data.port[port_num].dev); - - ifx_atm_uninit_chip(); - - clear_priv_data(); -} - -module_init(ifx_atm_init); -module_exit(ifx_atm_exit); -MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/system/ltq-dsl/src/ifxmips_atm_danube.c b/package/system/ltq-dsl/src/ifxmips_atm_danube.c deleted file mode 100644 index 64698b8792..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_danube.c +++ /dev/null @@ -1,326 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_danube.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <linux/clk.h> -#include <asm/delay.h> - -/* - * Chip Specific Head File - */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" -#include "ifxmips_atm_core.h" -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - #include "ifxmips_atm_fw_danube_retx.h" -#else - #include "ifxmips_atm_fw_danube.h" -#endif - -/* - * #################################### - * Definition - * #################################### - */ - -/* - * EMA Settings - */ -#define EMA_CMD_BUF_LEN 0x0040 -#define EMA_CMD_BASE_ADDR (0x00001580 << 2) -#define EMA_DATA_BUF_LEN 0x0100 -#define EMA_DATA_BASE_ADDR (0x00001900 << 2) -#define EMA_WRITE_BURST 0x2 -#define EMA_READ_BURST 0x2 - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Hardware Init/Uninit Functions - */ -static inline void init_pmu(void); -static inline void uninit_pmu(void); -static inline void reset_ppe(void); -static inline void init_ema(void); -static inline void init_mailbox(void); -static inline void init_atm_tc(void); -static inline void clear_share_buffer(void); - - - -/* - * #################################### - * Local Variable - * #################################### - */ - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static inline void init_pmu(void) -{ - //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); - //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); -/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_enable(clk); -} - -static inline void uninit_pmu(void) -{ -/* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/ - //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_disable(clk); -} - -static inline void reset_ppe(void) -{ -#if 0 //def MODULE - unsigned int etop_cfg; - unsigned int etop_mdio_cfg; - unsigned int etop_ig_plen_ctrl; - unsigned int enet_mac_cfg; - - etop_cfg = *IFX_PP32_ETOP_CFG; - etop_mdio_cfg = *IFX_PP32_ETOP_MDIO_CFG; - etop_ig_plen_ctrl = *IFX_PP32_ETOP_IG_PLEN_CTRL; - enet_mac_cfg = *IFX_PP32_ENET_MAC_CFG; - - *IFX_PP32_ETOP_CFG &= ~0x03C0; - - // reset PPE - ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); - - *IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg; - *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl; - *IFX_PP32_ENET_MAC_CFG = enet_mac_cfg; - *IFX_PP32_ETOP_CFG = etop_cfg; -#endif -} - -static inline void init_ema(void) -{ - IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG); - IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG); - IFX_REG_W32(0x000000FF, EMA_IER); - IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG); -} - -static inline void init_mailbox(void) -{ - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU1_IER); - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU3_IER); -} - -static inline void init_atm_tc(void) -{ - IFX_REG_W32(0x0000, DREG_AT_CTRL); - IFX_REG_W32(0x0000, DREG_AR_CTRL); - IFX_REG_W32(0x0, DREG_AT_IDLE0); - IFX_REG_W32(0x0, DREG_AT_IDLE1); - IFX_REG_W32(0x0, DREG_AR_IDLE0); - IFX_REG_W32(0x0, DREG_AR_IDLE1); - IFX_REG_W32(0x40, RFBI_CFG); - IFX_REG_W32(0x1600, SFSM_DBA0); - IFX_REG_W32(0x1718, SFSM_DBA1); - IFX_REG_W32(0x1830, SFSM_CBA0); - IFX_REG_W32(0x1844, SFSM_CBA1); - IFX_REG_W32(0x14014, SFSM_CFG0); - IFX_REG_W32(0x14014, SFSM_CFG1); - IFX_REG_W32(0x1858, FFSM_DBA0); - IFX_REG_W32(0x18AC, FFSM_DBA1); - IFX_REG_W32(0x10006, FFSM_CFG0); - IFX_REG_W32(0x10006, FFSM_CFG1); - IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC0); - IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC1); -} - -static inline void clear_share_buffer(void) -{ - volatile u32 *p = SB_RAM0_ADDR(0); - unsigned int i; - - for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ ) - IFX_REG_W32(0, p++); -} - -/* - * Description: - * Download PPE firmware binary code. - * Input: - * src --- u32 *, binary code buffer - * dword_len --- unsigned int, binary code length in DWORD (32-bit) - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) -{ - volatile u32 *dest; - - if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 - || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; - - if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) - IFX_REG_W32(0x00, CDM_CFG); - else - IFX_REG_W32(0x04, CDM_CFG); - - /* copy code */ - dest = CDM_CODE_MEMORY(0, 0); - while ( code_dword_len-- > 0 ) - IFX_REG_W32(*code_src++, dest++); - - /* copy data */ - dest = CDM_DATA_MEMORY(0, 0); - while ( data_dword_len-- > 0 ) - IFX_REG_W32(*data_src++, dest++); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) -{ - ASSERT(major != NULL, "pointer is NULL"); - ASSERT(minor != NULL, "pointer is NULL"); - -#if (defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX) || defined(VER_IN_FIRMWARE) - *major = FW_VER_ID->major; - *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif -} - -void ifx_atm_init_chip(void) -{ - init_pmu(); - - reset_ppe(); - - init_ema(); - - init_mailbox(); - - init_atm_tc(); - - clear_share_buffer(); -} - -void ifx_atm_uninit_chip(void) -{ - uninit_pmu(); -} - -/* - * Description: - * Initialize and start up PP32. - * Input: - * none - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -int ifx_pp32_start(int pp32) -{ - int ret; - - /* download firmware */ - ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) - return ret; - - /* run PP32 */ - IFX_REG_W32(DBG_CTRL_START_SET(1), PP32_DBG_CTRL); - - /* idle for a while to let PP32 init itself */ - udelay(10); - - return IFX_SUCCESS; -} - -/* - * Description: - * Halt PP32. - * Input: - * none - * Output: - * none - */ -void ifx_pp32_stop(int pp32) -{ - /* halt PP32 */ - IFX_REG_W32(DBG_CTRL_STOP_SET(1), PP32_DBG_CTRL); -} diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_amazon_se.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_amazon_se.h deleted file mode 100644 index 4daef9fd8c..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_amazon_se.h +++ /dev/null @@ -1,3335 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_AMAZON_SE_H -#define IFXMIPS_ATM_FW_AMAZON_SE_H - - -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_amazon_se.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PP32 Firmware) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - -#define ATM_FW_VER_MAJOR 0 -#define ATM_FW_VER_MINOR 1 - - -static unsigned int firmware_binary_code[] = { -0x80000ac0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x8000ffe0, -0x00000000, -0x00000000, -0x00000000, -0xc1000002, -0xd90c00f8, -0xc2000002, -0xda0800f9, -0x80004d48, -0xc2000000, -0xda0800f9, -0x800043b8, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80004370, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80005550, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80004270, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc0400000, -0xc0004840, -0xc88400f8, -0x80004a08, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc0400002, -0xc0004840, -0xc88400f8, -0x80004988, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc3c00004, -0xdbc800f9, -0xc10c0002, -0xd90c00f8, -0x8000fee0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc10e0002, -0xd90c00f8, -0xc0004808, -0xc84000f8, -0x800049b8, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003ff0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003f70, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003ef0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003e70, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003df0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, 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-0xdd8000f9, -0x58000008, -0x40180000, -0xcd400078, -0x59980002, -0x8000ff50, -0xdd5400f8, -0xdd8000f9, -0x58000008, -0x40180000, -0xcd400038, -0x59980002, -0x8000ff18, -0x00000000, -0x9d000000, -0x00000000, -0x00000000, -0x00000000, -0x58000012, -0xc94000f8, -0xc0004954, -0xc9c000f8, -0xc0004950, -0xc9400078, -0xdd8000f9, -0x58000028, -0x5d9c0000, -0x84000052, -0x5d9c0002, -0x84000052, -0x5d9c0004, -0x8400006a, -0xc55b0038, -0xc55c08b8, -0xcd800039, -0xcdc108b8, -0x80000060, -0xcd4000f8, -0x80000050, -0xc55900b8, -0xc55c1838, -0xcd8000b9, -0xcdc31838, -0x80000028, -0xc55a0078, -0xc55c1078, -0xcd800079, -0xcdc21078, -0x9d000000, -0x00000000, -0x00000000, -0x00000000, -0x59540002, -0x6994e018, -0x61c0c008, -0x4194a000, -0x5d940040, -0x88000012, -0xc59400f8, -0x9d000000, -0xcd4000f8, -0x00000000, -0x00000000, -0x9d000000, -0x4158a000, -0xcd4000f8, -0x00000000 -}; - -static unsigned int firmware_binary_data[] = { -}; - - -#endif // IFXMIPS_ATM_FW_AMAZON_SE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_danube.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_danube.h deleted file mode 100644 index 5239fce8c9..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_danube.h +++ /dev/null @@ -1,178 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_regs_danube.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (Firmware Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H -#define IFXMIPS_ATM_FW_REGS_DANUBE_H - - - -/* - * Host-PPE Communication Data Address Mapping - */ -#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001)) -#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ -#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ -#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ -#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ -#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ -#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */ -#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20)) -#define WRX_QUEUE_CONTEXT(i) ((struct wrx_queue_context*) SB_BUFFER(0x2504 + (i) * 20)) -#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7)) -#define WRX_DESC_CONTEXT(i) ((struct wrx_desc_context*) SB_BUFFER(0x2643 + (i) * 7)) -#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i))) -#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2710 + (i) * 27)) -#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2711 + (i) * 27)) -#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410)) -#if !defined(ENABLE_ATM_RETX) || !ENABLE_ATM_RETX - #define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2000 + (i))) - #define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2020 + (i))) - #define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2040 + (i))) -#else - #define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2020 + (i))) - #define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2040 + (i))) - #define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2060 + (i))) -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - - #define RETX_MODE_CFG ((volatile struct Retx_mode_cfg *) SB_BUFFER(0x2408)) - #define RETX_TSYNC_CFG ((volatile struct Retx_Tsync_cfg *) SB_BUFFER(0x2409)) - #define RETX_TD_CFG ((volatile struct Retx_Td_cfg *) SB_BUFFER(0x240A)) - #define RETX_MIB_TIMER_CFG ((volatile struct Retx_MIB_Timer_cfg *) SB_BUFFER(0x240B)) - #define RETX_PLAYOUT_BUFFER_BASE SB_BUFFER(0x240D) - #define RETX_SERVICE_HEADER_CFG SB_BUFFER(0x240E) - #define RETX_MASK_HEADER_CFG SB_BUFFER(0x240F) - - #define RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) PPE_REG_ADDR(0x0D78)) - #define BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AC)) - #define FIRST_BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AE)) - - #define PB_BUFFER_USAGE SB_BUFFER(0x2100) - #define DTU_STAT_INFO ((volatile struct DTU_stat_info *) SB_BUFFER(0x2180)) - #define DTU_VLD_STAT SB_BUFFER(0x2380) - - - //===================================================================== - // retx firmware mib, for debug purpose - // address : 0x2388 - 0x238F - // size : 8 - //===================================================================== - #define URETX_RX_TOTAL_DTU SB_BUFFER(0x2388) - #define URETX_RX_BAD_DTU SB_BUFFER(0x2389) - #define URETX_RX_GOOD_DTU SB_BUFFER(0x238A) - #define URETX_RX_CORRECTED_DTU SB_BUFFER(0x238B) - #define URETX_RX_OUTOFDATE_DTU SB_BUFFER(0x238C) - #define URETX_RX_DUPLICATE_DTU SB_BUFFER(0x238D) - #define URETX_RX_TIMEOUT_DTU SB_BUFFER(0x238E) - - #define URETX_ALPHA_SWITCH_TO_HUNT_TIMES SB_BUFFER(0x238F) - - // cell counter for debug purpose - #define WRX_BC0_CELL_NUM SB_BUFFER(0x23E0) - #define WRX_BC0_DROP_CELL_NUM SB_BUFFER(0x23E1) - #define WRX_BC0_NONRETX_CELL_NUM SB_BUFFER(0x23E2) - #define WRX_BC0_RETX_CELL_NUM SB_BUFFER(0x23E3) - #define WRX_BC0_OUTOFDATE_CELL_NUM SB_BUFFER(0x23E4) - #define WRX_BC0_DIRECTUP_NUM SB_BUFFER(0x23E5) - #define WRX_BC0_PBW_TOTAL_NUM SB_BUFFER(0x23E6) - #define WRX_BC0_PBW_SUCC_NUM SB_BUFFER(0x23E7) - #define WRX_BC0_PBW_FAIL_NUM SB_BUFFER(0x23E8) - #define WRX_BC1_CELL_NUM SB_BUFFER(0x23E9) - - // debug info (interface) - - #define DBG_DTU_INTF_WRPTR SB_BUFFER(0x2390) - #define DBG_INTF_FCW_DUP_CNT SB_BUFFER(0x2391) - #define DBG_INTF_SID_CHANGE_IN_DTU_CNT SB_BUFFER(0x2392) - #define DBG_INTF_LCW_DUP_CNT SB_BUFFER(0x2393) - - #define DBG_RFBI_DONE_INT_CNT SB_BUFFER(0x2394) - #define DBG_DREG_BEG_END SB_BUFFER(0x2395) - #define DBG_RFBI_BC0_INVALID_CNT SB_BUFFER(0x2396) - #define DBG_RFBI_LAST_T SB_BUFFER(0x2397) - - #define DBG_RFBI_INTV0 SB_BUFFER(0x23EE) - #define DBG_RFBI_INTV1 SB_BUFFER(0x23EF) - - #define DBG_INTF_INFO(i) ((volatile struct Retx_adsl_ppe_intf_rec *) SB_BUFFER(0x23F0 + i)) - - // Internal status - #define URetx_curr_time SB_BUFFER(0x2398) - #define URetx_sec_counter SB_BUFFER(0x2399) - #define RxCURR_EFB SB_BUFFER(0x239A) - #define RxDTURetransmittedCNT SB_BUFFER(0x239B) - - //===================================================================== - // standardized MIB counter - // address : 0x239C - 0x239F - // size : 4 - //===================================================================== - #define RxLastEFBCNT SB_BUFFER(0x239C) - #define RxDTUCorrectedCNT SB_BUFFER(0x239D) - #define RxDTUCorruptedCNT SB_BUFFER(0x239E) - #define RxRetxDTUUncorrectedCNT SB_BUFFER(0x239F) - - - //===================================================================== - // General URetx Context - // address : 0x23A0 - 0x23AF - // size : 16 - //===================================================================== - #define NEXT_DTU_SID_OUT SB_BUFFER(0x23A0) - #define LAST_DTU_SID_IN SB_BUFFER(0x23A1) - #define NEXT_CELL_SID_OUT SB_BUFFER(0x23A2) - #define ISR_CELL_ID SB_BUFFER(0x23A3) - #define PB_CELL_SEARCH_IDX SB_BUFFER(0x23A4) - #define PB_READ_PEND_FLAG SB_BUFFER(0x23A5) - #define RFBI_FIRST_CW SB_BUFFER(0x23A6) - #define RFBI_BAD_CW SB_BUFFER(0x23A7) - #define RFBI_INVALID_CW SB_BUFFER(0x23A8) - #define RFBI_RETX_CW SB_BUFFER(0x23A9) - #define RFBI_CHK_DTU_STATUS SB_BUFFER(0x23AA) - - //===================================================================== - // per PVC counter for RX error_pdu and correct_pdu - // address : 0x23B0 - 0x23CF - // size : 32 - //===================================================================== - #define WRX_PER_PVC_CORRECT_PDU_BASE SB_BUFFER(0x23B0) - #define WRX_PER_PVC_ERROR_PDU_BASE SB_BUFFER(0x23C0) - - #define __WRXCTXT_L2_RdPtr(i) SB_BUFFER(0x2422 + (i)) - #define __WRXCTXT_L2Pages(i) SB_BUFFER(0x2424 + (i)) - - #define __WTXCTXT_TC_WRPTR(i) SB_BUFFER(0x2450 + (i)) - #define __WRXCTXT_PortState(i) SB_BUFFER(0x242A + (i)) - -#endif - - - -#endif // IFXMIPS_ATM_FW_REGS_DANUBE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_vr9.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_vr9.h deleted file mode 100644 index edefe92d25..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_vr9.h +++ /dev/null @@ -1,59 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_regs_vr9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (Firmware Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_FW_REGS_VR9_H -#define IFXMIPS_ATM_FW_REGS_VR9_H - - - -/* - * Host-PPE Communication Data Address Mapping - */ -#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001)) -#define CFG_WRX_HTUTS SB_BUFFER(0x2010) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ -#define CFG_WRX_QNUM SB_BUFFER(0x2011) /* WAN RX Queue Number */ -#define CFG_WRX_DCHNUM SB_BUFFER(0x2012) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ -#define CFG_WTX_DCHNUM SB_BUFFER(0x2013) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ -#define CFG_WRDES_DELAY SB_BUFFER(0x2014) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ -#define WRX_DMACH_ON SB_BUFFER(0x2015) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WTX_DMACH_ON SB_BUFFER(0x2016) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WRX_HUNT_BITTH SB_BUFFER(0x2017) /* WAN RX HUNT Threshold, must be between 2 to 8. */ -#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x4C00 + (i) * 20)) /* i < 16 */ -#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x4F80 + (i) * 7)) /* i < 8 */ -#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x4FB8 + (i))) /* i < 2 */ -#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x3A00 + (i) * 27)) /* i < 16 */ -#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x3A01 + (i) * 27)) /* i < 16 */ -#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x4EF0)) -#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x26A0 + (i))) /* i < 32 */ -#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x26C0 + (i))) /* i < 32 */ -#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x26E0 + (i))) /* i < 32 */ - -#define UTP_CFG SB_BUFFER(0x2018) // bit 0~3 - 0x0F: in showtime, 0x00: not in showtime - - - -#endif // IFXMIPS_ATM_FW_REGS_VR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_vr9.c b/package/system/ltq-dsl/src/ifxmips_atm_vr9.c deleted file mode 100644 index ea84c4c83f..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_vr9.c +++ /dev/null @@ -1,303 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_vr9.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <asm/delay.h> - -/* - * Chip Specific Head File - */ -#include <ifx_types.h> -#include <ifx_regs.h> -#include <common_routines.h> -#include <ifx_pmu.h> -#include <ifx_rcu.h> -#include "ifxmips_atm_core.h" -#include "ifxmips_atm_fw_vr9.h" - - - -/* - * #################################### - * Definition - * #################################### - */ - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Hardware Init/Uninit Functions - */ -static inline void init_pmu(void); -static inline void uninit_pmu(void); -static inline void reset_ppe(void); -static inline void init_pdma(void); -static inline void init_mailbox(void); -static inline void init_atm_tc(void); -static inline void clear_share_buffer(void); - - - -/* - * #################################### - * Local Variable - * #################################### - */ - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static inline void init_pmu(void) -{ - //*PMU_PWDCR &= ~((1 << 29) | (1 << 22) | (1 << 21) | (1 << 19) | (1 << 18)); - //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); - PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE); -} - -static inline void uninit_pmu(void) -{ - PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE); - //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); -} - -static inline void reset_ppe(void) -{ -#ifdef MODULE - // reset PPE - ifx_rcu_rst(IFX_RCU_DOMAIN_DSLDFE, IFX_RCU_MODULE_ATM); - udelay(1000); - ifx_rcu_rst(IFX_RCU_DOMAIN_DSLTC, IFX_RCU_MODULE_ATM); - udelay(1000); - ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); - udelay(1000); - *PP32_SRST &= ~0x000303CF; - udelay(1000); - *PP32_SRST |= 0x000303CF; - udelay(1000); -#endif -} - -static inline void init_pdma(void) -{ - IFX_REG_W32(0x08, PDMA_CFG); - IFX_REG_W32(0x00203580, SAR_PDMA_RX_CMDBUF_CFG); - IFX_REG_W32(0x004035A0, SAR_PDMA_RX_FW_CMDBUF_CFG); -} - -static inline void init_mailbox(void) -{ - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU1_IER); - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU3_IER); -} - -static inline void init_atm_tc(void) -{ - /* clear sync state */ - *SFSM_STATE0 = 0; - *SFSM_STATE1 = 0; - - /* enable keep IDLE */ -// *SFSM_CFG0 |= 1 << 15; -// *SFSM_CFG1 |= 1 << 15; -} - -static inline void clear_share_buffer(void) -{ - volatile u32 *p; - unsigned int i; - - p = SB_RAM0_ADDR(0); - for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ ) - IFX_REG_W32(0, p++); - - p = SB_RAM6_ADDR(0); - for ( i = 0; i < SB_RAM6_DWLEN; i++ ) - IFX_REG_W32(0, p++); -} - -/* - * Description: - * Download PPE firmware binary code. - * Input: - * pp32 --- int, which pp32 core - * src --- u32 *, binary code buffer - * dword_len --- unsigned int, binary code length in DWORD (32-bit) - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -static inline int pp32_download_code(int pp32, u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) -{ - unsigned int clr, set; - volatile u32 *dest; - - if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 - || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; - - clr = pp32 ? 0xF0 : 0x0F; - if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) - set = pp32 ? (3 << 6): (2 << 2); - else - set = 0x00; - IFX_REG_W32_MASK(clr, set, CDM_CFG); - - /* copy code */ - dest = CDM_CODE_MEMORY(pp32, 0); - while ( code_dword_len-- > 0 ) - IFX_REG_W32(*code_src++, dest++); - - /* copy data */ - dest = CDM_DATA_MEMORY(pp32, 0); - while ( data_dword_len-- > 0 ) - IFX_REG_W32(*data_src++, dest++); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) -{ - ASSERT(major != NULL, "pointer is NULL"); - ASSERT(minor != NULL, "pointer is NULL"); - -#ifdef VER_IN_FIRMWARE - *major = FW_VER_ID->major; - *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif -} - -void ifx_atm_init_chip(void) -{ - init_pmu(); - - reset_ppe(); - - init_pdma(); - - init_mailbox(); - - init_atm_tc(); - - clear_share_buffer(); -} - -void ifx_atm_uninit_chip(void) -{ - uninit_pmu(); -} - -/* - * Description: - * Initialize and start up PP32. - * Input: - * none - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -int ifx_pp32_start(int pp32) -{ - unsigned int mask = 1 << (pp32 << 4); - int ret; - - /* download firmware */ - ret = pp32_download_code(pp32, firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) - return ret; - - /* run PP32 */ - IFX_REG_W32_MASK(mask, 0, PP32_FREEZE); - - /* idle for a while to let PP32 init itself */ - udelay(10); - - return IFX_SUCCESS; -} - -/* - * Description: - * Halt PP32. - * Input: - * none - * Output: - * none - */ -void ifx_pp32_stop(int pp32) -{ - unsigned int mask = 1 << (pp32 << 4); - - /* halt PP32 */ - IFX_REG_W32_MASK(0, mask, PP32_FREEZE); -} diff --git a/package/system/ltq-dsl/src/ifxmips_compat.h b/package/system/ltq-dsl/src/ifxmips_compat.h deleted file mode 100644 index b0c9f25f48..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_compat.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef _IFXMIPS_COMPAT_H__ -#define _IFXMIPS_COMPAT_H__ - -#define IFX_SUCCESS 0 -#define IFX_ERROR (-1) - -#define ATM_VBR_NRT ATM_VBR -#define ATM_VBR_RT 6 -#define ATM_UBR_PLUS 7 -#define ATM_GFR 8 - -#define NUM_ENTITY(x) (sizeof(x) / sizeof(*(x))) - -#define SET_BITS(x, msb, lsb, value) \ - (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb))) - - -#define IFX_PP32_ETOP_CFG 0x16020 -#define IFX_PP32_ETOP_MDIO_CFG 0x11804 -#define IFX_PP32_ETOP_IG_PLEN_CTRL 0x16080 -#define IFX_PP32_ENET_MAC_CFG 0x1840 - -#define IFX_RCU_DOMAIN_PPE (1 << 8) -#define IFX_RCU_MODULE_ATM - -#define IFX_PMU_ENABLE 1 -#define IFX_PMU_DISABLE 0 - -#define IFX_PMU_MODULE_DSL_DFE (1 << 9) -#define IFX_PMU_MODULE_AHBS (1 << 13) -#define IFX_PMU_MODULE_PPE_QSB (1 << 18) -#define IFX_PMU_MODULE_PPE_SLL01 (1 << 19) -#define IFX_PMU_MODULE_PPE_TC (1 << 21) -#define IFX_PMU_MODULE_PPE_EMA (1 << 22) -#define IFX_PMU_MODULE_PPE_TOP (1 << 29) - -extern void ltq_pmu_enable(unsigned int module); -extern void ltq_pmu_disable(unsigned int module); - -#define ifx_pmu_set(a,b) {if(a == IFX_PMU_ENABLE) ltq_pmu_enable(b); else ltq_pmu_disable(b);} - -#define PPE_TOP_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x)) -#define PPE_SLL01_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_SLL01, (__x)) -#define PPE_TC_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TC, (__x)) -#define PPE_EMA_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_EMA, (__x)) -#define PPE_QSB_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_QSB, (__x)) -#define PPE_TPE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_AHBS, (__x)) -#define DSL_DFE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_DSL_DFE, (__x)) - -#define IFX_REG_W32(_v, _r) __raw_writel((_v), (_r)) - -#define CONFIG_IFXMIPS_DSL_CPE_MEI y - -#define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24) - -#endif |