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author | Christian Lamparter <chunkeey@gmail.com> | 2019-02-26 16:22:27 +0100 |
---|---|---|
committer | Christian Lamparter <chunkeey@gmail.com> | 2019-02-28 11:26:11 +0100 |
commit | 18e942b6c4e51a5a717a121697a63f3f98d93b19 (patch) | |
tree | b1370bdf6417475abba7d2d3a722a7ca2d29738b | |
parent | 46b949a067e5babcd9a554c84599a277ce13d822 (diff) | |
download | upstream-18e942b6c4e51a5a717a121697a63f3f98d93b19.tar.gz upstream-18e942b6c4e51a5a717a121697a63f3f98d93b19.tar.bz2 upstream-18e942b6c4e51a5a717a121697a63f3f98d93b19.zip |
ipq40xx: fix pcie msi IRQ trigger level
From: Niklas Cassel <niklas.cassel@linaro.org>
|The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level
|triggered interrupt.
|
|The msi_ctrl_int will be high for as long as any MSI status bit is set,
|thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the
|IRQ handler to keep getting called, as long as any MSI status bit is set.
|[...]
|Not having the correct IRQ type defined will cause us to lose interrupts,
|which in turn causes timeouts in the PCIe endpoint drivers.
|
|Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
|Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
-rw-r--r-- | target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch | 32 | ||||
-rw-r--r-- | target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch | 32 |
2 files changed, 64 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch b/target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch new file mode 100644 index 0000000000..44cc725052 --- /dev/null +++ b/target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch @@ -0,0 +1,32 @@ +From: Niklas Cassel <niklas.cassel@linaro.org> +Subject: [PATCH] ARM: dts: qcom: ipq4019: Fix MSI IRQ type +Date: Thu, 24 Jan 2019 14:00:47 +0100 + +The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level +triggered interrupt. + +The msi_ctrl_int will be high for as long as any MSI status bit is set, +thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the +IRQ handler to keep getting called, as long as any MSI status bit is set. + +A git grep shows that ipq4019 is the only SoC using snps,dw-pcie that has +configured this IRQ incorrectly. + +Not having the correct IRQ type defined will cause us to lose interrupts, +which in turn causes timeouts in the PCIe endpoint drivers. + +Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> +Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> +--- + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -400,7 +400,7 @@ + ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, + <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>; + +- interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>; ++ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; diff --git a/target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch b/target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch new file mode 100644 index 0000000000..7864ef7fdf --- /dev/null +++ b/target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch @@ -0,0 +1,32 @@ +From: Niklas Cassel <niklas.cassel@linaro.org> +Subject: [PATCH] ARM: dts: qcom: ipq4019: Fix MSI IRQ type +Date: Thu, 24 Jan 2019 14:00:47 +0100 + +The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level +triggered interrupt. + +The msi_ctrl_int will be high for as long as any MSI status bit is set, +thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the +IRQ handler to keep getting called, as long as any MSI status bit is set. + +A git grep shows that ipq4019 is the only SoC using snps,dw-pcie that has +configured this IRQ incorrectly. + +Not having the correct IRQ type defined will cause us to lose interrupts, +which in turn causes timeouts in the PCIe endpoint drivers. + +Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> +Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> +--- + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -404,7 +404,7 @@ + ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, + <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>; + +- interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>; ++ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; |