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authorFelix Fietkau <nbd@openwrt.org>2014-10-07 10:37:09 +0000
committerFelix Fietkau <nbd@openwrt.org>2014-10-07 10:37:09 +0000
commit0563e0225e6db1328ed17a0e4bd0aecb5047304a (patch)
tree8fd2eca06506a84a2de5baa4420192c535c7c74f
parentb9d3767ada27b9177f6a7ed9f33ab2b2c8fde704 (diff)
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cns3xxx: fix register for enabling MMC/SD pins
also fixes a GPIO related regression from the upgrade to 3.10 Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 42829
-rw-r--r--target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c
index 9021f3d65f..d61dad9b81 100644
--- a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c
+++ b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c
@@ -818,8 +818,7 @@ static void __init laguna_init(void)
*reg |= BIT(12) | BIT(13);
/* Enable MMC/SD pins */
- reg = MISC_GPIOA_PIN_ENABLE_REG;
- *reg |= 0xf80;
+ *reg |= BIT(7) | BIT(8) | BIT(9) | BIT(10) | BIT(11);
cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C);
cns3xxx_pwr_power_up(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C);