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authorMathias Kresin <dev@kresin.me>2018-11-01 23:11:40 +0100
committerMathias Kresin <dev@kresin.me>2018-11-26 15:54:22 +0100
commit71ba834cf1a1c8fcbf345b7efa75de0dcba9db20 (patch)
treef0990ab44f62da87ea3094bb607e285b3af32033
parentd6ce04dad8b136f10eadd83ef10fb1adcbd465c6 (diff)
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ramips: add Sanlinking Technologies D240 pinmux quirk
The sd function of the nd_sd group configures two of the groups pins as gpios. The pins are used as PCIe reset/power. Due to the driver load order, the pins are configured way to late if triggered by the sd-card driver. To not introduce another kind of driver load order dependency and configure the pins as early as possible, means during pinmux driver load. Signed-off-by: Mathias Kresin <dev@kresin.me>
-rw-r--r--target/linux/ramips/dts/D240.dts16
1 files changed, 16 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/D240.dts b/target/linux/ramips/dts/D240.dts
index 134ebdda55..576f3caf30 100644
--- a/target/linux/ramips/dts/D240.dts
+++ b/target/linux/ramips/dts/D240.dts
@@ -156,6 +156,8 @@
&sdhci {
status = "okay";
+ /* the pins function is already set during pinmux driver load */
+ /delete-property/ pinctrl-0;
};
&ehci {
@@ -181,6 +183,20 @@
ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
ralink,function = "gpio";
};
+
+ /*
+ * The sd function of the nd_sd group configures two of the
+ * groups pins as gpios. The pins are used as PCIe reset/power.
+ * Due to the driver load order, the pins are configured way to
+ * late if triggered by the sd-card driver.
+ * To not introduce another kind of driver load order
+ * dependency and configure the pins as early as possible,
+ * means during pinmux driver load.
+ */
+ gpio_sd {
+ ralink,group = "nd_sd";
+ ralink,function = "sd";
+ };
};
};