diff options
| author | David Bauer <mail@david-bauer.net> | 2021-04-15 00:30:24 +0200 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-04-18 12:04:56 +0200 |
| commit | 8437c24f0976596a0eb1c7d19d0f5262df06312f (patch) | |
| tree | 0deb05c39199131d9bb532503846d70b14df3295 | |
| parent | f33139c4d5f4b616ca9439ed1390dd2049245333 (diff) | |
| download | upstream-8437c24f0976596a0eb1c7d19d0f5262df06312f.tar.gz upstream-8437c24f0976596a0eb1c7d19d0f5262df06312f.tar.bz2 upstream-8437c24f0976596a0eb1c7d19d0f5262df06312f.zip | |
ath79: fix 10 Mbit PLL data for TP-Link EAP2xx
Fix the PLL register value for 10 Mbit/s link modes on TP-Link EAP
boards using a AR8033 SGMII PHY.
Otherwise, 10 Mbit/s links do not transfer data.
Reported-by: Tom Herbers <freifunk@tomherbers.de>
Tested-by: Tom Herbers <freifunk@tomherbers.de>
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit bbff6239e2ea273388f4ca0f8586945ff5f36271)
| -rw-r--r-- | target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi index cc9e0b7ff6..a6aefc7b55 100644 --- a/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi +++ b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi @@ -112,6 +112,7 @@ phy-handle = <&phy4>; phy-mode = "sgmii"; + pll-data = <0x03000000 0x00000101 0x00001313>; mtd-mac-address = <&info 0x8>; |