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| author | John Crispin <john@openwrt.org> | 2015-12-23 18:24:56 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-12-23 18:24:56 +0000 |
| commit | e33aa710457b860f661869e0762b798ea8f73599 (patch) | |
| tree | 30e6b31e90bbfa39eba57a37fbcb68deb6f3b6b1 | |
| parent | 3af2cf661bb0d62bdab983874d659f08ff25e162 (diff) | |
| download | upstream-e33aa710457b860f661869e0762b798ea8f73599.tar.gz upstream-e33aa710457b860f661869e0762b798ea8f73599.tar.bz2 upstream-e33aa710457b860f661869e0762b798ea8f73599.zip | |
lantiq: TDW89x0 - increase spi frequency
Use the same max spi frequency as set in u-boot.
According to the datasheets, the Q64-104HIP as well as the Winbond
25Q64FVSIG support spi frequencies up to 50 MHz. During my tests, the
Q64-104HIP couldn't be recognized/initialized if the frequency
was > 40MHz.
Both chips do support fast read as well.
While touching the dts file, I fixed the dtc compiler warnings.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 47994
| -rw-r--r-- | target/linux/lantiq/dts/TDW89X0.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target/linux/lantiq/dts/TDW89X0.dtsi b/target/linux/lantiq/dts/TDW89X0.dtsi index cd3d6bdbbd..46ff11f547 100644 --- a/target/linux/lantiq/dts/TDW89X0.dtsi +++ b/target/linux/lantiq/dts/TDW89X0.dtsi @@ -16,12 +16,14 @@ interrupt-parent = <&icu0>; interrupts = <22 23 24>; #address-cells = <1>; + #size-cells = <1>; m25p80@0 { #address-cells = <1>; #size-cells = <1>; compatible = "jedec,spi-nor"; - reg = <3>; - spi-max-frequency = <20000000>; + reg = <3 0>; + spi-max-frequency = <33250000>; + m25p,fast-read; partition@0 { reg = <0x0 0x20000>; |