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authorBiwen Li <biwen.li@nxp.com>2018-11-02 18:30:57 +0800
committerHauke Mehrtens <hauke@hauke-m.de>2018-12-18 20:17:23 +0100
commit328530c6e7569d7be24e3524483f4453910003e9 (patch)
tree90ec1f99796fb88ebffb69380eb5adc0e60f34b8
parent0a827ebd2fa3c7dc210aff0a30d0dc1d536ed89c (diff)
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layerscape: add LS1021AIOT board support
The LS1021A-IoT gateway reference design based on the QorIQ LS1021A processor is a purpose-built, small footprint hardware platform with a wide array of high-speed connectivity and low-speed serial interfaces to support secure delivery of IoT services for home, business or other commercial location. - Combines standards-based, open source software with a feature-rich IoT gateway design to establish a common, open framework for secured IoT service delivery and management. - Provides a wide assortment of high-speed and serial-based connectivity in a compact, highly secure design. - High efficiency through the use of the Arm-based QorIQ LS1021A embedded processor. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com>
-rw-r--r--package/boot/uboot-layerscape/Makefile12
-rw-r--r--package/boot/uboot-layerscape/files/ls1021aiot-sdboot-uEnv.txt8
-rw-r--r--target/linux/layerscape/README4
-rw-r--r--target/linux/layerscape/image/armv7.mk16
-rw-r--r--target/linux/layerscape/patches-4.14/304-arm-dts-ls1021a-Add-LS1021A-IOT-board-support.patch289
5 files changed, 326 insertions, 3 deletions
diff --git a/package/boot/uboot-layerscape/Makefile b/package/boot/uboot-layerscape/Makefile
index 39dc6c76d1..911d9696e6 100644
--- a/package/boot/uboot-layerscape/Makefile
+++ b/package/boot/uboot-layerscape/Makefile
@@ -92,6 +92,15 @@ define U-Boot/ls1021atwr-sdboot
ENV_SIZE:=0x20000
endef
+define U-Boot/ls1021aiot-sdboot
+ NAME:=NXP LS1021AIOT SD Card Boot
+ BUILD_SUBTARGET:=armv7
+ UBOOT_CONFIG:=ls1021aiot_sdcard
+ UBOOT_IMAGE:=u-boot-with-spl-pbl.bin
+ ENV_SIZE:=0x2000
+endef
+
+
UBOOT_TARGETS := \
ls1012ardb \
ls1012afrwy \
@@ -103,7 +112,8 @@ UBOOT_TARGETS := \
ls1088ardb-sdboot \
ls2088ardb \
ls1021atwr \
- ls1021atwr-sdboot
+ ls1021atwr-sdboot \
+ ls1021aiot-sdboot
define Build/InstallDev
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
diff --git a/package/boot/uboot-layerscape/files/ls1021aiot-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/ls1021aiot-sdboot-uEnv.txt
new file mode 100644
index 0000000000..7772daa100
--- /dev/null
+++ b/package/boot/uboot-layerscape/files/ls1021aiot-sdboot-uEnv.txt
@@ -0,0 +1,8 @@
+fdtaddr=0x8f000000
+loadaddr=0x81000000
+fdt_high=0xffffffff
+initrd_high=0xffffffff
+sd_boot=mmc read ${fdtaddr} 7800 800;mmc read ${loadaddr} 8000 8000;bootm ${loadaddr} - ${fdtaddr}
+bootargs=root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 noinitrd earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200
+bootcmd=echo starting openwrt ...;run sd_boot
+bootdelay=3
diff --git a/target/linux/layerscape/README b/target/linux/layerscape/README
index 1aecf30ac5..5af20e1915 100644
--- a/target/linux/layerscape/README
+++ b/target/linux/layerscape/README
@@ -11,8 +11,8 @@ Layerscape Quick Start
LS1012ARDB LS1012AFRWY LS1043ARDB LS1046ARDB
* ARMv7
- LS1021ATWR
- (SD card boot support on LS1021ATWR)
+ LS1021ATWR LS1021AIOT
+ (SD card boot support on LS1021ATWR/LS1021AIOT)
2. Build
diff --git a/target/linux/layerscape/image/armv7.mk b/target/linux/layerscape/image/armv7.mk
index 7a582d79bf..04937a908d 100644
--- a/target/linux/layerscape/image/armv7.mk
+++ b/target/linux/layerscape/image/armv7.mk
@@ -45,3 +45,19 @@ define Device/ls1021atwr-sdboot
append-rootfs | check-size $(LS_SD_IMAGE_SIZE)
endef
TARGET_DEVICES += ls1021atwr-sdboot
+
+define Device/ls1021aiot-sdboot
+ DEVICE_TITLE := LS1021AIOT (SD Card Boot)
+ DEVICE_DTS := ls1021a-iot
+ FILESYSTEMS := ext4
+ IMAGES := sdcard.img
+ IMAGE/sdcard.img := \
+ ls-clean | \
+ ls-append-sdhead $(1) | pad-to 4K | \
+ ls-append $(1)-uboot.bin | pad-to 1M | \
+ ls-append $(1)-uboot-env.bin | pad-to 15M | \
+ ls-append-dtb $$(DEVICE_DTS) | pad-to 16M | \
+ append-kernel | pad-to $(LS_SD_ROOTFSPART_OFFSET)M | \
+ append-rootfs | check-size $(LS_SD_IMAGE_SIZE)
+endef
+TARGET_DEVICES += ls1021aiot-sdboot
diff --git a/target/linux/layerscape/patches-4.14/304-arm-dts-ls1021a-Add-LS1021A-IOT-board-support.patch b/target/linux/layerscape/patches-4.14/304-arm-dts-ls1021a-Add-LS1021A-IOT-board-support.patch
new file mode 100644
index 0000000000..37ddf88e55
--- /dev/null
+++ b/target/linux/layerscape/patches-4.14/304-arm-dts-ls1021a-Add-LS1021A-IOT-board-support.patch
@@ -0,0 +1,289 @@
+From bb1a53f1bcb3f4c5983955a1d419c0e4e2531043 Mon Sep 17 00:00:00 2001
+From: Biwen Li <biwen.li@nxp.com>
+Date: Fri, 26 Oct 2018 16:00:37 +0800
+Subject: [PATCH 06/40] arm: dts: ls1021a: Add LS1021A-IOT board support
+
+Signed-off-by: Biwen Li <biwen.li@nxp.com>
+---
+ arch/arm/boot/dts/Makefile | 3 +-
+ arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++++++++++++++++++++++++++++
+ 2 files changed, 264 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -496,7 +496,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
+ imx7s-warp.dtb
+ dtb-$(CONFIG_SOC_LS1021A) += \
+ ls1021a-qds.dtb \
+- ls1021a-twr.dtb
++ ls1021a-twr.dtb \
++ ls1021a-iot.dtb
+ dtb-$(CONFIG_SOC_VF610) += \
+ vf500-colibri-eval-v3.dtb \
+ vf610-colibri-eval-v3.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/ls1021a-iot.dts
+@@ -0,0 +1,262 @@
++/*
++ * Copyright 2013-2016 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++/dts-v1/;
++#include "ls1021a.dtsi"
++
++/ {
++ model = "LS1021A IOT Board";
++
++ sys_mclk: clock-mclk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <24576000>;
++ };
++
++ regulators {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ reg_3p3v: regulator@0 {
++ compatible = "regulator-fixed";
++ reg = <0>;
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ reg_2p5v: regulator@1 {
++ compatible = "regulator-fixed";
++ reg = <1>;
++ regulator-name = "2P5V";
++ regulator-min-microvolt = <2500000>;
++ regulator-max-microvolt = <2500000>;
++ regulator-always-on;
++ };
++ };
++
++ sound {
++ compatible = "simple-audio-card";
++ simple-audio-card,format = "i2s";
++ simple-audio-card,widgets =
++ "Microphone", "Microphone Jack",
++ "Headphone", "Headphone Jack",
++ "Speaker", "Speaker Ext",
++ "Line", "Line In Jack";
++ simple-audio-card,routing =
++ "MIC_IN", "Microphone Jack",
++ "Microphone Jack", "Mic Bias",
++ "LINE_IN", "Line In Jack",
++ "Headphone Jack", "HP_OUT",
++ "Speaker Ext", "LINE_OUT";
++
++ simple-audio-card,cpu {
++ sound-dai = <&sai2>;
++ frame-master;
++ bitclock-master;
++ };
++
++ simple-audio-card,codec {
++ sound-dai = <&codec>;
++ frame-master;
++ bitclock-master;
++ };
++ };
++
++ firmware {
++ optee {
++ compatible = "linaro,optee-tz";
++ method = "smc";
++ };
++ };
++};
++
++&enet0 {
++ tbi-handle = <&tbi1>;
++ phy-handle = <&phy1>;
++ phy-connection-type = "sgmii";
++ status = "okay";
++};
++
++&enet1 {
++ tbi-handle = <&tbi1>;
++ phy-handle = <&phy3>;
++ phy-connection-type = "sgmii";
++ status = "okay";
++};
++
++&enet2 {
++ fixed-link = <0 1 1000 0 0>;
++ phy-connection-type = "rgmii-id";
++ status = "okay";
++};
++
++&can0{
++ status = "disabled";
++};
++
++&can1{
++ status = "disabled";
++};
++
++&can2{
++ status = "disabled";
++};
++
++&can3{
++ status = "okay";
++};
++
++&esdhc{
++ status = "okay";
++};
++
++&i2c0 {
++ status = "okay";
++
++ max1239@35 {
++ compatible = "maxim,max1239";
++ reg = <0x35>;
++ #io-channel-cells = <1>;
++ };
++
++ codec: sgtl5000@2a {
++ #sound-dai-cells=<0x0>;
++ compatible = "fsl,sgtl5000";
++ reg = <0x2a>;
++ VDDA-supply = <&reg_3p3v>;
++ VDDIO-supply = <&reg_2p5v>;
++ clocks = <&sys_mclk 1>;
++ };
++
++ pca9555: pca9555@23 {
++ compatible = "nxp,pca9555";
++ /*pinctrl-names = "default";*/
++ /*interrupt-parent = <&gpio2>;
++ interrupts = <19 0x2>;*/
++ gpio-controller;
++ #gpio-cells = <2>;
++ interrupt-controller;
++ #interrupt-cells = <2>;
++ reg = <0x23>;
++ };
++
++ ina220@44 {
++ compatible = "ti,ina220";
++ reg = <0x44>;
++ shunt-resistor = <1000>;
++ };
++
++ ina220@45 {
++ compatible = "ti,ina220";
++ reg = <0x45>;
++ shunt-resistor = <1000>;
++ };
++
++ lm75b@48 {
++ compatible = "nxp,lm75a";
++ reg = <0x48>;
++ };
++
++ adt7461a@4c {
++ compatible = "adt7461a";
++ reg = <0x4c>;
++ };
++
++ hdmi: sii9022a@39 {
++ compatible = "fsl,sii902x";
++ reg = <0x39>;
++ interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
++ };
++};
++
++&i2c1 {
++ status = "disabled";
++};
++
++&ifc {
++ status = "disabled";
++};
++
++&lpuart0 {
++ status = "okay";
++};
++
++&mdio0 {
++ phy0: ethernet-phy@0 {
++ reg = <0x0>;
++ };
++ phy1: ethernet-phy@1 {
++ reg = <0x1>;
++ };
++ phy2: ethernet-phy@2 {
++ reg = <0x2>;
++ };
++ phy3: ethernet-phy@3 {
++ reg = <0x3>;
++ };
++ tbi1: tbi-phy@1f {
++ reg = <0x1f>;
++ device_type = "tbi-phy";
++ };
++};
++
++&qspi {
++ num-cs = <2>;
++ status = "okay";
++
++ qflash0: s25fl128s@0 {
++ compatible = "spansion,s25fl129p1";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ spi-max-frequency = <20000000>;
++ reg = <0>;
++ };
++};
++
++&sai2 {
++ status = "okay";
++};
++
++&uart0 {
++ status = "okay";
++};
++
++&uart1 {
++ status = "okay";
++};
++
++&dcu {
++ display = <&display>;
++ status = "okay";
++
++ display: display@0 {
++ bits-per-pixel = <24>;
++
++ display-timings {
++ native-mode = <&timing0>;
++
++ timing0: mode0 {
++ clock-frequency = <25000000>;
++ hactive = <640>;
++ vactive = <480>;
++ hback-porch = <80>;
++ hfront-porch = <80>;
++ vback-porch = <16>;
++ vfront-porch = <16>;
++ hsync-len = <12>;
++ vsync-len = <2>;
++ hsync-active = <1>;
++ vsync-active = <1>;
++ };
++ };
++ };
++};