diff options
| author | Felix Fietkau <nbd@openwrt.org> | 2014-05-03 21:14:52 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2014-05-03 21:14:52 +0000 |
| commit | 6c5f0f0caa85885aea6c1ada00ca186a437ee5c1 (patch) | |
| tree | bd377f988e087f23ada6c210d4f41a6dda2dc936 | |
| parent | 26044703a4c212d89aec46c50f44d085c0b97c4a (diff) | |
| download | upstream-6c5f0f0caa85885aea6c1ada00ca186a437ee5c1.tar.gz upstream-6c5f0f0caa85885aea6c1ada00ca186a437ee5c1.tar.bz2 upstream-6c5f0f0caa85885aea6c1ada00ca186a437ee5c1.zip | |
ath5k: merge a tx power handling fix
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 40691
| -rw-r--r-- | package/kernel/mac80211/patches/300-pending_work.patch | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/300-pending_work.patch b/package/kernel/mac80211/patches/300-pending_work.patch index 1389b801d0..892f51e8a6 100644 --- a/package/kernel/mac80211/patches/300-pending_work.patch +++ b/package/kernel/mac80211/patches/300-pending_work.patch @@ -1,3 +1,18 @@ +commit 4c8a3486cb577d40c1ef75f0a8dc9a04773eef83 +Author: Nickolay Ledovskikh <nledovskikh@gmail.com> +Date: Fri Apr 25 22:53:34 2014 +0400 + + ath5k: Fix AR5K_PHY_TXPOWER_RATE_MAX register value setting. + + I was reading ath5k power setting code and + noticed typing error in ath5k_hw_txpower function. + Invalid value was written to AR5K_PHY_TXPOWER_RATE_MAX + register. + + Signed-off-by: Nikolay Ledovskikh <nledovskikh@gmail.com> + Acked-by: Nick Kossifidis <mickflemm@gmail.com> + Signed-off-by: John W. Linville <linville@tuxdriver.com> + commit 4d76248013dbb1948429555208900a585b0f351d Author: Janusz Dziedzic <janusz.dziedzic@tieto.com> Date: Tue Apr 8 13:38:43 2014 +0200 @@ -513,3 +528,16 @@ Date: Sun Apr 6 23:35:28 2014 +0200 {0x0000a3a4, 0x000000ff}, {0x0000a3a8, 0x6a6a6a6a}, {0x0000a3ac, 0x6a6a6a6a}, +--- a/drivers/net/wireless/ath/ath5k/phy.c ++++ b/drivers/net/wireless/ath/ath5k/phy.c +@@ -3709,8 +3709,8 @@ ath5k_hw_txpower(struct ath5k_hw *ah, st + AR5K_REG_MS(AR5K_TUNE_MAX_TXPOWER, AR5K_TPC_CHIRP), + AR5K_TPC); + } else { +- ath5k_hw_reg_write(ah, AR5K_PHY_TXPOWER_RATE_MAX | +- AR5K_TUNE_MAX_TXPOWER, AR5K_PHY_TXPOWER_RATE_MAX); ++ ath5k_hw_reg_write(ah, AR5K_TUNE_MAX_TXPOWER, ++ AR5K_PHY_TXPOWER_RATE_MAX); + } + + return 0; |