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| author | Felix Fietkau <nbd@openwrt.org> | 2016-03-07 08:45:01 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2016-03-07 08:45:01 +0000 |
| commit | 4802f611cb0ad73f5ac569d94567e5f5ed8024da (patch) | |
| tree | 43078c73eabedad561e5cdd0cde54f5bc9759c84 | |
| parent | c865ae03f67d1e7cbeed41e433ce1d94112b24cb (diff) | |
| download | upstream-4802f611cb0ad73f5ac569d94567e5f5ed8024da.tar.gz upstream-4802f611cb0ad73f5ac569d94567e5f5ed8024da.tar.bz2 upstream-4802f611cb0ad73f5ac569d94567e5f5ed8024da.zip | |
ar71xx: fix qca956x ethernet initialization
Complete internal switch initialization for QCA956X.
Set default mdio device if the interface mode of GE0 is not SGMII (fix ticket #21520).
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
SVN-Revision: 48937
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c index 12a376e132..b43c80a376 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -271,6 +271,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask) case ATH79_SOC_QCA956X: if (id == 1) mdio_data->builtin_switch = 1; + mdio_data->is_ar934x = 1; break; default: @@ -1123,16 +1124,25 @@ void __init ath79_register_eth(unsigned int id) if (id == 0) { pdata->reset_bit = QCA955X_RESET_GE0_MAC | QCA955X_RESET_GE0_MDIO; + if (pdata->phy_if_mode == PHY_INTERFACE_MODE_SGMII) pdata->set_speed = qca956x_set_speed_sgmii; else - /* FIXME */ - pdata->set_speed = ath79_set_speed_dummy; + pdata->set_speed = ath79_set_speed_ge0; } else { pdata->reset_bit = QCA955X_RESET_GE1_MAC | QCA955X_RESET_GE1_MDIO; - /* FIXME */ + pdata->set_speed = ath79_set_speed_dummy; + + pdata->switch_data = &ath79_switch_data; + + pdata->speed = SPEED_1000; + pdata->duplex = DUPLEX_FULL; + + /* reset the built-in switch */ + ath79_device_reset_set(AR934X_RESET_ETH_SWITCH); + ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH); } pdata->ddr_flush = ath79_ddr_no_flush; @@ -1196,6 +1206,11 @@ void __init ath79_register_eth(unsigned int id) /* don't assign any MDIO device by default */ break; + case ATH79_SOC_QCA956X: + if (pdata->phy_if_mode != PHY_INTERFACE_MODE_SGMII) + pdata->mii_bus_dev = &ath79_mdio1_device.dev; + break; + default: pdata->mii_bus_dev = &ath79_mdio0_device.dev; break; |