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authorGabor Juhos <juhosg@openwrt.org>2013-03-04 11:48:04 +0000
committerGabor Juhos <juhosg@openwrt.org>2013-03-04 11:48:04 +0000
commit4c31b9f43ecc10bf78278f6db6a32bbc0aa77432 (patch)
treeacde0f6479fd92a6e30d59fc9c7b3928c78ec0bb
parent120028af9931105face41a494ca7166d7a2285d3 (diff)
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ar71xx: use backported GPIO patches
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35875
-rw-r--r--target/linux/ar71xx/patches-3.8/007-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch (renamed from target/linux/ar71xx/patches-3.8/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch)12
-rw-r--r--target/linux/ar71xx/patches-3.8/008-MIPS-ath79-simplify-ath79_gpio_function_-routines.patch72
-rw-r--r--target/linux/ar71xx/patches-3.8/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch4
-rw-r--r--target/linux/ar71xx/patches-3.8/505-MIPS-ath79-add-ath79_gpio_function_select.patch4
4 files changed, 84 insertions, 8 deletions
diff --git a/target/linux/ar71xx/patches-3.8/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch b/target/linux/ar71xx/patches-3.8/007-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch
index 5df56e4eb6..c1f124761d 100644
--- a/target/linux/ar71xx/patches-3.8/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch
+++ b/target/linux/ar71xx/patches-3.8/007-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch
@@ -1,10 +1,12 @@
-From 177dc53a07e2c660d1c1a6cec4576c802325e330 Mon Sep 17 00:00:00 2001
+From 2e6a41e0be6a09ed839e3afbe1fb413a015d8870 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
-Date: Wed, 14 Nov 2012 09:02:01 +0100
+Date: Tue, 29 Jan 2013 08:19:12 +0000
Subject: [PATCH] MIPS: ath79: fix GPIO function selection for AR934x SoCs
+commit 8838becdf5f7261d7f5dfbbe957fe9b9ed188aec upstream.
+
GPIO function selection is not working on the AR934x
-SoCs because the offset of the function selection
+SoCs because the offset of the function selection
register is different on those.
Add a helper routine which returns the correct
@@ -12,6 +14,8 @@ register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Patchwork: http://patchwork.linux-mips.org/patch/4870/
+Signed-off-by: John Crispin <blogic@openwrt.org>
---
arch/mips/ath79/gpio.c | 38 ++++++++++++++++--------
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++
@@ -95,7 +99,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
}
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -521,6 +521,8 @@
+@@ -401,6 +401,8 @@
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
#define AR71XX_GPIO_REG_FUNC 0x28
diff --git a/target/linux/ar71xx/patches-3.8/008-MIPS-ath79-simplify-ath79_gpio_function_-routines.patch b/target/linux/ar71xx/patches-3.8/008-MIPS-ath79-simplify-ath79_gpio_function_-routines.patch
new file mode 100644
index 0000000000..8606f3bf61
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.8/008-MIPS-ath79-simplify-ath79_gpio_function_-routines.patch
@@ -0,0 +1,72 @@
+From 6c888a88f2a9939182bf41151f079a6b59f1593c Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Tue, 29 Jan 2013 08:19:13 +0000
+Subject: [PATCH] MIPS: ath79: simplify ath79_gpio_function_* routines
+
+commit f160a289e0e8848391f5ec48ff1a014b9c04b162 upstream.
+
+Make ath79_gpio_function_{en,dis}able to be wrappers
+around ath79_gpio_function_setup.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Patchwork: http://patchwork.linux-mips.org/patch/4871/
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ arch/mips/ath79/gpio.c | 30 ++++++------------------------
+ 1 file changed, 6 insertions(+), 24 deletions(-)
+
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -154,46 +154,28 @@ static void __iomem *ath79_gpio_get_func
+ return ath79_gpio_base + reg;
+ }
+
+-void ath79_gpio_function_enable(u32 mask)
++void ath79_gpio_function_setup(u32 set, u32 clear)
+ {
+ void __iomem *reg = ath79_gpio_get_function_reg();
+ unsigned long flags;
+
+ spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+- __raw_writel(__raw_readl(reg) | mask, reg);
++ __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
+ /* flush write */
+ __raw_readl(reg);
+
+ spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+ }
+
+-void ath79_gpio_function_disable(u32 mask)
++void ath79_gpio_function_enable(u32 mask)
+ {
+- void __iomem *reg = ath79_gpio_get_function_reg();
+- unsigned long flags;
+-
+- spin_lock_irqsave(&ath79_gpio_lock, flags);
+-
+- __raw_writel(__raw_readl(reg) & ~mask, reg);
+- /* flush write */
+- __raw_readl(reg);
+-
+- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
++ ath79_gpio_function_setup(mask, 0);
+ }
+
+-void ath79_gpio_function_setup(u32 set, u32 clear)
++void ath79_gpio_function_disable(u32 mask)
+ {
+- void __iomem *reg = ath79_gpio_get_function_reg();
+- unsigned long flags;
+-
+- spin_lock_irqsave(&ath79_gpio_lock, flags);
+-
+- __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
+- /* flush write */
+- __raw_readl(reg);
+-
+- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
++ ath79_gpio_function_setup(0, mask);
+ }
+
+ void __init ath79_gpio_init(void)
diff --git a/target/linux/ar71xx/patches-3.8/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.8/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
index af91e2bbd2..279ba33bf8 100644
--- a/target/linux/ar71xx/patches-3.8/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
+++ b/target/linux/ar71xx/patches-3.8/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
@@ -11,7 +11,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
-@@ -198,12 +198,14 @@ void __init ath79_gpio_init(void)
+@@ -194,12 +194,14 @@ void __init ath79_gpio_init(void)
ath79_gpio_count = AR933X_GPIO_COUNT;
else if (soc_is_ar934x())
ath79_gpio_count = AR934X_GPIO_COUNT;
@@ -29,7 +29,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
}
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -507,6 +507,7 @@
+@@ -509,6 +509,7 @@
#define AR913X_GPIO_COUNT 22
#define AR933X_GPIO_COUNT 30
#define AR934X_GPIO_COUNT 23
diff --git a/target/linux/ar71xx/patches-3.8/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-3.8/505-MIPS-ath79-add-ath79_gpio_function_select.patch
index 86e136f67e..9e11381bb7 100644
--- a/target/linux/ar71xx/patches-3.8/505-MIPS-ath79-add-ath79_gpio_function_select.patch
+++ b/target/linux/ar71xx/patches-3.8/505-MIPS-ath79-add-ath79_gpio_function_select.patch
@@ -10,8 +10,8 @@
#endif /* __ATH79_COMMON_H */
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
-@@ -198,6 +198,34 @@ void ath79_gpio_function_setup(u32 set,
- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+@@ -180,6 +180,34 @@ void ath79_gpio_function_disable(u32 mas
+ ath79_gpio_function_setup(0, mask);
}
+void __init ath79_gpio_output_select(unsigned gpio, u8 val)