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authorGabor Juhos <juhosg@openwrt.org>2011-04-09 18:47:50 +0000
committerGabor Juhos <juhosg@openwrt.org>2011-04-09 18:47:50 +0000
commit5573d6eb283a11e6492daf1d998686b2f38697ea (patch)
tree14400459cea64955a4c031b0c4f9b70e8d321670
parentab4c3b3a1c1e7ddb3270be6ecf942ca5a5fe0101 (diff)
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ar71xx: show the SoC type earlier
SVN-Revision: 26560
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/setup.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
index 3a73229d9b..28dc1e593b 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
@@ -169,6 +169,7 @@ static void __init ar71xx_detect_sys_type(void)
}
sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev);
+ pr_info("SoC: %s\n", ar71xx_sys_type);
}
static void __init ar934x_detect_sys_frequency(void)
@@ -335,9 +336,7 @@ void __init plat_mem_setup(void)
ar71xx_detect_sys_type();
detect_sys_frequency();
- printk(KERN_INFO
- "%s, CPU:%u.%03u MHz, AHB:%u.%03u MHz, DDR:%u.%03u MHz\n",
- ar71xx_sys_type,
+ pr_info("Clocks: CPU:%u.%03u MHz, AHB:%u.%03u MHz, DDR:%u.%03u MHz\n",
ar71xx_cpu_freq / 1000000, (ar71xx_cpu_freq / 1000) % 1000,
ar71xx_ahb_freq / 1000000, (ar71xx_ahb_freq / 1000) % 1000,
ar71xx_ddr_freq / 1000000, (ar71xx_ddr_freq / 1000) % 1000);