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author | Gabor Juhos <juhosg@openwrt.org> | 2008-12-26 21:48:50 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2008-12-26 21:48:50 +0000 |
commit | af71c482cfe56408a2a55355c0fd4f7a51f12e38 (patch) | |
tree | a3f6ca797222a2cc86316ced4bb643caf177c8b1 | |
parent | 7abf10d6e6905af7c25f7dd23ed28dd2b7e574ff (diff) | |
download | upstream-af71c482cfe56408a2a55355c0fd4f7a51f12e38.tar.gz upstream-af71c482cfe56408a2a55355c0fd4f7a51f12e38.tar.bz2 upstream-af71c482cfe56408a2a55355c0fd4f7a51f12e38.zip |
add WMAC definitions
SVN-Revision: 13746
-rw-r--r-- | target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h | 3 | ||||
-rw-r--r-- | target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h index a322929ef0..9b423abd8e 100644 --- a/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files-2.6.28/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -56,6 +56,8 @@ #define AR71XX_DMA_SIZE 0x10000 #define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000) #define AR71XX_STEREO_SIZE 0x10000 +#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) +#define AR91XX_WMAC_SIZE 0x30000 #define AR71XX_CPU_IRQ_BASE 0 #define AR71XX_MISC_IRQ_BASE 8 @@ -343,6 +345,7 @@ extern void ar71xx_ddr_flush(u32 reg); #define RESET_MODULE_EXTERNAL BIT(28) #define RESET_MODULE_FULL_CHIP BIT(24) +#define RESET_MODULE_AMBA2WMAC BIT(22) #define RESET_MODULE_CPU_NMI BIT(21) #define RESET_MODULE_CPU_COLD BIT(20) #define RESET_MODULE_DMA BIT(19) diff --git a/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h index a322929ef0..9b423abd8e 100644 --- a/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h @@ -56,6 +56,8 @@ #define AR71XX_DMA_SIZE 0x10000 #define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000) #define AR71XX_STEREO_SIZE 0x10000 +#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) +#define AR91XX_WMAC_SIZE 0x30000 #define AR71XX_CPU_IRQ_BASE 0 #define AR71XX_MISC_IRQ_BASE 8 @@ -343,6 +345,7 @@ extern void ar71xx_ddr_flush(u32 reg); #define RESET_MODULE_EXTERNAL BIT(28) #define RESET_MODULE_FULL_CHIP BIT(24) +#define RESET_MODULE_AMBA2WMAC BIT(22) #define RESET_MODULE_CPU_NMI BIT(21) #define RESET_MODULE_CPU_COLD BIT(20) #define RESET_MODULE_DMA BIT(19) |