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authorGabor Juhos <juhosg@openwrt.org>2012-11-23 20:55:26 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-11-23 20:55:26 +0000
commit49d4b5581d9e4d4bc9cd8fde679b29488d5827bb (patch)
tree5605f68ec252d294bc91e1960dc9854905dabbd8
parent6b63716262b89bec53402817876116898936d5f4 (diff)
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generic: ar8216: set delay values for SGMII mode on AR8327
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34315
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index 8f3aded48f..9cbe3a838c 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -903,6 +903,20 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
case AR8327_PAD_MAC_SGMII:
t = AR8327_PAD_SGMII_EN;
+
+ /*
+ * WAR for the QUalcomm Atheros AP136 board.
+ * It seems that RGMII TX/RX delay settings needs to be
+ * applied for SGMII mode as well, The ethernet is not
+ * reliable without this.
+ */
+ t |= cfg->txclk_delay_sel << AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S;
+ t |= cfg->rxclk_delay_sel << AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S;
+ if (cfg->rxclk_delay_en)
+ t |= AR8327_PAD_RGMII_RXCLK_DELAY_EN;
+ if (cfg->txclk_delay_en)
+ t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
+
break;
case AR8327_PAD_MAC2PHY_MII: