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authorFelix Fietkau <nbd@openwrt.org>2011-08-29 21:23:46 +0000
committerFelix Fietkau <nbd@openwrt.org>2011-08-29 21:23:46 +0000
commit952ae8606240a8fda7484f3c4a5aa451dc8c32b5 (patch)
treea67aa33d4b05125d7951cff28dbe5a3d453a685b
parentd9a80fd97235f90e86d7cb08089e158536869e30 (diff)
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ar71xx: fix ethernet PLL setting on ar7242
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28124 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/devices.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
index 74d9495c30..4c901681ca 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
@@ -265,9 +265,11 @@ static void ar724x_set_pll_ge1(int speed)
static void ar7242_set_pll_ge0(int speed)
{
u32 val = ar71xx_get_eth_pll(0, speed);
+ void __iomem *base;
- ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR7242_PLL_REG_ETH0_INT_CLOCK,
- val, AR71XX_ETH0_PLL_SHIFT);
+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
+ __raw_writel(val, base + AR7242_PLL_REG_ETH0_INT_CLOCK);
+ iounmap(base);
}
static void ar91xx_set_pll_ge0(int speed)
@@ -410,7 +412,7 @@ struct platform_device ar71xx_eth1_device = {
#define AR724X_PLL_VAL_100 0x00001099
#define AR724X_PLL_VAL_10 0x00991099
-#define AR7242_PLL_VAL_1000 0x1c000000
+#define AR7242_PLL_VAL_1000 0x16000000
#define AR7242_PLL_VAL_100 0x00000101
#define AR7242_PLL_VAL_10 0x00001616