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authorFelix Fietkau <nbd@openwrt.org>2011-07-20 14:39:47 +0000
committerFelix Fietkau <nbd@openwrt.org>2011-07-20 14:39:47 +0000
commit5ee62f2cf95c57620b8ce951e984af79c2201681 (patch)
tree70932127b94e066547f673d0d69e5d2f6709ad7d
parent366b622fda009152bf05b834e9fef17941a30598 (diff)
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ar71xx: reinitialize global switch settings after reset on ar7240
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27705 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c47
1 files changed, 24 insertions, 23 deletions
diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c
index fe3232be56..534af4b9f9 100644
--- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c
+++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c
@@ -418,28 +418,6 @@ static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port)
AR7240_PORT_CTRL_STATE_DISABLED);
}
-static int ar7240sw_reset(struct ar7240sw *as)
-{
- struct mii_bus *mii = as->mii_bus;
- int ret;
- int i;
-
- /* Set all ports to disabled state. */
- for (i = 0; i < AR7240_NUM_PORTS; i++)
- ar7240sw_disable_port(as, i);
-
- /* Wait for transmit queues to drain. */
- msleep(2);
-
- /* Reset the switch. */
- ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL,
- AR7240_MASK_CTRL_SOFT_RESET);
-
- ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL,
- AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
- return ret;
-}
-
static void ar7240sw_setup(struct ar7240sw *as)
{
struct mii_bus *mii = as->mii_bus;
@@ -471,6 +449,30 @@ static void ar7240sw_setup(struct ar7240sw *as)
ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0);
}
+static int ar7240sw_reset(struct ar7240sw *as)
+{
+ struct mii_bus *mii = as->mii_bus;
+ int ret;
+ int i;
+
+ /* Set all ports to disabled state. */
+ for (i = 0; i < AR7240_NUM_PORTS; i++)
+ ar7240sw_disable_port(as, i);
+
+ /* Wait for transmit queues to drain. */
+ msleep(2);
+
+ /* Reset the switch. */
+ ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL,
+ AR7240_MASK_CTRL_SOFT_RESET);
+
+ ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL,
+ AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
+
+ ar7240sw_setup(as);
+ return ret;
+}
+
static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask)
{
struct mii_bus *mii = as->mii_bus;
@@ -867,7 +869,6 @@ void ag71xx_ar7240_start(struct ag71xx *ag)
struct ar7240sw *as = ag->phy_priv;
ar7240sw_reset(as);
- ar7240sw_setup(as);
ag->speed = SPEED_1000;
ag->duplex = 1;