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authorMatteo Croce <matteo@openwrt.org>2008-04-07 13:49:44 +0000
committerMatteo Croce <matteo@openwrt.org>2008-04-07 13:49:44 +0000
commit0a6310e1c8cba6658f42521f0fc70acf18d7e63d (patch)
tree57ab9937b6df1372db42321e3af7a43cbff5598d
parent21ccc9c8a9f106419b1ee9109362ecb589fd4dd6 (diff)
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ar7: remove useless volatiles
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10757 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/ar7/files/arch/mips/ar7/clock.c20
-rw-r--r--target/linux/ar7/files/arch/mips/ar7/memory.c15
-rw-r--r--target/linux/ar7/patches-2.6.24/100-board_support.patch2
3 files changed, 20 insertions, 17 deletions
diff --git a/target/linux/ar7/files/arch/mips/ar7/clock.c b/target/linux/ar7/files/arch/mips/ar7/clock.c
index 0f7e2d7eeb..450769e7fd 100644
--- a/target/linux/ar7/files/arch/mips/ar7/clock.c
+++ b/target/linux/ar7/files/arch/mips/ar7/clock.c
@@ -48,12 +48,12 @@
#define TNETD7200_DEF_USB_CLK 48000000
struct tnetd7300_clock {
- volatile u32 ctrl;
+ u32 ctrl;
#define PREDIV_MASK 0x001f0000
#define PREDIV_SHIFT 16
#define POSTDIV_MASK 0x0000001f
u32 unused1[3];
- volatile u32 pll;
+ u32 pll;
#define MUL_MASK 0x0000f000
#define MUL_SHIFT 12
#define PLL_MODE_MASK 0x00000001
@@ -71,17 +71,17 @@ struct tnetd7300_clocks {
};
struct tnetd7200_clock {
- volatile u32 ctrl;
+ u32 ctrl;
u32 unused1[3];
#define DIVISOR_ENABLE_MASK 0x00008000
- volatile u32 mul;
- volatile u32 prediv;
- volatile u32 postdiv;
- volatile u32 postdiv2;
+ u32 mul;
+ u32 prediv;
+ u32 postdiv;
+ u32 postdiv2;
u32 unused2[6];
- volatile u32 cmd;
- volatile u32 status;
- volatile u32 cmden;
+ u32 cmd;
+ u32 status;
+ u32 cmden;
u32 padding[15];
};
diff --git a/target/linux/ar7/files/arch/mips/ar7/memory.c b/target/linux/ar7/files/arch/mips/ar7/memory.c
index 72d6668a1a..e8522a1741 100644
--- a/target/linux/ar7/files/arch/mips/ar7/memory.c
+++ b/target/linux/ar7/files/arch/mips/ar7/memory.c
@@ -37,22 +37,25 @@
static int __init memsize(void)
{
u32 size = (64 << 20);
- volatile u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4);
+ u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4);
u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end));
+ u32 *tmpaddr = addr;
- while (addr > kernel_end) {
- *addr = (u32)addr;
+ while (tmpaddr > kernel_end) {
+ *tmpaddr = (u32)tmpaddr;
size >>= 1;
- addr -= size >> 2;
+ tmpaddr -= size >> 2;
}
do {
- addr += size >> 2;
- if (*addr != (u32)addr)
+ tmpaddr += size >> 2;
+ if (*tmpaddr != (u32)tmpaddr)
break;
size <<= 1;
} while (size < (64 << 20));
+ writel(tmpaddr, &addr);
+
return size;
}
diff --git a/target/linux/ar7/patches-2.6.24/100-board_support.patch b/target/linux/ar7/patches-2.6.24/100-board_support.patch
index eefeb65a44..b9ee68737f 100644
--- a/target/linux/ar7/patches-2.6.24/100-board_support.patch
+++ b/target/linux/ar7/patches-2.6.24/100-board_support.patch
@@ -50,7 +50,7 @@ Index: linux-2.6.23-rc6/arch/mips/kernel/traps.c
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
-+ *(volatile u32 *)(ebase + 0x200) =
++ *(u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }