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author | Gabor Juhos <juhosg@openwrt.org> | 2009-07-05 20:22:24 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2009-07-05 20:22:24 +0000 |
commit | 43565a8321ee552a708d946edc7ab6011e0123d8 (patch) | |
tree | 15d81e1d05b551f9d0211c7b8de25ff573050b36 | |
parent | c1fcf6698b81a857514a2d2befd05b67fd1e3574 (diff) | |
download | upstream-43565a8321ee552a708d946edc7ab6011e0123d8.tar.gz upstream-43565a8321ee552a708d946edc7ab6011e0123d8.tar.bz2 upstream-43565a8321ee552a708d946edc7ab6011e0123d8.zip |
[ar71xx] sync kernel config
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16703 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r-- | target/linux/ar71xx/config-2.6.28 | 1 | ||||
-rw-r--r-- | target/linux/ar71xx/config-2.6.29 | 1 | ||||
-rw-r--r-- | target/linux/ar71xx/config-2.6.30 | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/target/linux/ar71xx/config-2.6.28 b/target/linux/ar71xx/config-2.6.28 index ef908ea45c..b64b68050d 100644 --- a/target/linux/ar71xx/config-2.6.28 +++ b/target/linux/ar71xx/config-2.6.28 @@ -114,6 +114,7 @@ CONFIG_MICREL_PHY=y # CONFIG_MIKROTIK_RB532 is not set CONFIG_MIPS=y # CONFIG_MIPS_COBALT is not set +# CONFIG_MIPS_FPU_EMU is not set CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_MACHINE=y # CONFIG_MIPS_MALTA is not set diff --git a/target/linux/ar71xx/config-2.6.29 b/target/linux/ar71xx/config-2.6.29 index 6900cc2cf7..81a0e77997 100644 --- a/target/linux/ar71xx/config-2.6.29 +++ b/target/linux/ar71xx/config-2.6.29 @@ -118,6 +118,7 @@ CONFIG_MICREL_PHY=y # CONFIG_MIKROTIK_RB532 is not set CONFIG_MIPS=y # CONFIG_MIPS_COBALT is not set +# CONFIG_MIPS_FPU_EMU is not set CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_MACHINE=y # CONFIG_MIPS_MALTA is not set diff --git a/target/linux/ar71xx/config-2.6.30 b/target/linux/ar71xx/config-2.6.30 index d2c1fd86de..797c675c59 100644 --- a/target/linux/ar71xx/config-2.6.30 +++ b/target/linux/ar71xx/config-2.6.30 @@ -125,6 +125,7 @@ CONFIG_MICREL_PHY=y # CONFIG_MIKROTIK_RB532 is not set CONFIG_MIPS=y # CONFIG_MIPS_COBALT is not set +# CONFIG_MIPS_FPU_EMU is not set CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_MACHINE=y # CONFIG_MIPS_MALTA is not set |