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authorPavel Kubelun <be.dissent@gmail.com>2018-01-18 13:38:18 +0300
committerJohn Crispin <john@phrozen.org>2018-05-22 20:34:14 +0200
commitd4b98c38c6acdabf37c9d099be5e2c3cf06a05fb (patch)
treee27d6d46938766615fa69d4e58bbc87cce2be07f
parente16f9abf6b5b5d56d83892d7d86d89023f1e5d42 (diff)
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ipq806x: apply updated USB PHY settings to v2.0 SoC
USB PHY power settings introduced for ipq8065 SoC with commit 644a0d5 "ipq8065: adjust SS USB PHY power settings" According to that commit msg and in correspondence to GPL tarballs and related QSDK branch those settings are applied to ipq8064 SoCs of version >= 2.0. https://github.com/paul-chambers/netgear-r7800/blob/master/git_home/linux.git/sourcecode/arch/arm/mach-msm/board-ipq806x.c#L2507-L2514 Now as we have clarified that mass market boards are of SoC v2.0 move those USB PHY settings from ipq8065 (v3.0 SoC) dtsi to ipq8064 v2.0 dtsi. Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> [slh: rebase for kernel v4.14 as well] Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
-rw-r--r--target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi17
-rw-r--r--target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi11
-rw-r--r--target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi17
-rw-r--r--target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi11
4 files changed, 34 insertions, 22 deletions
diff --git a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
index b90ce81868..5a40b03eef 100644
--- a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
+++ b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
@@ -1 +1,18 @@
#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+ soc: soc {
+
+ ss_phy_0: phy@110f8830 {
+ rx_eq = <2>;
+ tx_deamp_3_5db = <32>;
+ mpll = <0xa0>;
+ };
+
+ ss_phy_1: phy@100f8830 {
+ rx_eq = <2>;
+ tx_deamp_3_5db = <32>;
+ mpll = <0xa0>;
+ };
+ };
+};
diff --git a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi
index 211fb6ad2b..37fb922be0 100644
--- a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -75,17 +75,6 @@
};
};
- ss_phy_0: phy@110f8830 {
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <0xa0>;
- };
- ss_phy_1: phy@100f8830 {
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <0xa0>;
- };
-
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
index b90ce81868..5a40b03eef 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
@@ -1 +1,18 @@
#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+ soc: soc {
+
+ ss_phy_0: phy@110f8830 {
+ rx_eq = <2>;
+ tx_deamp_3_5db = <32>;
+ mpll = <0xa0>;
+ };
+
+ ss_phy_1: phy@100f8830 {
+ rx_eq = <2>;
+ tx_deamp_3_5db = <32>;
+ mpll = <0xa0>;
+ };
+ };
+};
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi
index 211fb6ad2b..37fb922be0 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -75,17 +75,6 @@
};
};
- ss_phy_0: phy@110f8830 {
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <0xa0>;
- };
- ss_phy_1: phy@100f8830 {
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <0xa0>;
- };
-
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";