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authorChris Blake <chrisrblake93@gmail.com>2017-03-27 11:39:07 -0500
committerFelix Fietkau <nbd@nbd.name>2017-04-26 10:29:45 +0200
commitad0c1d3a310554af94659d82f75ecb5e9013baeb (patch)
treef5d8ab0db37c46b67d810d9d5fb3a79aa2a2f20b
parent064eca14bef97cd3b514cecad79cb26721832076 (diff)
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mac80211: Backport AR934x OTP Patch
Merged upstream in https://patchwork.kernel.org/patch/9572541/, this patch fixes the OTP offset used by the AR934x and AR955X to properly enable reading from the OTP. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
-rw-r--r--package/kernel/mac80211/patches/326-ath9k-fix-ar934x-OTP-offsets.patch42
1 files changed, 42 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/326-ath9k-fix-ar934x-OTP-offsets.patch b/package/kernel/mac80211/patches/326-ath9k-fix-ar934x-OTP-offsets.patch
new file mode 100644
index 0000000000..ae6a90fd4a
--- /dev/null
+++ b/package/kernel/mac80211/patches/326-ath9k-fix-ar934x-OTP-offsets.patch
@@ -0,0 +1,42 @@
+From: Christian Lamparter <chunkeey@googlemail.com>
+Date: Tue, 14 Feb 2017 20:10:30 +0100
+Subject: ath9k: use correct OTP register offsets for the AR9340 and AR9550
+
+This patch fixes the OTP register definitions for the AR934x and AR9550
+WMAC SoC.
+
+Previously, the ath9k driver was unable to initialize the integrated
+WMAC on an Aerohive AP121:
+
+| ath: phy0: timeout (1000 us) on reg 0x30018: 0xbadc0ffe & 0x00000007 != 0x00000004
+| ath: phy0: timeout (1000 us) on reg 0x30018: 0xbadc0ffe & 0x00000007 != 0x00000004
+| ath: phy0: Unable to initialize hardware; initialization status: -5
+| ath9k ar934x_wmac: failed to initialize device
+| ath9k: probe of ar934x_wmac failed with error -5
+
+It turns out that the AR9300_OTP_STATUS and AR9300_OTP_DATA
+definitions contain a typo.
+
+Fixes: add295a4afbdf5852d0 "ath9k: use correct OTP register offsets for AR9550"
+Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
+Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
+---
+
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+@@ -75,13 +75,13 @@
+ #define AR9300_OTP_BASE \
+ ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x30000 : 0x14000)
+ #define AR9300_OTP_STATUS \
+- ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x30018 : 0x15f18)
++ ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x31018 : 0x15f18)
+ #define AR9300_OTP_STATUS_TYPE 0x7
+ #define AR9300_OTP_STATUS_VALID 0x4
+ #define AR9300_OTP_STATUS_ACCESS_BUSY 0x2
+ #define AR9300_OTP_STATUS_SM_BUSY 0x1
+ #define AR9300_OTP_READ_DATA \
+- ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x3001c : 0x15f1c)
++ ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x3101c : 0x15f1c)
+
+ enum targetPowerHTRates {
+ HT_TARGET_RATE_0_8_16,