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authorMathias Kresin <dev@kresin.me>2018-08-22 07:30:36 +0200
committerMathias Kresin <dev@kresin.me>2018-08-27 19:31:17 +0200
commit3601c3de23f15e2735adc4becdca14c803b6b1a5 (patch)
treed46e8c2f29112af0226be9cea085ece1ecef4d89
parenta2488f3a243b60ac05b3a3ae492145d564fc6f6e (diff)
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ramips: fix mt7620 pinmux for second SPI
The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part of the "spi refclk" group. The function "spi refclk" enables the second chip select. On reset, the pins of the "spi refclk" group are used as reference clock and GPIO. Signed-off-by: Mathias Kresin <dev@kresin.me>
-rw-r--r--target/linux/ramips/dts/mt7620a.dtsi4
-rw-r--r--target/linux/ramips/dts/mt7620n.dtsi4
2 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 4a1b875e49..8cb397cd22 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -343,8 +343,8 @@
spi_cs1: spi1 {
spi1 {
- ralink,group = "spi_cs1";
- ralink,function = "spi_cs1";
+ ralink,group = "spi refclk";
+ ralink,function = "spi refclk";
};
};
diff --git a/target/linux/ramips/dts/mt7620n.dtsi b/target/linux/ramips/dts/mt7620n.dtsi
index b211f07cf6..1a72e98f09 100644
--- a/target/linux/ramips/dts/mt7620n.dtsi
+++ b/target/linux/ramips/dts/mt7620n.dtsi
@@ -264,8 +264,8 @@
spi_cs1: spi1 {
spi1 {
- ralink,group = "spi_cs1";
- ralink,function = "spi_cs1";
+ ralink,group = "spi refclk";
+ ralink,function = "spi refclk";
};
};