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authorJohn Crispin <john@openwrt.org>2015-07-07 13:46:44 +0000
committerJohn Crispin <john@openwrt.org>2015-07-07 13:46:44 +0000
commit9f2b8b3902c38dfd68db74a4c235c7f38f177822 (patch)
treec6086c65df3f2681796b3d153e4b2b8a3f9c4f13
parent6fc2e94120d0ec05562afed64a3a92c447a9f2fd (diff)
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ar71xx: allow pci calibration fixup to work with ar9344
Signed-off-by: Alexander Couzens <lynxis@fe80.eu> SVN-Revision: 46235
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c
index fcca1d2ea4..2202351806 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c
@@ -73,6 +73,9 @@ static void ath9k_pci_fixup(struct pci_dev *dev)
case ATH79_SOC_AR7242:
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff);
break;
+ case ATH79_SOC_AR9344:
+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff);
+ break;
default:
BUG();