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authorDaniel Golle <daniel@makrotopia.org>2019-03-10 17:53:34 +0100
committerDaniel Golle <daniel@makrotopia.org>2019-03-10 17:57:50 +0100
commit8f9155fe7ac9417ed4bfdaf4256d1758987024a8 (patch)
tree70ec896c469c03d3bca0b9951d5a40bb74219938
parent6a2705a52f794cf3fd6e1d217224c13455aeedea (diff)
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oxnas: fix PCIe register ranges in device-tree
They should be relative to apb-bridge@47000000 rather than to the pcie-controller@c00000 inside it. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
-rw-r--r--target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch b/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch
index 16f47d9056..2e4b5714f4 100644
--- a/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch
+++ b/target/linux/oxnas/patches-4.14/340-oxnas-pcie.patch
@@ -42,7 +42,7 @@
+ bus-range = <0x00 0x7f>;
+
+ /* cfg inbound translator */
-+ reg = <0x0 0x1000>, <0x100000 0x100>;
++ reg = <0xc00000 0x1000>, <0xd00000 0x100>;
+
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
@@ -83,7 +83,7 @@
+ bus-range = <0x80 0xff>;
+
+ /* cfg inbound translator */
-+ reg = <0x0 0x1000>, <0x100000 0x100>;
++ reg = <0xe00000 0x1000>, <0xf00000 0x100>;
+
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";