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authorFelix Fietkau <nbd@openwrt.org>2014-12-12 16:23:29 +0000
committerFelix Fietkau <nbd@openwrt.org>2014-12-12 16:23:29 +0000
commit5b16fd1bf88e34af4fa18e74bb4be524420c11b2 (patch)
treefc54d4a30f0741510a836f66bcc372efd5ee5a75
parent6c4e7b22eb0f564f539dc0951c394b38b60ff381 (diff)
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ar8216: enable cpu port to receive arp and broadcast frames for ar8236
Signed-off-by: Weijie Gao <hackpascal@gmail.com> SVN-Revision: 43668
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.c9
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.h3
2 files changed, 12 insertions, 0 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index 558b9f7718..91e090af81 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -947,6 +947,15 @@ ar8236_init_globals(struct ar8xxx_priv *priv)
ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
AR8316_GCTRL_MTU, 9018 + 8 + 2);
+ /* enable cpu port to receive arp frames */
+ ar8xxx_rmw(priv, AR8216_REG_ATU_CTRL,
+ AR8236_ATU_CTRL_RES, AR8236_ATU_CTRL_RES);
+
+ /* enable cpu port to receive multicast and broadcast frames */
+ ar8xxx_rmw(priv, AR8216_REG_FLOOD_MASK,
+ AR8236_FM_CPU_BROADCAST_EN | AR8236_FM_CPU_BCAST_FWD_EN,
+ AR8236_FM_CPU_BROADCAST_EN | AR8236_FM_CPU_BCAST_FWD_EN);
+
/* Enable MIB counters */
ar8xxx_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
(AR8216_MIB_FUNC_NO_OP << AR8216_MIB_FUNC_S) |
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h
index f6df7c88e5..d43739834e 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.h
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.h
@@ -40,6 +40,8 @@
#define AR8216_REG_FLOOD_MASK 0x002C
#define AR8216_FM_UNI_DEST_PORTS BITS(0, 6)
#define AR8216_FM_MULTI_DEST_PORTS BITS(16, 6)
+#define AR8236_FM_CPU_BROADCAST_EN BIT(26)
+#define AR8236_FM_CPU_BCAST_FWD_EN BIT(25)
#define AR8216_REG_GLOBAL_CTRL 0x0030
#define AR8216_GCTRL_MTU BITS(0, 11)
@@ -93,6 +95,7 @@
#define AR8216_ATU_CTRL_AGE_EN BIT(17)
#define AR8216_ATU_CTRL_AGE_TIME BITS(0, 16)
#define AR8216_ATU_CTRL_AGE_TIME_S 0
+#define AR8236_ATU_CTRL_RES BIT(20)
#define AR8216_REG_MIB_FUNC 0x0080
#define AR8216_MIB_TIMER BITS(0, 16)