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authorJonas Gorski <jogo@openwrt.org>2016-01-18 10:46:47 +0000
committerJonas Gorski <jogo@openwrt.org>2016-01-18 10:46:47 +0000
commit2b3b4c95f1b398adc20b8ab23d4e169561a8e1ac (patch)
tree4c133771aeb6d118a01ec338abecf7ab815e0f25
parent1bd8400752dc5e24b77ea83129c7b4a842ccdb10 (diff)
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b53: update header register difinitions
BCM531x5 has two pontential cpu ports, and header mode can be enabled independently on both. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 48302
-rw-r--r--target/linux/generic/files/drivers/net/phy/b53/b53_regs.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h
index 144e1c8703..f0bf6744a7 100644
--- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h
+++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h
@@ -181,7 +181,8 @@
/* Broadcom Header control register (8 bit) */
#define B53_BRCM_HDR 0x03
-#define BRCM_HDR_EN BIT(0) /* Enable tagging on IMP port */
+#define BRCM_HDR_P8_EN BIT(0) /* Enable tagging on port 8 */
+#define BRCM_HDR_P5_EN BIT(1) /* Enable tagging on port 5 */
/* Device ID register (8 or 32 bit) */
#define B53_DEVICE_ID 0x30