mac80211: add support for BCM4366C0 in brcmfmac

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>

git-svn-id: svn://svn.openwrt.org/openwrt/branches/chaos_calmer@49261 3c298f89-4303-0410-b956-a3cf2f4a3e73

2 files changed, 92 insertions, 0 deletions

diff --git a/package/kernel/mac80211/patches/344-0009-brcmfmac-use-bar1-window-size-as-provided-by-pci-sub.patch b/package/kernel/mac80211/patches/344-0009-brcmfmac-use-bar1-window-size-as-provided-by-pci-sub.patch
new file mode 100644
index 0000000000..ca03ffe4b0
--- /dev/null
+++ b/package/kernel/mac80211/patches/344-0009-brcmfmac-use-bar1-window-size-as-provided-by-pci-sub.patch
@@ -0,0 +1,58 @@
+From: Hante Meuleman <meuleman@broadcom.com>
+Date: Wed, 17 Feb 2016 11:26:58 +0100
+Subject: [PATCH] brcmfmac: use bar1 window size as provided by pci subsystem
+
+The PCIE bar1 window size is specified by chip. Currently the
+ioremap of bar1 was using a define which always matched the size
+of bar1, but newer chips can have a different bar1 sizes. With
+this patch the ioremap will be called with the by chip provided
+window size.
+
+Reviewed-by: Arend Van Spriel <arend@broadcom.com>
+Reviewed-by: Franky (Zhenhui) Lin <frankyl@broadcom.com>
+Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
+Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
+Signed-off-by: Arend van Spriel <arend@broadcom.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
+@@ -72,7 +72,6 @@ static struct brcmf_firmware_mapping brc
+ 
+ #define BRCMF_PCIE_FW_UP_TIMEOUT		2000 /* msec */
+ 
+-#define BRCMF_PCIE_TCM_MAP_SIZE			(4096 * 1024)
+ #define BRCMF_PCIE_REG_MAP_SIZE			(32 * 1024)
+ 
+ /* backplane addres space accessed by BAR0 */
+@@ -252,7 +251,6 @@ struct brcmf_pciedev_info {
+ 	char nvram_name[BRCMF_FW_NAME_LEN];
+ 	void __iomem *regs;
+ 	void __iomem *tcm;
+-	u32 tcm_size;
+ 	u32 ram_base;
+ 	u32 ram_size;
+ 	struct brcmf_chip *ci;
+@@ -1592,8 +1590,7 @@ static int brcmf_pcie_get_resource(struc
+ 	}
+ 
+ 	devinfo->regs = ioremap_nocache(bar0_addr, BRCMF_PCIE_REG_MAP_SIZE);
+-	devinfo->tcm = ioremap_nocache(bar1_addr, BRCMF_PCIE_TCM_MAP_SIZE);
+-	devinfo->tcm_size = BRCMF_PCIE_TCM_MAP_SIZE;
++	devinfo->tcm = ioremap_nocache(bar1_addr, bar1_size);
+ 
+ 	if (!devinfo->regs || !devinfo->tcm) {
+ 		brcmf_err("ioremap() failed (%p,%p)\n", devinfo->regs,
+@@ -1602,8 +1599,9 @@ static int brcmf_pcie_get_resource(struc
+ 	}
+ 	brcmf_dbg(PCIE, "Phys addr : reg space = %p base addr %#016llx\n",
+ 		  devinfo->regs, (unsigned long long)bar0_addr);
+-	brcmf_dbg(PCIE, "Phys addr : mem space = %p base addr %#016llx\n",
+-		  devinfo->tcm, (unsigned long long)bar1_addr);
++	brcmf_dbg(PCIE, "Phys addr : mem space = %p base addr %#016llx size 0x%x\n",
++		  devinfo->tcm, (unsigned long long)bar1_addr,
++		  (unsigned int)bar1_size);
+ 
+ 	return 0;
+ }
diff --git a/package/kernel/mac80211/patches/344-0010-brcmfmac-add-support-for-the-PCIE-4366c0-chip.patch b/package/kernel/mac80211/patches/344-0010-brcmfmac-add-support-for-the-PCIE-4366c0-chip.patch
new file mode 100644
index 0000000000..e4a8f305cf
--- /dev/null
+++ b/package/kernel/mac80211/patches/344-0010-brcmfmac-add-support-for-the-PCIE-4366c0-chip.patch
@@ -0,0 +1,34 @@
+From: Hante Meuleman <meuleman@broadcom.com>
+Date: Wed, 17 Feb 2016 11:26:59 +0100
+Subject: [PATCH] brcmfmac: add support for the PCIE 4366c0 chip
+
+A newer version of the 4366 PCIE chip has been released. Add
+support for this version of the chip.
+
+Reviewed-by: Arend Van Spriel <arend@broadcom.com>
+Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
+Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
+Signed-off-by: Arend van Spriel <arend@broadcom.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
+@@ -53,6 +53,7 @@ BRCMF_FW_NVRAM_DEF(4358, "brcmfmac4358-p
+ BRCMF_FW_NVRAM_DEF(4359, "brcmfmac4359-pcie.bin", "brcmfmac4359-pcie.txt");
+ BRCMF_FW_NVRAM_DEF(4365B, "brcmfmac4365b-pcie.bin", "brcmfmac4365b-pcie.txt");
+ BRCMF_FW_NVRAM_DEF(4366B, "brcmfmac4366b-pcie.bin", "brcmfmac4366b-pcie.txt");
++BRCMF_FW_NVRAM_DEF(4366C, "brcmfmac4366c-pcie.bin", "brcmfmac4366c-pcie.txt");
+ BRCMF_FW_NVRAM_DEF(4371, "brcmfmac4371-pcie.bin", "brcmfmac4371-pcie.txt");
+ 
+ static struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
+@@ -66,7 +67,8 @@ static struct brcmf_firmware_mapping brc
+ 	BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4358_CHIP_ID, 0xFFFFFFFF, 4358),
+ 	BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4359_CHIP_ID, 0xFFFFFFFF, 4359),
+ 	BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4365_CHIP_ID, 0xFFFFFFFF, 4365B),
+-	BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4366_CHIP_ID, 0xFFFFFFFF, 4366B),
++	BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4366_CHIP_ID, 0x0000000F, 4366B),
++	BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4366_CHIP_ID, 0xFFFFFFF0, 4366C),
+ 	BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4371_CHIP_ID, 0xFFFFFFFF, 4371),
+ };
+