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authorHauke Mehrtens <hauke@openwrt.org>2010-01-31 15:09:48 +0000
committerHauke Mehrtens <hauke@openwrt.org>2010-01-31 15:09:48 +0000
commit69471a1f9606e9b154bdd3b61d69c686cbe74980 (patch)
tree50774f3487fa60f49de73e3f8720b89912297bfd
parent7fe3d47bc58b963c8c35958daa7fb3911885f6f0 (diff)
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[amazon] Apply patch 240-irq_fix.patch directly
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19457 3c298f89-4303-0410-b956-a3cf2f4a3e73
-rw-r--r--target/linux/amazon/files/arch/mips/amazon/interrupt.c11
-rw-r--r--target/linux/amazon/patches-2.6.30/240-irq_fix.patch20
2 files changed, 5 insertions, 26 deletions
diff --git a/target/linux/amazon/files/arch/mips/amazon/interrupt.c b/target/linux/amazon/files/arch/mips/amazon/interrupt.c
index 17980fb118..4746f1247e 100644
--- a/target/linux/amazon/files/arch/mips/amazon/interrupt.c
+++ b/target/linux/amazon/files/arch/mips/amazon/interrupt.c
@@ -177,12 +177,11 @@ void __init arch_init_irq(void)
setup_irq(i, &cascade);
}
- for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- set_irq_chip(i, &amazon_irq_type);
- }
+ for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
+ set_irq_chip_and_handler(i, &amazon_irq_type,
+ handle_level_irq);
+
+ set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
}
void __cpuinit arch_fixup_c0_irqs(void)
diff --git a/target/linux/amazon/patches-2.6.30/240-irq_fix.patch b/target/linux/amazon/patches-2.6.30/240-irq_fix.patch
deleted file mode 100644
index 151f1b4fcc..0000000000
--- a/target/linux/amazon/patches-2.6.30/240-irq_fix.patch
+++ /dev/null
@@ -1,20 +0,0 @@
---- a/arch/mips/amazon/interrupt.c
-+++ b/arch/mips/amazon/interrupt.c
-@@ -177,12 +177,11 @@ void __init arch_init_irq(void)
- setup_irq(i, &cascade);
- }
-
-- for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
-- irq_desc[i].status = IRQ_DISABLED;
-- irq_desc[i].action = 0;
-- irq_desc[i].depth = 1;
-- set_irq_chip(i, &amazon_irq_type);
-- }
-+ for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++)
-+ set_irq_chip_and_handler(i, &amazon_irq_type,
-+ handle_level_irq);
-+
-+ set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
- }
-
- void __cpuinit arch_fixup_c0_irqs(void)