From 716ca530e1c4515d8683c9d5be3d56b301758b66 Mon Sep 17 00:00:00 2001
From: James <>
Date: Wed, 4 Nov 2015 11:49:21 +0000
Subject: trunk-47381

---
 ...-MIPS-Provide-a-generic-plat_irq_dispatch.patch | 58 ++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch

(limited to 'target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch')

diff --git a/target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch b/target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch
new file mode 100644
index 0000000..8f5bd31
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch
@@ -0,0 +1,58 @@
+From 85f7cdacbb81db8c4cc8e474837eab1f0e4ff77b Mon Sep 17 00:00:00 2001
+From: Andrew Bresticker <abrestic@chromium.org>
+Date: Thu, 18 Sep 2014 14:47:09 -0700
+Subject: [PATCH 3/3] MIPS: Provide a generic plat_irq_dispatch
+
+For platforms which boot with device-tree or have correctly chained
+all external interrupt controllers, a generic plat_irq_dispatch() can
+be used.  Implement a plat_irq_dispatch() which simply handles all the
+pending interrupts as reported by C0_Cause.
+
+Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
+Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
+Tested-by: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Jason Cooper <jason@lakedaemon.net>
+Cc: Andrew Bresticker <abrestic@chromium.org>
+Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
+Cc: Markos Chandras <markos.chandras@imgtec.com>
+Cc: Paul Burton <paul.burton@imgtec.com>
+Cc: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Jonas Gorski <jogo@openwrt.org>
+Cc: John Crispin <blogic@openwrt.org>
+Cc: David Daney <ddaney.cavm@gmail.com>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+Patchwork: https://patchwork.linux-mips.org/patch/7801/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/kernel/irq_cpu.c |   18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+--- a/arch/mips/kernel/irq_cpu.c
++++ b/arch/mips/kernel/irq_cpu.c
+@@ -98,6 +98,24 @@ static struct irq_chip mips_mt_cpu_irq_c
+ 	.irq_enable	= unmask_mips_irq,
+ };
+ 
++asmlinkage void __weak plat_irq_dispatch(void)
++{
++	unsigned long pending = read_c0_cause() & read_c0_status() & ST0_IM;
++	int irq;
++
++	if (!pending) {
++		spurious_interrupt();
++		return;
++	}
++
++	pending >>= CAUSEB_IP;
++	while (pending) {
++		irq = fls(pending) - 1;
++		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
++		pending &= ~BIT(irq);
++	}
++}
++
+ static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
+ 			     irq_hw_number_t hw)
+ {
-- 
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