--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
@@ -64,15 +64,21 @@ void ath79_gpio_function_disable(u32 mas
 void __init ath79_gpio_output_select(unsigned gpio, u8 val)
 {
 	void __iomem *base = ath79_gpio_base;
-	unsigned int reg;
+	unsigned int reg, reg_base;
 	u32 t, s;
 
-	BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x());
+	if (soc_is_ar934x())
+		reg_base = AR934X_GPIO_REG_OUT_FUNC0;
+	else if (soc_is_qca953x())
+		reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
+	else if (soc_is_qca955x())
+		reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
+	else if (soc_is_qca956x())
+		reg_base = QCA956X_GPIO_REG_OUT_FUNC0;
+	else
+		BUG();
 
-	if (gpio >= AR934X_GPIO_COUNT)
-		return;
-
-	reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
+	reg = reg_base + 4 * (gpio / 4);
 	s = 8 * (gpio % 4);
 
 	t = __raw_readl(base + reg);
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -875,6 +875,14 @@
 #define QCA953X_GPIO_OUT_MUX_LED_LINK4		44
 #define QCA953X_GPIO_OUT_MUX_LED_LINK5		45
 
+#define QCA955X_GPIO_REG_OUT_FUNC0	0x2c
+#define QCA955X_GPIO_REG_OUT_FUNC1	0x30
+#define QCA955X_GPIO_REG_OUT_FUNC2	0x34
+#define QCA955X_GPIO_REG_OUT_FUNC3	0x38
+#define QCA955X_GPIO_REG_OUT_FUNC4	0x3c
+#define QCA955X_GPIO_REG_OUT_FUNC5	0x40
+#define QCA955X_GPIO_REG_FUNC		0x6c
+
 #define QCA956X_GPIO_REG_OUT_FUNC0	0x2c
 #define QCA956X_GPIO_REG_OUT_FUNC1	0x30
 #define QCA956X_GPIO_REG_OUT_FUNC2	0x34
@@ -1014,6 +1022,8 @@
 #define AR934X_GPIO_OUT_EXT_LNA0	46
 #define AR934X_GPIO_OUT_EXT_LNA1	47
 
+#define QCA955X_GPIO_OUT_GPIO		0
+
 /*
  * MII_CTRL block
  */