From 9f4be5550390f86da50c7c971d504e70239ab9d6 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sat, 8 Nov 2014 13:45:26 +0000 Subject: ralink: fix a regression that broke pcie on mt7621 i accidentally dropped 2 lines while adding mt7628 support Signed-off-by: John Crispin git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43216 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'target') diff --git a/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch b/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch index 5f0945d488..f2453b10e8 100644 --- a/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch +++ b/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch @@ -13,8 +13,8 @@ Signed-off-by: John Crispin Index: linux-3.14.18/arch/mips/pci/Makefile =================================================================== ---- linux-3.14.18.orig/arch/mips/pci/Makefile 2014-11-07 11:21:04.465149498 +0100 -+++ linux-3.14.18/arch/mips/pci/Makefile 2014-11-07 11:21:04.477149928 +0100 +--- linux-3.14.18.orig/arch/mips/pci/Makefile 2014-11-08 01:45:46.691495137 +0100 ++++ linux-3.14.18/arch/mips/pci/Makefile 2014-11-08 01:45:46.703495582 +0100 @@ -42,6 +42,7 @@ obj-$(CONFIG_LANTIQ) += fixup-lantiq.o obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o @@ -26,8 +26,8 @@ Index: linux-3.14.18/arch/mips/pci/Makefile Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ linux-3.14.18/arch/mips/pci/pci-mt7620a.c 2014-11-07 11:26:15.884263666 +0100 -@@ -0,0 +1,412 @@ ++++ linux-3.14.18/arch/mips/pci/pci-mt7620a.c 2014-11-08 01:53:41.205013063 +0100 +@@ -0,0 +1,415 @@ +/* + * Ralink MT7620A SoC PCI support + * @@ -284,6 +284,9 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c + rt_sysc_m32(~0x7fffffff, 0x80000000, RALINK_PCIE_CLK_GEN); + rt_sysc_m32(~0x80ffffff, 0xa << 24, RALINK_PCIE_CLK_GEN1); + ++ mdelay(50); ++ reset_control_deassert(rstpcie0); ++ + return 0; +} + @@ -442,8 +445,8 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c +arch_initcall(mt7620_pci_init); Index: linux-3.14.18/arch/mips/ralink/Kconfig =================================================================== ---- linux-3.14.18.orig/arch/mips/ralink/Kconfig 2014-11-07 11:21:04.465149498 +0100 -+++ linux-3.14.18/arch/mips/ralink/Kconfig 2014-11-07 11:21:04.477149928 +0100 +--- linux-3.14.18.orig/arch/mips/ralink/Kconfig 2014-11-08 01:45:46.691495137 +0100 ++++ linux-3.14.18/arch/mips/ralink/Kconfig 2014-11-08 01:45:46.703495582 +0100 @@ -39,6 +39,7 @@ bool "MT7620/8" select USB_ARCH_HAS_OHCI @@ -454,8 +457,8 @@ Index: linux-3.14.18/arch/mips/ralink/Kconfig bool "MT7621" Index: linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h =================================================================== ---- linux-3.14.18.orig/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-07 11:21:04.453149067 +0100 -+++ linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-07 11:21:04.477149928 +0100 +--- linux-3.14.18.orig/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-08 01:45:46.659493958 +0100 ++++ linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-08 01:45:46.703495582 +0100 @@ -19,6 +19,7 @@ MT762X_SOC_MT7620N, MT762X_SOC_MT7628AN, -- cgit v1.2.3